FI871113L - Behandlingskrets foer en serieformad digital signal. - Google Patents

Behandlingskrets foer en serieformad digital signal. Download PDF

Info

Publication number: FI871113L
Authority: FI; Finland
Prior art keywords: serieformad; behandlingskrets; foer; digital signal; digital
Prior art date: 1986-03-21

Application number

FI871113A

Other languages

English (en)

Other versions

FI89847B (fi

FI89847C (fi

FI871113A0 (fi

Inventor

Dennis Roy Mcclary

Charles Benjamin Dieterich

Original Assignee

Rca Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-03-21

Filing date

1987-03-13

Publication date

1987-09-22

1987-03-13 Application filed by Rca Corp filed Critical Rca Corp

1987-03-13 Publication of FI871113A0 publication Critical patent/FI871113A0/fi

1987-09-22 Publication of FI871113L publication Critical patent/FI871113L/fi

1993-08-13 Publication of FI89847B publication Critical patent/FI89847B/fi

1993-11-25 Application granted granted Critical

1993-11-25 Publication of FI89847C publication Critical patent/FI89847C/fi

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/08—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3812—Devices capable of handling different types of numbers
- G06F2207/3816—Accepting numbers of variable word length
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49994—Sign extension

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
General Physics & Mathematics (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
Computational Mathematics (AREA)
Computing Systems (AREA)
Mathematical Analysis (AREA)
Mathematical Optimization (AREA)
Pure & Applied Mathematics (AREA)
Analogue/Digital Conversion (AREA)
Complex Calculations (AREA)
Communication Control (AREA)
Compression, Expansion, Code Conversion, And Decoders (AREA)
Signal Processing For Digital Recording And Reproducing (AREA)
Dc Digital Transmission (AREA)
Color Television Systems (AREA)
Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
Information Transfer Systems (AREA)
Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

FI871113A 1986-03-21 1987-03-13 Behandlingskrets foer en serieformad digital signal FI89847C (fi)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US84265386		1986-03-21
US06/842,653 US4774686A (en)	1986-03-21	1986-03-21	Serial digital signal processing circuitry

Publications (4)

Publication Number	Publication Date
FI871113A0 FI871113A0 (fi)	1987-03-13
FI871113L true FI871113L (fi)	1987-09-22
FI89847B FI89847B (fi)	1993-08-13
FI89847C FI89847C (fi)	1993-11-25

Family

ID=25287908

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FI871113A FI89847C (fi)	1986-03-21	1987-03-13	Behandlingskrets foer en serieformad digital signal

Country Status (11)

Country	Link
US (1)	US4774686A (fi)
EP (1)	EP0238300B1 (fi)
JP (1)	JPH0612547B2 (fi)
KR (1)	KR950012379B1 (fi)
AT (1)	ATE105950T1 (fi)
AU (1)	AU596647B2 (fi)
CA (1)	CA1267731A (fi)
DE (1)	DE3789819T2 (fi)
DK (1)	DK144187A (fi)
ES (1)	ES2053531T3 (fi)
FI (1)	FI89847C (fi)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5133064A (en) *	1987-04-27	1992-07-21	Hitachi, Ltd.	Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
US5084834A (en) *	1988-04-18	1992-01-28	General Electric Company	Digit-serial linear combining apparatus
US5010511A (en) *	1988-04-18	1991-04-23	General Electric Company	Digit-serial linear combining apparatus useful in dividers
US5119324A (en) *	1990-02-20	1992-06-02	Stardent Computer	Apparatus and method for performing arithmetic functions in a computer system
DE59010847D1 (de) *	1990-12-11	1998-09-24	Siemens Ag	Schaltungsanordnung zur digitalen Bit-seriellen Signalverarbeitung
US5311848A (en) *	1991-07-18	1994-05-17	Yamaha Hatsudoki Kabushiki Kaisha	Induction system for engine
JP3003467B2 (ja) *	1993-08-02	2000-01-31	松下電器産業株式会社	演算装置
US6803970B1 (en)	1994-03-24	2004-10-12	Samsung Electronics Co., Ltd.	Digital television receiver with match filter responsive to field synchronization code
KR100260421B1 (ko) *	1996-11-07	2000-07-01	윤종용	최종 중간 주파수 신호 포락선의 필드 동기화 코드에 응답하는정합필터를 구비한 디지털 수신기
US6009448A (en) *	1997-08-18	1999-12-28	Industrial Technology Research Institute	Pipelined parallel-serial architecture for a modified least mean square adaptive filter
US6156196A (en) *	1997-12-22	2000-12-05	Zhiling Gao	Apparatus for visible, preparative column chromatography
TWI226601B (en) *	2003-01-17	2005-01-11	Winbond Electronics Corp	System and method of synthesizing a plurality of voices
KR100783691B1 (ko) *	2006-05-11	2007-12-07	한국과학기술원	프리엠퍼시스를 가지는 직렬 전송 장치

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5235264B2 (fi) *	1971-09-29	1977-09-08
US3914590A (en) *	1974-11-04	1975-10-21	Gen Electric	Serial two{3 s complementer
DE2811488A1 (de) *	1978-03-16	1979-09-27	Siemens Ag	Integrierbarer demodulator fuer getraegerte digitalsignale
JPS5557948A (en) *	1978-10-25	1980-04-30	Hitachi Ltd	Digital adder

1986
- 1986-03-21 US US06/842,653 patent/US4774686A/en not_active Expired - Lifetime
1987
- 1987-03-13 FI FI871113A patent/FI89847C/fi not_active IP Right Cessation
- 1987-03-17 EP EP87302260A patent/EP0238300B1/en not_active Expired - Lifetime
- 1987-03-17 ES ES87302260T patent/ES2053531T3/es not_active Expired - Lifetime
- 1987-03-17 DE DE3789819T patent/DE3789819T2/de not_active Expired - Fee Related
- 1987-03-17 AU AU70073/87A patent/AU596647B2/en not_active Ceased
- 1987-03-17 AT AT87302260T patent/ATE105950T1/de not_active IP Right Cessation
- 1987-03-20 DK DK144187A patent/DK144187A/da not_active Application Discontinuation
- 1987-03-20 JP JP62064480A patent/JPH0612547B2/ja not_active Expired - Fee Related
- 1987-03-20 CA CA000532617A patent/CA1267731A/en not_active Expired - Lifetime
- 1987-03-21 KR KR1019870002586A patent/KR950012379B1/ko not_active Expired - Fee Related

Also Published As

Publication number	Publication date
US4774686A (en)	1988-09-27
JPS62235680A (ja)	1987-10-15
EP0238300B1 (en)	1994-05-18
AU596647B2 (en)	1990-05-10
EP0238300A2 (en)	1987-09-23
ATE105950T1 (de)	1994-06-15
ES2053531T3 (es)	1994-08-01
JPH0612547B2 (ja)	1994-02-16
CA1267731A (en)	1990-04-10
DK144187D0 (da)	1987-03-20
FI89847B (fi)	1993-08-13
DK144187A (da)	1987-09-22
FI89847C (fi)	1993-11-25
EP0238300A3 (en)	1990-09-12
AU7007387A (en)	1987-09-24
KR950012379B1 (ko)	1995-10-17
KR870009595A (ko)	1987-10-27
DE3789819D1 (de)	1994-06-23
DE3789819T2 (de)	1994-11-24
FI871113A0 (fi)	1987-03-13

Publication	Publication Date	Title
FI883448A7 (fi)	1988-07-21	Digitalt bildigenkaenningssystem.
DE3851858D1 (de)	1994-11-24	Digitaler Signalprozessor.
DE3885775D1 (de)	1994-01-05	Digitaler Signalprozessor.
DE3884619D1 (de)	1993-11-04	Digitaler neigungsmesser.
FI871245A7 (fi)	1987-09-29	Stabiliseringskrets foer en digital faslaost slinga.
FI902695A0 (fi)	1990-05-30	Digitalt transmissionssystem anvaendande delbandkodning av en digital signal.
NL190886C (nl)	1994-10-03	Digitaal signaaldemodulatiesysteem.
DE3751032D1 (de)	1995-03-16	Digitales Nachhall-System.
DE3788537D1 (de)	1994-02-03	Symmetrischer doppelt-optischer Signalempfänger.
FI922167A0 (fi)	1992-05-13	Foerbaettrad digital videoapparat.
FI905571A0 (fi)	1990-11-09	Frekvensregleringsanordning och -foerfarande foer en digital radiomottagare.
FI860960A7 (fi)	1986-09-13	Mottagare foer mottagande av digital ljud/datainformation.
DE3776161D1 (de)	1992-03-05	Digitalwiedergabegeraet.
DE3789731D1 (de)	1994-06-09	Digitaler Videosignalprozessor.
DE68911584D1 (de)	1994-02-03	Digitaler Signalregenerator.
FI873314A0 (fi)	1987-07-29	Demodulering av en vinkelmodulerad signal.
FI880638A0 (fi)	1988-02-11	Digital anslutningskrets i en integrerad abonnentanslutningsenhet.
FI890052A0 (fi)	1989-01-05	Signalljus foer flygfaelt.
DE3786521D1 (de)	1993-08-19	Digitaler markierstift.
DE3887249D1 (de)	1994-03-03	Digitaler Multiplexer.
FI883789L (fi)	1990-02-17	Antennomkopplaranordning i en digital resetelefon.
FI874944A7 (fi)	1988-05-14	Signalflagga.
FI880492A0 (fi)	1988-02-03	Synkroniseringssystem foer en halvdigital signal.
FI871113L (fi)	1987-09-22	Behandlingskrets foer en serieformad digital signal.
FI881072A0 (fi)	1988-03-08	Kretsanordning foer abonnentanslutningar i en digital tidsmultiplex telecentral.

Legal Events

Date	Code	Title	Description
1993-07-16	BB	Publication of examined application
1995-10-10	MM	Patent lapsed
2004-08-31	MM	Patent lapsed	Owner name: RCA CORPORATION