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FI20095195A0 - Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara - Google Patents

Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara

Info

Publication number
FI20095195A0
FI20095195A0 FI20095195A FI20095195A FI20095195A0 FI 20095195 A0 FI20095195 A0 FI 20095195A0 FI 20095195 A FI20095195 A FI 20095195A FI 20095195 A FI20095195 A FI 20095195A FI 20095195 A0 FI20095195 A0 FI 20095195A0
Authority
FI
Finland
Prior art keywords
making
low cost
safe distance
fpga hardware
distance configuration
Prior art date
Application number
FI20095195A
Other languages
English (en)
Finnish (fi)
Inventor
Tommi Parkkila
Juhani Latvakoski
Original Assignee
Valtion Teknillinen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Valtion Teknillinen filed Critical Valtion Teknillinen
Priority to FI20095195A priority Critical patent/FI20095195A0/sv
Publication of FI20095195A0 publication Critical patent/FI20095195A0/sv
Priority to PCT/FI2010/050135 priority patent/WO2010097514A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
FI20095195A 2009-02-27 2009-02-27 Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara FI20095195A0 (sv)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FI20095195A FI20095195A0 (sv) 2009-02-27 2009-02-27 Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara
PCT/FI2010/050135 WO2010097514A1 (en) 2009-02-27 2010-02-24 A method for secure remote reconfiguration of the programmable low-cost fpga hardware

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20095195A FI20095195A0 (sv) 2009-02-27 2009-02-27 Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara

Publications (1)

Publication Number Publication Date
FI20095195A0 true FI20095195A0 (sv) 2009-02-27

Family

ID=40404692

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20095195A FI20095195A0 (sv) 2009-02-27 2009-02-27 Förfarande för att göra en säker fjärromkonfigurering i en programmerbar förmånlig FPGA-maskinvara

Country Status (2)

Country Link
FI (1) FI20095195A0 (sv)
WO (1) WO2010097514A1 (sv)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8862702B2 (en) 2012-07-18 2014-10-14 Accedian Networks Inc. Systems and methods of installing and operating devices without explicit network addresses
US9735874B2 (en) 2012-07-18 2017-08-15 Accedian Networks Inc. Programmable small form-factor pluggable module
US8751615B2 (en) 2012-07-18 2014-06-10 Accedian Networks Inc. Systems and methods of discovering and controlling devices without explicit addressing
US8830869B2 (en) 2012-07-18 2014-09-09 Accedian Networks Inc. Systems and methods of detecting and assigning IP addresses to devices with ARP requests
US20140071855A1 (en) 2012-09-10 2014-03-13 Accedian Networks Inc. Transparent auto-negotiation of ethernet
US11029985B2 (en) 2018-01-19 2021-06-08 Ge Aviation Systems Llc Processor virtualization in unmanned vehicles
US10942509B2 (en) 2018-01-19 2021-03-09 Ge Aviation Systems Llc Heterogeneous processing in unmanned vehicles
US11397656B2 (en) * 2019-11-04 2022-07-26 Microsoft Technology Licensing, Llc Telemetry generation for in-field hardware testing
CN112148341B (zh) * 2020-10-29 2023-11-21 合肥埃科光电科技股份有限公司 一种基于NiosII软核的FPGA在线升级方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5640106A (en) * 1995-05-26 1997-06-17 Xilinx, Inc. Method and structure for loading data into several IC devices
US6172520B1 (en) * 1997-12-30 2001-01-09 Xilinx, Inc. FPGA system with user-programmable configuration ports and method for reconfiguring the FPGA
US6028445A (en) * 1997-12-30 2000-02-22 Xilinx, Inc. Decoder structure and method for FPGA configuration
US6526557B1 (en) * 2000-07-25 2003-02-25 Xilinx, Inc. Architecture and method for partially reconfiguring an FPGA
US6920627B2 (en) * 2002-12-13 2005-07-19 Xilinx, Inc. Reconfiguration of a programmable logic device using internal control

Also Published As

Publication number Publication date
WO2010097514A1 (en) 2010-09-02

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