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FI20020108A0 - F÷rfarande och anordning f÷r att bilda võgmetriker i trellis - Google Patents

F÷rfarande och anordning f÷r att bilda võgmetriker i trellis

Info

Publication number
FI20020108A0
FI20020108A0 FI20020108A FI20020108A FI20020108A0 FI 20020108 A0 FI20020108 A0 FI 20020108A0 FI 20020108 A FI20020108 A FI 20020108A FI 20020108 A FI20020108 A FI 20020108A FI 20020108 A0 FI20020108 A0 FI 20020108A0
Authority
FI
Finland
Prior art keywords
trellis
metrics
procedure
forming wall
wall
Prior art date
Application number
FI20020108A
Other languages
English (en)
Finnish (fi)
Inventor
Esko Nieminen
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Priority to FI20020108A priority Critical patent/FI20020108A0/sv
Publication of FI20020108A0 publication Critical patent/FI20020108A0/sv
Priority to US10/348,124 priority patent/US7165210B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3922—Add-Compare-Select [ACS] operation in forward or backward recursions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6513—Support of multiple code types, e.g. unified decoder for LDPC and turbo codes

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
FI20020108A 2002-01-21 2002-01-21 F÷rfarande och anordning f÷r att bilda võgmetriker i trellis FI20020108A0 (sv)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FI20020108A FI20020108A0 (sv) 2002-01-21 2002-01-21 F÷rfarande och anordning f÷r att bilda võgmetriker i trellis
US10/348,124 US7165210B2 (en) 2002-01-21 2003-01-20 Method and apparatus for producing path metrics in trellis

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20020108A FI20020108A0 (sv) 2002-01-21 2002-01-21 F÷rfarande och anordning f÷r att bilda võgmetriker i trellis

Publications (1)

Publication Number Publication Date
FI20020108A0 true FI20020108A0 (sv) 2002-01-21

Family

ID=8562855

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20020108A FI20020108A0 (sv) 2002-01-21 2002-01-21 F÷rfarande och anordning f÷r att bilda võgmetriker i trellis

Country Status (2)

Country Link
US (1) US7165210B2 (sv)
FI (1) FI20020108A0 (sv)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7865251B2 (en) * 2003-01-28 2011-01-04 Fisher-Rosemount Systems, Inc. Method for intercontroller communications in a safety instrumented system or a process control system
US7246295B2 (en) * 2003-04-14 2007-07-17 Agere Systems Inc. Turbo decoder employing simplified log-map decoding
JP4227481B2 (ja) * 2003-07-11 2009-02-18 パナソニック株式会社 復号装置および復号方法
TWI228654B (en) * 2003-07-11 2005-03-01 Mediatek Inc Non-binary Viterbi data processing system and method
US7590199B2 (en) * 2003-09-12 2009-09-15 Advantech Advanced Microwave Technologies Inc. Hybrid frequency offset estimator
US7616698B2 (en) 2003-11-04 2009-11-10 Atheros Communications, Inc. Multiple-input multiple output system and method
JP4217261B2 (ja) * 2004-05-14 2009-01-28 パナソニック株式会社 Ａｃｓ回路
EP2156565A1 (en) * 2007-05-16 2010-02-24 Thomson Licensing Apparatus and method for encoding and decoding signals
US7890854B2 (en) * 2007-05-31 2011-02-15 Realnetworks, Inc. Web media asset identification system and method
MX2010004148A (es) * 2007-10-15 2010-05-17 Thomson Licensing Aparatos y metodos para comunicar actividad de modo de rafaga.
EP2521295A3 (en) * 2007-10-15 2013-10-23 Thomson Licensing High definition television transmission with mobile capability

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5933462A (en) 1996-11-06 1999-08-03 Qualcomm Incorporated Soft decision output decoder for decoding convolutionally encoded codewords
US6163581A (en) * 1997-05-05 2000-12-19 The Regents Of The University Of California Low-power state-sequential viterbi decoder for CDMA digital cellular applications
US6115436A (en) * 1997-12-31 2000-09-05 Ericsson Inc. Non-binary viterbi decoder using butterfly operations
US6597743B1 (en) 1999-12-07 2003-07-22 Ericsson Inc. Reduced search symbol estimation algorithm
EP1128560B1 (en) 2000-02-21 2004-01-28 Motorola, Inc. Apparatus and method for performing SISO decoding
US6829313B1 (en) 2000-07-17 2004-12-07 Motorola, Inc. Sliding window turbo decoder
US6452979B1 (en) 2000-09-06 2002-09-17 Motorola, Inc. Soft output decoder for convolutional codes
US6865710B2 (en) * 2000-09-18 2005-03-08 Lucent Technologies Inc. Butterfly processor for telecommunications

Also Published As

Publication number Publication date
US20030154441A1 (en) 2003-08-14
US7165210B2 (en) 2007-01-16

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