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EP2507865B1 - Compact planar vhf/uhf power impedance - Google Patents

Compact planar vhf/uhf power impedance Download PDF

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Publication number
EP2507865B1
EP2507865B1 EP10787421.6A EP10787421A EP2507865B1 EP 2507865 B1 EP2507865 B1 EP 2507865B1 EP 10787421 A EP10787421 A EP 10787421A EP 2507865 B1 EP2507865 B1 EP 2507865B1
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EP
European Patent Office
Prior art keywords
impedance
access
low
vhf
multilayer circuit
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EP10787421.6A
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German (de)
French (fr)
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EP2507865A1 (en
Inventor
Pierre Bertram
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Thales SA
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Thales SA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/02—Coupling devices of the waveguide type with invariable factor of coupling
    • H01P5/022—Transitions between lines of the same kind and shape, but with different dimensions
    • H01P5/028—Transitions between lines of the same kind and shape, but with different dimensions between strip lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00—Fixed transformers or mutual inductances of the signal type
    • H01F19/04—Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range

Definitions

  • the invention relates to radio frequency devices operating in the VHF and UHF frequency bands and in particular to an impedance transformer for a broadband RF amplifier.
  • RF amplifiers use impedance matching networks (or impedance transformers) to optimize power transfer between an RF source, RF amplifiers and a load.
  • impedance transformers are generally made using transmission lines that often take the form of interconnected coaxial cables.
  • broadband RF amplifiers use, especially in the case of high power, push-pull transistors, each having a signal input and a symmetric power RF output. Their RF inputs and outputs have much lower impedances than the usual 50 ⁇ transmission lines. The use of impedance transformers input and output of the amplifier transistor is therefore necessary to obtain optimal power transfer.
  • the figure 1 shows a schematic embodiment of a typical push-pull RF amplifier stage using such transformers.
  • the amplifier stage of the figure 1a comprises two amplifiers amplifiers A and B mounted in push-pull, an input transformer Te and an output transformer Ts with balanced inputs and outputs to adapt the respective impedances of the input and the output of the amplifier stage, by via an input balun Be and an output balum Bs, at the low input and output impedances of transistors A and B.
  • the input balun Be and the output balun Bs respectively perform a connection between the input E, the output S, asymmetric amplifier and the symmetrical access of the transformers.
  • a 50 ⁇ impedance generator applies an RF signal to be amplified to the asymmetric input E of the input balun Be forming the input of the amplifier.
  • the asymmetrical output S of the output balun Bs forming the output of the amplifier stage is applied to a load 50 ⁇ .
  • balun is a contraction of the English terms BALanced (balanced, balance) and UNbalanced (unbalanced, unbalanced).
  • the figure 2a shows a diagram of an exemplary principle of a state-of-the-art coaxial-line impedance transformer.
  • the transformer of the figure 2a performs an impedance transformation from a high impedance access Eh to a low impedance access Eb, in this example the impedance of the access Eh is 50 ⁇ and the impedance of the access Eb is 12.5 ⁇ .
  • the two lines L1, L2 are connected in series on the side of their high impedance access Eh and in parallel on the side of their low impedance access Eb.
  • the external conductors Ce of the two lines L1, L2 are connected together and possibly to a reference potential, for example a ground M.
  • the inner conductor Ci of one of the lines is connected to the outer conductor Ce of the other line and vice versa.
  • the RF signal input and output are symmetrically performed by the two inner conductors Ci of the coaxial lines.
  • the impedance transformation ratio remains fixed, theoretically equal to 4 in the case of the transformer of the figure 2a .
  • the figure 2b shows a simplified layout diagram of an RF amplifier stage.
  • the amplifier stage comprises, on a printed circuit 10, a housing 20 with two transistors for push-pull mounting, a transformer input T1 and a T2 output transformer according to the scheme of the figure 2a .
  • the input transformer T1 comprises two lines Le1 and Le2 connected in series on the side of its high impedance access Eh and in parallel on the side of its low impedance access Eb, as represented in FIG. figure 2b .
  • the internal conductors Ci of the two lines connect, via an adaptation block 24, the inputs e1, e2 of the two transistors of the housing 20.
  • the output transformer T2 made as the input transformer T1 has two coaxial lines Ls1 and Ls2 and is connected by its low impedance access Eb to the outputs s1, s2 of the transistors of the housing 20, its high impedance access Eh being intended to be connected to a load not shown in the figure.
  • the lines Le1, Le2, Ls1, Ls2 of the transformers T1, T2 are here wound to reduce their bulk in the amplifier.
  • FIGS. 3a and 3b represent cross-sectional and frontal cross-sectional views of an embodiment of a state of the art impedance transformer described in a publication by Georg Boeck, 0-7803-9342-2 / 05 / $ 20.00 ⁇ 2005 IEEE .
  • the impedance transformer of the figure 3a is made on a multilayer circuit board 30 with four metallized layers integrating rectangular lines of microstrip type.
  • the figure 3a shows a cross-sectional view of the four-layer printed circuit in an area having impedance lines Z L of 25 ⁇ and impedance lines Z L of 50 ⁇ .
  • These rectangular coaxial lines may have impedances Z L of 25 ⁇ or 50 ⁇ ohms depending on the arrangement chosen, thus allowing integration of the transformer which uses 25 ohm lines, within a 50 ohm circuit.
  • the figure 3b shows a top view of the impedance transformer of the figure 3a .
  • the micro-ribbons lines are intertwined in spiral in order to reduce the size, which forces many crossings lines detrimental to performance and power handling.
  • Vias 32 provide interconnection between the different metallizations of the printed circuit layers.
  • the figure 4a shows a perspective view of another embodiment of an impedance transformer of the state of the art.
  • the figure 4b a cross-sectional view of the transformer of the figure 4a .
  • the transformer of the Figures 4a and 4b comprises a double-sided substrate 40 having metallizations on its two faces forming micro-ribbon type lines L1, L2 interconnected by conductive transitions between faces.
  • the free ends of the conductors 308, 304 of the same face 44 of the substrate 40, of the two lines L1, L2 form the ports 5, 3 of serial input (high impedance access), the ends of the conductors 316, 312 of the other face 46 of the substrate 40 are connected together to form a port 4, or common point.
  • the end of the conductors 304 of the line L2 On the side of the other end of the substrate 52 opposite the first 50, the end of the conductors 304 of the line L2, the face 44 of the substrate 40 and the end of the conductors 316 of the line L1, the other face 46 of the substrate 40 are connected together to an output port 2 and the end of the conductor 312 of the line L2, the other face of the substrate 46 and the end of the conductor 308 of the line L1, the face of the substrate 44 are connected together to a port 1, the ports 1 and 2 forming the low parallel impedance access of the transformer of the figure 3a .
  • a document US 6,396,362 A1 discloses a Balun type impedance transformer in compact multilayer technology.
  • a document US 2006/145786 A1 presents a bandpass filter using a Balun-type converter.
  • a document WO 03/088410 A1 has an electrical matching network provided with an impedance transformation line.
  • a document US 5,497,137 A has a chip type impedance transformer.
  • the symmetrical microstrip lines comprise impedances gradually varying between their two ends from a low impedance to a strong impedance in order to modify the impedance transformation ratio.
  • the inner layer consists of two superimposed layers, to form a perfectly symmetrical four-layer multilayer circuit.
  • the electrical conductors of the micro-ribbon lines are at least partially in the form of a coil along the same axis XX 'parallel to the long side of the multilayer circuit having the high Eh and low Eb impedance accesses, to reduce the size of the multilayer circuit.
  • the widths of the outer and inner conductors vary progressively from one end to the other along the micro-ribbon lines, from a certain initial width to a final lower width to obtain the gradual variation of the low impedance towards the strong impedance of the micro-ribbon lines.
  • the long side of the multilayer circuit comprises a respective recess, on both sides of the high Eh and low Eb impedance accesses, P depth having parallel edges to the long side, said recesses being made to leave of the place, under the transformer, to potential components located on the printed circuit board (or motherboard) on which the transformer is intended to be connected.
  • the thickness of each of the outer layers is 100 ⁇ m, the thickness of the inner layer being 1600 ⁇ m.
  • the inner layer is formed by two superimposed internal layers 800 ⁇ m thick each.
  • the transformation ratio Rz between the impedance of the high impedance access Eh and that of the low impedance access Eb may be between 2 and 9.
  • FIGS. 5a and 5b respectively show a bottom view and a front view of an RF transformer, according to the invention, comprising a multilayer circuit.
  • the figure 5c shows a partial cross-sectional view of the multilayer circuit of the transformer of the figure 5a .
  • the processor of the Figures 5a to 5b comprises a multilayer substrate 60 of rectangular shape, of length L of height H and of thickness E, having two long sides 62, 64 parallel and two small sides 66, 68 perpendicular to the long sides.
  • the transformer comprises three superposed layers (see FIG. figure 5c ), a first outer layer Ce1 separated by a second outer layer Ce2, of the same thickness ex, by an inner layer Ci of ec thickness much greater than that of the outer layers.
  • an inner layer Ci of thickness that is much greater or substantially greater than the thickness of the outer layers Ce is produced when the thickness of this inner layer Ci is at least four times greater than the thickness of the outer layer.
  • the inner layer Ci may also be formed by two superposed internal layers of 800 .mu.m each.
  • the first outer layer Ce1 has two metallized faces, an inner face 70 having a metallization forming an inner conductor 72 and an outer face 74 having a metallization forming an outer conductor 76 vis-à-vis the inner conductor.
  • the two inner and outer conductors 72, 76 of the first outer layer Ce1 form a first line L1 microstrip type.
  • the second outer layer Ce2 has two metallized faces, an inner face 80 having a metallization forming an inner conductor 82 and an outer face 84 having a metallization forming an outer conductor 86 vis-à-vis the inner conductor.
  • the two conductors 82, 86 of the second outer layer Ce2 form a second line L2 of the micro-ribbon type symmetrical to the first with respect to a plane of symmetry PC of the multilayer circuit 60, parallel and equidistant from the outer faces 74, 84.
  • the electrical conductors 72, 76, 82, 86 of the outer layers are superimposed via the different layers Ce1, Ci, Ce2 of the multilayer circuit 60.
  • the metallizations of the outer layers Ce1, Ce2 are made to obtain a reduced length L of the multilayer substrate 60 but respecting a maximum height H not to be exceeded for integration or connection, to a printed circuit (or motherboard), on which the transformer will be connected to, as described later.
  • the multilayer circuit 60 comprises, on the side of the high Eh and low Eb impedance accesses of the transformer, a respective recess 110, 112 on either side of said accesses, of depth P, each of the recesses having edges parallel to the long sides 62 , 64.
  • the recesses 110, 112 are made to leave room, under the transformer, for any components wired on the printed circuit board (or motherboard) on which the transformer is intended to be connected.
  • the multilayer circuit 60 comprises interconnecting vias of the ends of the electrical conductors for making floating accesses, the high-impedance series access Eh at one end of the lines L1 and L2 and the low-impedance parallel access Eb at the other end. lines L1 and L2.
  • the Figures 5d and 5e show the interconnection between the transformer conductors of the Figures 5a, 5b and 5c .
  • the narrower end of an inner conductor 72 of one of the lines L1 is connected, via vias 114 through the central layer Ci of the substrate, to the end facing the inner conductor 82 of the other line L2, to achieve the access Eh high impedance series.
  • the wider end of the inner conductor 72 of the line L1 is connected by vias 116 to the end of the outer conductor 86 vis-à-vis the line L2 to form one of the two poles of the access Eb low impedance parallel, the other pole being formed by the connection, via vias 118, the widest end of the inner conductor 82 of the line L2 to the outer conductor 76, vis-à-vis the line L1.
  • the lines L1, L2 of the transformer have a variable width in order to obtain different Rz impedance (or transformation) ratios (generally, higher) to the ratio of 4 obtained by coaxial lines or micro-ribbon having a constant width .
  • the lines of variable width of the transformer according to the invention make it possible to obtain a transformation ratio Rz between the impedance of the high impedance access Eh and that of the low impedance access Eb which can be between 2 and 9.
  • the central substrate layer Ci is substantially thicker than the external substrate layers Ce1, Ce2 of the multilayer circuit (thickness ratio of the order of 16 in the embodiment presented).
  • the width of the inner electrical conductors 72, 82 is greater than the width of the external electrical conductors 76, 86 so as to obtain a better decoupling between the two lines L1 and L2.
  • the inner layer Ci can also be made by two bonded layers of the same thickness, which amounts to producing a multilayer substrate with four perfectly symmetrical layers of simple manufacture and giving a stable product over time.
  • the impedance of the serial high impedance access of the transformer is chosen to be slightly less than 50 ⁇ , for example 46 ⁇ , in order to have larger lines L1, L2 for better power handling of the transformer.
  • the input impedance Zf, on the strong impedance side, of each line L1 or L2 is 23 ⁇ .
  • the impedance Zb of the low impedance access of each line L1, L2 is chosen to be 17 ⁇ to obtain an impedance access impedance Eb low impedance of the 8.5 ⁇ transformer.
  • the variation in the width of the tracks (or metallizations) between the high impedance access Eh and the low impedance access Eb of the transformer makes it possible, in this embodiment, to go from 46 ohm to 8.5 ohm, ie an impedance ratio of the order 5.5.
  • An alternative embodiment of the transformer according to the invention consists in the use of ferrite material placed in a central part of the electrical conductors of the lines L1, L2 in order to extend the bandwidth towards the low frequencies, but this to the detriment of the cost.
  • the figure 6 shows a simplified perspective view of an RF amplifier stage comprising the transformer according to the invention as shown in FIG. figure 5b .
  • the transformer of the figure 6 is in the form of a daughter card 128.
  • the amplifier stage comprises a printed circuit (or motherboard) 130 on which is mounted a housing 132 comprising two transistors for push-pull mounting.
  • the daughter card 128 is plugged into the motherboard 130 and only 4 brazing points 150, 152 (only two points are shown on the figure) on the ends of the external electrical conductors 72, 76, external faces 74, 80 of the multilayer circuit 60 are required to connect the lines L1, L2 of the transformer to the motherboard. These patch points allow both the connection and the immobilization of the daughter card 128 on the motherboard 130, an asymmetrical shape of the daughter card 128 providing easy coding.
  • the embodiment of the transformer proposed as an example for Figures 5a and 5b is based on a circuit diagram allowing the use of a daughter card (multilayer circuit 60) to be carried vertically on the motherboard 130 amplifying the figure 6 .
  • the thickness of this daughter card is of the order of 2mm.
  • the design of pairs of tracks to connect the transformer according to the invention reduces the size of this daughter card to a minimum.
  • the high impedance Eh and low impedance Eb accesses of the transformer 128 are closely approximated in order to reduce the implantation length on the motherboard 130.
  • the length of the central portion of the substrate having the high Eh and low impedance Eb access is 8.5 mm while the length required for the connection of the Ls2 wound line transformer of the figure 2b is much larger (about 15 mm).
  • the asymmetrical shape of the daughter card 128 (the impedance transformer) is adapted to the arrangement of the elements implanted on the motherboard 130.
  • the daughter card 128 goes to above impedance matching elements 160, 162 of the soldered transistors 132 on the motherboard 130 while allowing access thereto.
  • the impedance transformer according to the invention is adapted to pass large powers, of the order of a few watts, with little radio frequency losses.

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Description

L'invention concerne les dispositifs radiofréquences fonctionnant dans les bandes de fréquences VHF et UHF et en particulier un transformateur d'impédance pour amplificateur RF large bande.The invention relates to radio frequency devices operating in the VHF and UHF frequency bands and in particular to an impedance transformer for a broadband RF amplifier.

Les circuits amplificateurs radiofréquences (RF) utilisent des réseaux d'adaptation d'impédance (ou transformateurs d'impédance) afin d'optimiser le transfert de puissance entre une source RF, des transistors amplificateurs RF et une charge. Dans le cas de très larges bandes passantes, ces transformateurs d'impédance sont généralement réalisés à l'aide de lignes de transmission qui prennent souvent la forme de câbles coaxiaux interconnectés.RF amplifiers use impedance matching networks (or impedance transformers) to optimize power transfer between an RF source, RF amplifiers and a load. In the case of very large bandwidths, these impedance transformers are generally made using transmission lines that often take the form of interconnected coaxial cables.

Par exemple, les amplificateurs RF large bande utilisent, notamment dans le cas de fortes puissances, des transistors montés en push pull, ayant chacun une entrée de signal et une sortie RF de puissance symétrique. Leurs entrées et sorties RF ont des impédances bien plus faible que celle des lignes de transmission habituelles de 50Ω. L'utilisation de transformateurs d'impédance en entrée et en sortie du transistor amplificateur s'avère donc nécessaire pour obtenir un transfert de puissance optimal.For example, broadband RF amplifiers use, especially in the case of high power, push-pull transistors, each having a signal input and a symmetric power RF output. Their RF inputs and outputs have much lower impedances than the usual 50Ω transmission lines. The use of impedance transformers input and output of the amplifier transistor is therefore necessary to obtain optimal power transfer.

La figure 1 montre un exemple schématique de réalisation d'un étage amplificateur RF push-pull typique utilisant de tels transformateurs.The figure 1 shows a schematic embodiment of a typical push-pull RF amplifier stage using such transformers.

L'étage amplificateur de la figure 1a comporte deux transistors amplificateurs A et B montés en push-pull, un transformateur d'entrée Te et un transformateur de sortie Ts à entrées et sorties symétriques pour adapter les impédances respectives de l'entrée et de la sortie de l'étage amplificateur, par l'intermédiaire d'un balun d'entrée Be et d'un balum de sortie Bs, aux faibles impédances d'entrée et de sortie des transistors A et B. Le balun d'entrée Be et le balun de sortie Bs effectuent respectivement une liaison entre l'entrée E, la sortie S, asymétriques de l'amplificateur et les accès symétriques des transformateurs.The amplifier stage of the figure 1a comprises two amplifiers amplifiers A and B mounted in push-pull, an input transformer Te and an output transformer Ts with balanced inputs and outputs to adapt the respective impedances of the input and the output of the amplifier stage, by via an input balun Be and an output balum Bs, at the low input and output impedances of transistors A and B. The input balun Be and the output balun Bs respectively perform a connection between the input E, the output S, asymmetric amplifier and the symmetrical access of the transformers.

Un générateur d'impédance 50 Ω applique un signal RF à amplifier à l'entrée E asymétrique du balun d'entrée Be formant l'entrée de l'amplificateur. La sortie asymétrique S du balun de sortie Bs formant la sortie de l'étage amplificateur est appliquée à une charge 50 Ω.A 50 Ω impedance generator applies an RF signal to be amplified to the asymmetric input E of the input balun Be forming the input of the amplifier. The asymmetrical output S of the output balun Bs forming the output of the amplifier stage is applied to a load 50 Ω.

Il faut noter que le terme balun est une contraction des termes anglais BALanced (équilibré, balance) et UNbalanced (déséquilibré, non balancé).It should be noted that the term balun is a contraction of the English terms BALanced (balanced, balance) and UNbalanced (unbalanced, unbalanced).

La figure 2a montre un schéma d'un exemple de principe d'un transformateur d'impédance à lignes coaxiales de l'état de l'art.The figure 2a shows a diagram of an exemplary principle of a state-of-the-art coaxial-line impedance transformer.

Le transformateur de la figure 2a effectue une transformation d'impédance d'un accès Eh haute impédance vers un accès Eb basse impédance, dans cet exemple l'impédance de l'accès Eh est de 50Ω et l'impédance de l'accès Eb est de 12,5 Ω. Le transformateur de la figure 2a comporte deux lignes coaxiales L1, L2 d'impédance caractéristique Zc = 25Ω comportant chacune un conducteur interne Ci et un conducteur externe Ce entourant le conducteur interne.The transformer of the figure 2a performs an impedance transformation from a high impedance access Eh to a low impedance access Eb, in this example the impedance of the access Eh is 50Ω and the impedance of the access Eb is 12.5 Ω. The transformer of the figure 2a has two coaxial lines L1, L2 of characteristic impedance Zc = 25Ω each comprising an inner conductor Ci and an outer conductor Ce surrounding the inner conductor.

Les deux lignes L1, L2 sont connectées en série du côté de leur accès haute impédance Eh et en parallèle du côté de leur accès basse impédance Eb. A cet effet, du côté de l'accès haute impédance du transformateur, les conducteurs externes Ce des deux lignes L1, L2 sont reliés ensemble et éventuellement à un potentiel de référence par exemple une masse M. Du côté de l'accès basse impédance du transformateur, le conducteur interne Ci d'une des lignes est relié au conducteur externe Ce de l'autre ligne et réciproquement. L'entrée et la sortie de signal RF s'effectuent de façon symétrique par les deux conducteurs internes Ci des lignes coaxiales.The two lines L1, L2 are connected in series on the side of their high impedance access Eh and in parallel on the side of their low impedance access Eb. For this purpose, on the high impedance access side of the transformer, the external conductors Ce of the two lines L1, L2 are connected together and possibly to a reference potential, for example a ground M. On the low impedance access side of the transformer, the inner conductor Ci of one of the lines is connected to the outer conductor Ce of the other line and vice versa. The RF signal input and output are symmetrically performed by the two inner conductors Ci of the coaxial lines.

Le rapport de transformation d'impédance reste figé, théoriquement égal à 4 dans le cas du transformateur de la figure 2a.The impedance transformation ratio remains fixed, theoretically equal to 4 in the case of the transformer of the figure 2a .

L'utilisation de blocs de ferrites entourant les lignes coaxiales (non représentés sur la figure) permet d'élargir la bande passante du transformateur vers les fréquences basses.The use of ferrite blocks surrounding the coaxial lines (not shown in the figure) makes it possible to widen the bandwidth of the transformer towards the low frequencies.

La figure 2b montre un schéma d'implantation simplifié d'un étage amplificateur RF.The figure 2b shows a simplified layout diagram of an RF amplifier stage.

L'étage amplificateur comporte, sur un circuit imprimé 10 un boîtier 20 avec deux transistors pour montage en push pull, un transformateur d'entrée T1 et un transformateur de sortie T2 selon le schéma de la figure 2a.The amplifier stage comprises, on a printed circuit 10, a housing 20 with two transistors for push-pull mounting, a transformer input T1 and a T2 output transformer according to the scheme of the figure 2a .

Le transformateur d'entrée T1 comporte deux lignes Le1 et Le2 montées en série du côté de son accès Eh haute impédance et en parallèle du côté de son accès Eb basse impédance, tel que représenté à la figure 2b. Les conducteurs internes Ci des deux lignes relient, par l'intermédiaire d'un bloc d'adaptation 24, les entrées e1, e2 des deux transistors du boîtier 20.The input transformer T1 comprises two lines Le1 and Le2 connected in series on the side of its high impedance access Eh and in parallel on the side of its low impedance access Eb, as represented in FIG. figure 2b . The internal conductors Ci of the two lines connect, via an adaptation block 24, the inputs e1, e2 of the two transistors of the housing 20.

Le transformateur de sortie T2 réalisé comme le transformateur d'entrée T1 comporte deux lignes coaxiales Ls1 et Ls2 et est connecté par son accès Eb basse impédance aux sorties s1, s2 des transistors du boîtier 20, son accès Eh haute impédance étant destiné à être connecté à une charge non représentée sur la figure.The output transformer T2 made as the input transformer T1 has two coaxial lines Ls1 and Ls2 and is connected by its low impedance access Eb to the outputs s1, s2 of the transistors of the housing 20, its high impedance access Eh being intended to be connected to a load not shown in the figure.

Les lignes Le1, Le2, Ls1, Ls2 des transformateurs T1, T2 sont ici enroulées pour diminuer leur encombrement dans l'amplificateur.The lines Le1, Le2, Ls1, Ls2 of the transformers T1, T2 are here wound to reduce their bulk in the amplifier.

Ce type de réalisation de la figure 2b avec transformateurs en lignes coaxiales enroulées reste artisanale, ce qui impacte le coût de réalisation et l'encombrement (surtout en longueur) de l'étage amplificateur.This type of realization of the figure 2b with transformers coaxial coiled lines remains artisanal, which impacts the cost of implementation and congestion (especially in length) of the amplifier stage.

Pour limiter l'encombrement des transformateurs d'impédance RF, certaines réalisations de l'état de l'art utilisent des circuits imprimés pour remplacer les lignes coaxiales. Ces réalisations sont très nombreuses et certaines sont commercialement disponibles mais pour des bandes passantes et surtout des puissances modestes.To limit the size of the RF impedance transformers, some embodiments of the state of the art use printed circuits to replace the coaxial lines. These achievements are very numerous and some are commercially available but for bandwidths and especially modest powers.

On ne citera que 2 exemples particuliers sur la base desquels seront présentés les avantages de l'invention proposée.Only two particular examples are given on the basis of which the advantages of the proposed invention will be presented.

Les figures 3a et 3b représentent des vues en coupe transversales et de face d'une réalisation d'un transformateur d'impédance de l'état de l'art décrite dans une publication de Georg Boeck, 0-7803-9342-2/05/$20.00 © 2005 IEEE.The Figures 3a and 3b represent cross-sectional and frontal cross-sectional views of an embodiment of a state of the art impedance transformer described in a publication by Georg Boeck, 0-7803-9342-2 / 05 / $ 20.00 © 2005 IEEE .

Le transformateur d'impédance de la figure 3a est réalisé sur un circuit imprimé multicouche 30 à quatre couches métallisées intégrant des lignes rectangulaires de type micro-ruban.The impedance transformer of the figure 3a is made on a multilayer circuit board 30 with four metallized layers integrating rectangular lines of microstrip type.

La figure 3a montre une vue en coupe transversale du circuit imprimé à quatre couches dans une zone comportant des lignes d'impédance ZL de 25Ω et des lignes d'impédance ZL de 50Ω.The figure 3a shows a cross-sectional view of the four-layer printed circuit in an area having impedance lines Z L of 25Ω and impedance lines Z L of 50Ω.

Ces lignes coaxiales rectangulaires peuvent présenter des impédances ZL de 25Ω ou de 50Ω ohms suivant la disposition choisie, permettant ainsi d'intégrer le transformateur qui utilise des lignes 25 ohms, au sein d'un circuit 50 ohms.These rectangular coaxial lines may have impedances Z L of 25Ω or 50Ω ohms depending on the arrangement chosen, thus allowing integration of the transformer which uses 25 ohm lines, within a 50 ohm circuit.

La figure 3b montre une vue de dessus du transformateur d'impédance de la figure 3a. Les lignes micro-rubans sont entrelacées en spirale afin de diminuer l'encombrement, ce qui oblige à de nombreux croisements des lignes préjudiciables aux performances et à la tenue en puissance. Des vias 32 assurent l'interconnexion entre les différentes métallisations des couches du circuit imprimé.The figure 3b shows a top view of the impedance transformer of the figure 3a . The micro-ribbons lines are intertwined in spiral in order to reduce the size, which forces many crossings lines detrimental to performance and power handling. Vias 32 provide interconnection between the different metallizations of the printed circuit layers.

La réalisation des figures 3a et 3b convient uniquement à des utilisations à très faible niveau de signal du fait de la topologie en spirale utilisée, préjudiciable aux performances, notamment aux pertes d'insertion.The achievement of Figures 3a and 3b is suitable only for uses with a very low signal level because of the spiral topology used, which is detrimental to performance, particularly to insertion losses.

La figure 4a montre une vue en perspective d'une autre réalisation d'un transformateur d'impédance de l'état de l'art. La figure 4b une vue en coupe transversale du transformateur de la figure 4a.The figure 4a shows a perspective view of another embodiment of an impedance transformer of the state of the art. The figure 4b a cross-sectional view of the transformer of the figure 4a .

Dans la réalisation de la figure 4a les problèmes des nombreux croisements de lignes de la réalisation des figures 3a et 3b ne se posent pas du fait d'une topologie de réalisation basée sur une simple paire de pistes formant des lignes repliées en forme de U. A cet effet, le transformateur des figures 4a et 4b comporte un substrat 40 double face ayant des métallisations sur ses deux faces formant des lignes L1, L2 de type micro ruban interconnectées par des transitions conductrices entre faces.In the realization of the figure 4a the problems of the many line crossings of achieving the Figures 3a and 3b do not arise because of an implementation topology based on a single pair of tracks forming U-shaped folded lines. For this purpose, the transformer of the Figures 4a and 4b comprises a double-sided substrate 40 having metallizations on its two faces forming micro-ribbon type lines L1, L2 interconnected by conductive transitions between faces.

La réalisation de la figure 4a comporte :

  • un conducteur 308 (ou métallisation) sur une face 44 du substrat 40 et une autre conducteur 316 face au premier sur l'autre face 46 du substrat 40 pour former la première ligne L1 micro ruban en forme de U,
  • une deuxième ligne micro ruban L2 comportant un conducteur 304 (ou métallisation) sur la face 44 du substrat et une autre conducteur 316 face au premier sur l'autre face du substrat 40 pour former la deuxième ligne L2 micro-ruban en forme de U symétrique par rapport à la première L1.
The realization of the figure 4a has:
  • a conductor 308 (or metallization) on one face 44 of the substrate 40 and another conductor 316 facing the first on the other face 46 of the substrate 40 to form the first U-shaped micro-ribbon line L1,
  • a second micro-ribbon line L2 comprising a conductor 304 (or metallization) on the face 44 of the substrate and another conductor 316 facing the first on the other side of the substrate 40 to form the second line L2 symmetrical U-shaped microstrip compared to the first L1.

Du côté d'une extrémité 50 du substrat, les extrémités libres des conducteurs 308, 304 de la même face 44 du substrat 40, des deux lignes L1, L2 forment les ports 5, 3 d'entrée série (accès haute impédance), les extrémités des conducteurs 316, 312 de l'autre face 46 du substrat 40 sont reliées ensemble pour former un port 4, ou point commun.On the side of one end 50 of the substrate, the free ends of the conductors 308, 304 of the same face 44 of the substrate 40, of the two lines L1, L2 form the ports 5, 3 of serial input (high impedance access), the ends of the conductors 316, 312 of the other face 46 of the substrate 40 are connected together to form a port 4, or common point.

Du coté de l'autre extrémité du substrat 52 opposée à la première 50, l'extrémité du conducteurs 304 de la ligne L2, de la face 44 du substrat 40 et l'extrémité du conducteurs 316 de la ligne L1, de l'autre face 46 du substrat 40 sont reliées ensemble à un port 2 de sortie et l'extrémité du conducteur 312 de la ligne L2, de l'autre face du substrat 46 et l'extrémité du conducteur 308 de la ligne L1, de la face du substrat 44 sont reliées ensemble à un port 1, les ports 1 et 2 formant l'accès basse impédance parallèle du transformateur de la figure 3a.On the side of the other end of the substrate 52 opposite the first 50, the end of the conductors 304 of the line L2, the face 44 of the substrate 40 and the end of the conductors 316 of the line L1, the other face 46 of the substrate 40 are connected together to an output port 2 and the end of the conductor 312 of the line L2, the other face of the substrate 46 and the end of the conductor 308 of the line L1, the face of the substrate 44 are connected together to a port 1, the ports 1 and 2 forming the low parallel impedance access of the transformer of the figure 3a .

Cette autre réalisation des figures 4a et 4b, bien qu'elle permette une bonne tenue en puissance, comporte l'inconvénient être encombrante, en outre, le rapport de transformation d'impédance reste figé (théoriquement égal à 4).This other achievement of Figures 4a and 4b , although it allows good power handling, has the disadvantage of being cumbersome, moreover, the impedance transformation ratio remains fixed (theoretically equal to 4).

Un document US 6 396 362 A1 divulgue un transformateur d'impédances de type Balun en technologie multicouches compact. Un document US 2006/145786 A1 présente un filtre passe bande utilisant un convertisseur de type Balun. Un document WO 03/088410 A1 présente un réseau d'adaptation électrique pourvu d'une ligne de transformation d'impédance. Un document US 5 497 137 A présente un transformateur d'impédance du type « chip ».A document US 6,396,362 A1 discloses a Balun type impedance transformer in compact multilayer technology. A document US 2006/145786 A1 presents a bandpass filter using a Balun-type converter. A document WO 03/088410 A1 has an electrical matching network provided with an impedance transformation line. A document US 5,497,137 A has a chip type impedance transformer.

Pour diminuer le volume nécessaire à l'implantation d'un transformateur d'impédance RF, l'invention propose un transformateur d'impédances fonctionnant dans les bandes de fréquences VHF et UHF ayant un accès Eb basse impédance parallèle et un accès Eh haute impédance série, destiné à être connecté sur un circuit imprimé (130),
caractérisé en ce qu'il est constitué d'un circuit multicouche comportant un grand côté pour sa connexion sur le circuit imprimé, au mois trois couches, une première couche externe séparée d'une deuxième couche externe de même épaisseur par au moins une couche interne d'épaisseur au moins quatre fois supérieure à l'épaisseur des couches externes, chaque couche externe comportant deux faces métallisées pour former des conducteurs électriques, une face interne comportant un conducteur électrique interne et une face externe comportant un conducteur électrique externe en vis-à-vis du conducteur électrique interne pour former une ligne micro-ruban sur chacune des deux couches externes, les deux lignes micro-ruban étant symétriques par rapport à un plan central du circuit multicouche parallèle aux faces externes, le circuit multicouche comportant :

  • à deux extrémités en vis-à-vis des lignes micro-ruban, une connexion électrique respective entre l'extrémité du conducteur interne d'une des lignes micro-ruban et l'extrémité du conducteur externe de l'autre ligne micro-ruban pour réaliser l'accès Eb base impédance parallèle,
  • aux deux autres extrémités en vis-à-vis des dites lignes micro-ruban, une autre connexion électrique entre les extrémités des conducteurs électriques internes des deux lignes micro-ruban, pour réaliser l'accès Eh haute impédance série,
l'une et l'autre des extrémités des lignes micro-ruban, comportant respectivement l'accès Eb basse impédance parallèle et l'accès Eh haute impédance série, étant sur le grand côté du circuit multicouche et à proximité l'une de l'autre pour limiter la surface de connexion avec le circuit imprimé.To reduce the volume necessary for the implementation of an RF impedance transformer, the invention proposes an impedance transformer operating in the VHF and UHF frequency bands having a low parallel impedance Eb access and a high impedance series Eh access. intended to be connected to a printed circuit board (130),
characterized in that it consists of a multilayer circuit having a large side for its connection to the printed circuit, at least three layers, a first outer layer separated from a second outer layer of the same thickness by at least one inner layer of thickness at least four times greater than the thickness of the outer layers, each outer layer having two metallized faces to form electrical conductors, an inner face having an inner electrical conductor and an outer face comprising an electrical conductor external vis-à-vis the inner electrical conductor to form a micro-ribbon line on each of the two outer layers, the two micro-ribbon lines being symmetrical with respect to a central plane of the multilayer circuit parallel to the outer faces, the multilayer circuit comprising:
  • at two ends opposite the micro-ribbon lines, a respective electrical connection between the end of the inner conductor of one of the micro-ribbon lines and the end of the outer conductor of the other micro-ribbon line for realize access Eb base parallel impedance,
  • at the other two ends facing said micro-ribbon lines, another electrical connection between the ends of the internal electrical conductors of the two micro-ribbon lines, to achieve the high-impedance serial access,
one and the other of the ends of the microstrip lines, respectively comprising the low parallel impedance access Eb and the high impedance series access Eh, being on the long side of the multilayer circuit and close to one of the another to limit the connection area with the printed circuit.

Avantageusement les lignes micro-ruban symétriques comportent des impédances variant progressivement entre leurs deux extrémités d'une impédance faible à une impédance forte afin de modifier le rapport de transformation d'impédances.Advantageously, the symmetrical microstrip lines comprise impedances gradually varying between their two ends from a low impedance to a strong impedance in order to modify the impedance transformation ratio.

Dans une réalisation du transformateur d'impédances, pour des raisons technologiques, la couche interne est constituée de deux couches superposées, pour former un circuit multicouche à quatre couches parfaitement symétrique.In one embodiment of the impedance transformer, for technological reasons, the inner layer consists of two superimposed layers, to form a perfectly symmetrical four-layer multilayer circuit.

Dans une autre réalisation, les conducteurs électriques des lignes micro-ruban sont au moins partiellement sous forme de serpentin le long d'un même axe XX' parallèle au grand côté du circuit multicouche comportant les accès haute Eh et basse Eb impédance, pour diminuer la taille du circuit multicouche.In another embodiment, the electrical conductors of the micro-ribbon lines are at least partially in the form of a coil along the same axis XX 'parallel to the long side of the multilayer circuit having the high Eh and low Eb impedance accesses, to reduce the size of the multilayer circuit.

Dans une autre réalisation, les largeurs des conducteurs externes et internes varient progressivement, d'une de leurs extrémités à l'autre le long des lignes micro-ruban, d'une certaine largeur initiale vers une largeur plus faible finale pour obtenir la variation progressive de l'impédance faible vers l'impédance forte des lignes micro-ruban.In another embodiment, the widths of the outer and inner conductors vary progressively from one end to the other along the micro-ribbon lines, from a certain initial width to a final lower width to obtain the gradual variation of the low impedance towards the strong impedance of the micro-ribbon lines.

Dans une autre réalisation, les conducteurs électriques des lignes micro-ruban comportent :

  • des premières parties droites perpendiculaires au grand côté du circuit multicouche comportant les extrémités des conducteurs électriques formant les accès haute Eh et basse Eb impédance,
  • des deuxièmes parties, de part et d'autre des accès haute Eh et basse impédance Eb, en forme de serpentin selon un axe XX' parallèle au grand côté du circuit multicouche,
  • des troisièmes parties droites parallèles à l'axe XX' par-dessus les parties des conducteurs électriques en forme de serpentin.
In another embodiment, the electrical conductors of the micro-ribbon lines comprise:
  • first straight portions perpendicular to the long side of the multilayer circuit having the ends of the electrical conductors forming the high-Eh and low-Eb impedance accesses,
  • second parts, on both sides of the high-Eh and low-impedance Eb accesses, in the form of a coil along an axis XX 'parallel to the long side of the multilayer circuit,
  • third straight portions parallel to the axis XX 'over the portions of the electrical conductors in the form of a coil.

Dans une autre réalisation, le grand côté du circuit multicouche comporte un décrochement respectif, de part et d'autre des accès haute Eh et basse Eb impédance, de profondeur P ayant des bords parallèles au grand côté, les dits décrochements étant réalisés pour laisser de la place, sous le transformateur, à des composants éventuels situés sur le circuit imprimé (ou carte mère) sur lequel le transformateur est destiné à être connecté.In another embodiment, the long side of the multilayer circuit comprises a respective recess, on both sides of the high Eh and low Eb impedance accesses, P depth having parallel edges to the long side, said recesses being made to leave of the place, under the transformer, to potential components located on the printed circuit board (or motherboard) on which the transformer is intended to be connected.

Dans une autre réalisation, l'épaisseur de chacune des couches externes est de 100µm, l'épaisseur de la couche interne étant de 1600µm.In another embodiment, the thickness of each of the outer layers is 100 μm, the thickness of the inner layer being 1600 μm.

Dans une autre réalisation, la couche interne est formée par deux couches internes superposées de 800µm d'épaisseur chacune.In another embodiment, the inner layer is formed by two superimposed internal layers 800μm thick each.

Dans une autre réalisation, le rapport Rz de transformation entre l'impédance de l'accès Eh haute impédance et celle de l'accès Eb basse impédance peut être compris entre 2 et 9.In another embodiment, the transformation ratio Rz between the impedance of the high impedance access Eh and that of the low impedance access Eb may be between 2 and 9.

L'invention sera mieux comprise à l'aide d'un exemple de réalisation d'un transformateur d'impédance selon l'invention en référence aux figures indexées dans lesquelles,

  • la figure 1, déjà décrite, montre un exemple schématique de réalisation d'un étage amplificateur RF push-pull de l'état de l'art,
  • la figure 2a, déjà décrite, montre un schéma de principe d'un transformateur d'impédance à lignes coaxiales de l'état de l'art.
  • la figure 2b, déjà décrite, montre un schéma d'implantation simplifié d'un étage amplificateur RF,
  • Les figures 3a et 3b, déjà décrites, représentent des vues en coupe transversale et de face d'une réalisation d'un transformateur d'impédance de l'état de l'art,
  • la figure 4a, déjà décrite, montre une vue en perspective d'une autre réalisation d'un transformateur d'impédance de l'état de l'art,
  • la figure 4b, déjà décrite, une vue en coupe transversale du transformateur de la figure 4a,
  • les figures 5a et 5b montrent respectivement une vue de dessous et une vue de face d'un transformateur RF, selon l'invention, comportant un circuit multicouche,
  • la figure 5c montre une vue partielle en coupe transversale du circuit multicouche du transformateur de la figure 5a,
  • les figures 5d et 5e montrent l'interconnexion entre conducteurs du transformateur des figures 5a, 5b et 5c et,
  • la figure 6 montre une vue simplifiée en perspective d'un étage amplificateur RF comportant le transformateur selon l'invention de la figure 5b.
The invention will be better understood with the aid of an exemplary embodiment of an impedance transformer according to the invention with reference to the indexed figures in which,
  • the figure 1 , already described, shows a schematic embodiment of a state-of-the-art push-pull RF amplifier stage,
  • the figure 2a , already described, shows a block diagram of a state-of-the-art coaxial-line impedance transformer.
  • the figure 2b , already described, shows a simplified layout diagram of an RF amplifier stage,
  • The Figures 3a and 3b , already described, represent cross-sectional and front views of an embodiment of an impedance transformer of the state of the art,
  • the figure 4a , already described, shows a perspective view of another embodiment of an impedance transformer of the state of the art,
  • the figure 4b , already described, a cross-sectional view of the transformer of the figure 4a ,
  • the Figures 5a and 5b show respectively a bottom view and a front view of an RF transformer, according to the invention, comprising a multilayer circuit,
  • the figure 5c shows a partial cross-sectional view of the multilayer circuit of the transformer of the figure 5a ,
  • the Figures 5d and 5e show the interconnection between the transformer conductors of the Figures 5a, 5b and 5c and,
  • the figure 6 shows a simplified perspective view of an RF amplifier stage comprising the transformer according to the invention of the figure 5b .

Les figures 5a et 5b montrent respectivement une vue de dessous et une vue de face d'un transformateur RF, selon l'invention, comportant un circuit multicouche.The Figures 5a and 5b respectively show a bottom view and a front view of an RF transformer, according to the invention, comprising a multilayer circuit.

La figure 5c montre une vue partielle en coupe transversale du circuit multicouche du transformateur de la figure 5a.The figure 5c shows a partial cross-sectional view of the multilayer circuit of the transformer of the figure 5a .

Le transformateur des figures 5a à 5b comporte un substrat multicouche 60 de forme rectangulaire, de longueur L de hauteur H et d'épaisseur E, ayant deux grands côtés 62, 64 parallèles et deux petits côtés 66, 68 perpendiculaires aux grands côtés.The processor of the Figures 5a to 5b comprises a multilayer substrate 60 of rectangular shape, of length L of height H and of thickness E, having two long sides 62, 64 parallel and two small sides 66, 68 perpendicular to the long sides.

Le transformateur comporte, dans cet exemple de réalisation, trois couches superposées (voir figure 5c), une première couche externe Ce1 séparée par une deuxième couche externe Ce2, de même épaisseur ex, par une couche interne Ci d'épaisseur ec très supérieure à celle des couches externes.In this embodiment, the transformer comprises three superposed layers (see FIG. figure 5c ), a first outer layer Ce1 separated by a second outer layer Ce2, of the same thickness ex, by an inner layer Ci of ec thickness much greater than that of the outer layers.

On considère qu'une couche interne Ci d'épaisseur très supérieure ou sensiblement supérieure à l'épaisseur des couches externes Ce est réalisée lorsque l'épaisseur de cette couche interne Ci est au moins quatre fois supérieure à l'épaisseur de la couche externe.It is considered that an inner layer Ci of thickness that is much greater or substantially greater than the thickness of the outer layers Ce is produced when the thickness of this inner layer Ci is at least four times greater than the thickness of the outer layer.

A titre d'exemple, dans la réalisation du circuit multicouche représenté en coupe à la figure 5c, l'épaisseur de chacune des couches externes est ex = 100µm, l'épaisseur de la couche interne est ec = 1600µm. La couche interne Ci peut être aussi formée par deux couches internes superposées de 800µm chacune.By way of example, in the embodiment of the multilayer circuit shown in section at figure 5c , the thickness of each of the outer layers is ex = 100μm, the thickness of the inner layer is ec = 1600μm. The inner layer Ci may also be formed by two superposed internal layers of 800 .mu.m each.

La première couche externe Ce1 comporte deux faces métallisées, une face interne 70 ayant une métallisation formant un conducteur interne 72 et une face externe 74 ayant une métallisation formant un conducteur externe 76 en vis-à-vis du conducteur interne. Les deux conducteurs interne et externe 72, 76 de la première couche externe Ce1 forment une première ligne L1 de type micro-ruban.The first outer layer Ce1 has two metallized faces, an inner face 70 having a metallization forming an inner conductor 72 and an outer face 74 having a metallization forming an outer conductor 76 vis-à-vis the inner conductor. The two inner and outer conductors 72, 76 of the first outer layer Ce1 form a first line L1 microstrip type.

La deuxième couche externe Ce2 comporte deux faces métallisées, une face interne 80 ayant une métallisation formant un conducteur interne 82 et une face externe 84 ayant une métallisation formant un conducteur externe 86 en vis-à-vis du conducteur interne. Les deux conducteurs 82, 86 de la deuxième couche externe Ce2 forment une deuxième ligne L2 de type micro ruban symétrique de la première par rapport à un plan de symétrie PC du circuit multicouche 60, parallèle et à égale distance des faces externes 74, 84.The second outer layer Ce2 has two metallized faces, an inner face 80 having a metallization forming an inner conductor 82 and an outer face 84 having a metallization forming an outer conductor 86 vis-à-vis the inner conductor. The two conductors 82, 86 of the second outer layer Ce2 form a second line L2 of the micro-ribbon type symmetrical to the first with respect to a plane of symmetry PC of the multilayer circuit 60, parallel and equidistant from the outer faces 74, 84.

Dans cette réalisation les conducteurs électriques 72, 76, 82, 86 des couches externes sont superposés par l'intermédiaire des différentes couches Ce1, Ci, Ce2 du circuit multicouche 60.In this embodiment the electrical conductors 72, 76, 82, 86 of the outer layers are superimposed via the different layers Ce1, Ci, Ce2 of the multilayer circuit 60.

Dans le transformateur de la figure 5b :

  • d'une part, les métallisations des couches externes du circuit multicouches formant les conducteurs électriques 72, 76, 82, 86 ont des largeurs variant progressivement d'une extrémité à l'autre des lignes L1 et L2, d'une certaine largeur Le initiale vers une largeur plus faible Lf finale, pour obtenir une variation progressive de l'impédance des lignes L1, L2, entre leurs deux extrémités soit, d'une impédance faible Zb, à l'extrémité de largeur Le initiale, vers une impédance forte Zf vers l'autre extrémité de largeur finale Lf plus faible,
  • d'autre part, les extrémités des dits conducteurs électriques 72, 76, 82, 86 sont sur un même bord d'un grand côté 64 du circuit multicouche 60 dans une zone centrale dudit substrat multicouche (voir figure 5b).
In the transformer of the figure 5b :
  • on the one hand, the metallizations of the outer layers of the multilayer circuit forming the electrical conductors 72, 76, 82, 86 have widths varying progressively from one end to the other of the lines L1 and L2, of a certain width. to a smaller width Lf final, to obtain a progressive variation of the impedance of the lines L1, L2, between their two ends is, a low impedance Zb, the end of width The initial, towards a strong impedance Zf towards the other end of the final width Lf weaker,
  • on the other hand, the ends of said electrical conductors 72, 76, 82, 86 are on the same edge of a long side 64 of the multilayer circuit 60 in a central zone of said multilayer substrate (see figure 5b ).

Les métallisations des couches externes Ce1, Ce2 sont réalisées pour obtenir une longueur L réduite du substrat multicouche 60 mais en respectant une hauteur maximale H à ne pas dépasser pour l'intégration ou la connexion, à un circuit imprimé (ou carte mère), sur lequel le transformateur sera connecté, comme décrit par la suite.The metallizations of the outer layers Ce1, Ce2 are made to obtain a reduced length L of the multilayer substrate 60 but respecting a maximum height H not to be exceeded for integration or connection, to a printed circuit (or motherboard), on which the transformer will be connected to, as described later.

A cet effet, dans cette réalisation, les conducteurs électriques des lignes L1, L2 comportent :

  • des premières parties droites 100, 102 perpendiculaires au grand côté 64 du circuit multicouche 60 comportant les extrémités des conducteurs électriques formant les accès haute Eh et basse Eb impédance,
  • des deuxièmes parties 104, 106, de part et d'autre des accès haute Eh et basse impédance Eb, en forme de serpentin selon un axe XX' parallèle au grand côté 64 du circuit multicouche 60,
  • des troisièmes parties droites 108 parallèles à l'axe XX' par-dessus les parties des conducteurs électriques en forme de serpentin,
tel que représenté à la figure 5b.For this purpose, in this embodiment, the electrical conductors of lines L1, L2 comprise:
  • first straight portions 100, 102 perpendicular to the long side 64 of the multilayer circuit 60 having the ends of the electrical conductors forming the high-Eh and low-Eb impedance accesses,
  • second parts 104, 106, on either side of the high Eh and low impedance Eb accesses, in the form of a coil along an axis XX 'parallel to the long side 64 of the multilayer circuit 60,
  • third straight portions 108 parallel to the axis XX 'over the portions of the coil-shaped electrical conductors,
as represented in figure 5b .

Le circuit multicouche 60 comporte, du côté des accès haute Eh et basse Eb impédance du transformateur, un décrochement respectif 110, 112 de part et d'autre des dits accès, de profondeur P, chacun des décrochements ayant des bords parallèles aux grands côtés 62, 64.The multilayer circuit 60 comprises, on the side of the high Eh and low Eb impedance accesses of the transformer, a respective recess 110, 112 on either side of said accesses, of depth P, each of the recesses having edges parallel to the long sides 62 , 64.

Les décrochements 110, 112 sont réalisés pour laisser la place, sous le transformateur, à des composants éventuels câblés sur le circuit imprimé (ou carte mère) sur lequel le transformateur est destiné à être connecté.The recesses 110, 112 are made to leave room, under the transformer, for any components wired on the printed circuit board (or motherboard) on which the transformer is intended to be connected.

Le circuit multicouche 60 comporte des vias d'interconnexion des extrémités des conducteurs électriques pour réaliser des accès flottants, l'accès Eh haute impédance série, à une extrémité des lignes L1 et L2 et l'accès Eb basse impédance parallèle à l'autre extrémité des lignes L1 et L2.The multilayer circuit 60 comprises interconnecting vias of the ends of the electrical conductors for making floating accesses, the high-impedance series access Eh at one end of the lines L1 and L2 and the low-impedance parallel access Eb at the other end. lines L1 and L2.

Les figures 5d et 5e montrent l'interconnexion entre conducteurs du transformateur des figures 5a, 5b et 5c.The Figures 5d and 5e show the interconnection between the transformer conductors of the Figures 5a, 5b and 5c .

L'extrémité moins large d'un conducteur interne 72 d'une des lignes L1 est reliée, par des vias 114 à travers la couche centrale Ci du substrat, à l'extrémité en vis-à-vis du conducteur interne 82 de l'autre ligne L2, pour réaliser l'accès Eh haute impédance série.The narrower end of an inner conductor 72 of one of the lines L1 is connected, via vias 114 through the central layer Ci of the substrate, to the end facing the inner conductor 82 of the other line L2, to achieve the access Eh high impedance series.

L'extrémité plus large du conducteur internes 72 de la ligne L1 est reliée par des vias 116 à l'extrémité du conducteur externe 86 en vis-à-vis de la ligne L2 pour former un des deux pôles de l'accès Eb basse impédance parallèle, l'autre pôle étant réalisé par la connexion, par des vias 118, de l'extrémité la plus large du conducteur interne 82 de la ligne L2 au conducteur externe 76, en vis-à-vis, de la ligne L1.The wider end of the inner conductor 72 of the line L1 is connected by vias 116 to the end of the outer conductor 86 vis-à-vis the line L2 to form one of the two poles of the access Eb low impedance parallel, the other pole being formed by the connection, via vias 118, the widest end of the inner conductor 82 of the line L2 to the outer conductor 76, vis-à-vis the line L1.

Les lignes L1, L2 du transformateur ont une largeur variable afin d'obtenir des rapports Rz d'impédance (ou de transformation) différents (en général, supérieurs) au rapport de 4 obtenu par des lignes coaxiales ou micro-ruban ayant une largeur constante.The lines L1, L2 of the transformer have a variable width in order to obtain different Rz impedance (or transformation) ratios (generally, higher) to the ratio of 4 obtained by coaxial lines or micro-ribbon having a constant width .

Les lignes de largeur variable du transformateur selon l'invention permettent d'obtenir un rapport Rz de transformation entre l'impédance de l'accès Eh haute impédance et celle de l'accès Eb basse impédance pouvant être compris entre 2 et 9.The lines of variable width of the transformer according to the invention make it possible to obtain a transformation ratio Rz between the impedance of the high impedance access Eh and that of the low impedance access Eb which can be between 2 and 9.

La manière de superposer les deux paires de conducteurs réalisant les lignes L1, L2 à l'aide d'un substrat épais permet de limiter au maximum le couplage entre elles afin d'éviter des interactions parasites. Pour cela, la couche de substrat centrale Ci est sensiblement plus épaisse que les couches de substrat externes Ce1, Ce2 du circuit multicouche (rapport d'épaisseur de l'ordre de 16 dans la réalisation présentée).The manner of superimposing the two pairs of conductors carrying lines L1, L2 with the aid of a thick substrate makes it possible to limit as much as possible the coupling between them in order to avoid parasitic interactions. For this, the central substrate layer Ci is substantially thicker than the external substrate layers Ce1, Ce2 of the multilayer circuit (thickness ratio of the order of 16 in the embodiment presented).

D'autre part, dans cette réalisation, la largeur des conducteurs électriques internes 72, 82 est plus grande que la largeur des conducteurs électriques externes 76, 86 de façon à obtenir un meilleur découplage entre les deux lignes L1 et L2.On the other hand, in this embodiment, the width of the inner electrical conductors 72, 82 is greater than the width of the external electrical conductors 76, 86 so as to obtain a better decoupling between the two lines L1 and L2.

La couche interne Ci peut être aussi réalisée par deux couches collées de même épaisseur, ce qui revient à réaliser un substrat multicouche à quatre couches parfaitement symétrique de fabrication simple et donnant un produit stable dans le temps.The inner layer Ci can also be made by two bonded layers of the same thickness, which amounts to producing a multilayer substrate with four perfectly symmetrical layers of simple manufacture and giving a stable product over time.

Dans cet exemple de réalisation, l'impédance de l'accès Eh haute impédance série du transformateur est choisie légèrement inférieure à 50Ω, par exemple 46Ω, afin de disposer des lignes L1, L2 plus larges pour une meilleure tenue en puissance du transformateur. Dans ce cas, l'impédance Zf d'entrée, du côté impédance forte, de chaque ligne L1 ou L2 est de 23Ω.In this exemplary embodiment, the impedance of the serial high impedance access of the transformer is chosen to be slightly less than 50 Ω, for example 46 Ω, in order to have larger lines L1, L2 for better power handling of the transformer. In this case, the input impedance Zf, on the strong impedance side, of each line L1 or L2 is 23Ω.

L'impédance Zb de l'accès impédance faible de chaque ligne L1, L2 est choisie de 17Ω pour obtenir une impédance d'accès Eb basse impédance du transformateur de 8,5Ω.The impedance Zb of the low impedance access of each line L1, L2 is chosen to be 17Ω to obtain an impedance access impedance Eb low impedance of the 8.5Ω transformer.

La variation de largeur des pistes (ou métallisations) entre l'accès Eh haute impédance et l'accès Eb basse impédance du transformateur permet, dans cette réalisation, de passer de 46Ω à 8.5 ohms, soit un rapport d'impédance de l'ordre de 5.5.The variation in the width of the tracks (or metallizations) between the high impedance access Eh and the low impedance access Eb of the transformer makes it possible, in this embodiment, to go from 46 ohm to 8.5 ohm, ie an impedance ratio of the order 5.5.

Une variante de réalisation du transformateur selon l'invention consiste dans l'utilisation de matériau ferrite placé dans une partie centrale des conducteurs électriques des lignes L1, L2 afin d'étendre la bande passante vers les fréquences basses, mais cela au détriment du coût.An alternative embodiment of the transformer according to the invention consists in the use of ferrite material placed in a central part of the electrical conductors of the lines L1, L2 in order to extend the bandwidth towards the low frequencies, but this to the detriment of the cost.

La figure 6 montre une vue simplifiée en perspective d'un étage amplificateur RF comportant le transformateur selon l'invention tel que représenté à la figure 5b. Le transformateur de la figure 6 est sous la forme d'une carte fille 128.The figure 6 shows a simplified perspective view of an RF amplifier stage comprising the transformer according to the invention as shown in FIG. figure 5b . The transformer of the figure 6 is in the form of a daughter card 128.

L'étage amplificateur comporte un circuit imprimé (ou carte mère) 130 sur lequel est monté un boîtier 132 comportant deux transistors pour montage en push-pull.The amplifier stage comprises a printed circuit (or motherboard) 130 on which is mounted a housing 132 comprising two transistors for push-pull mounting.

La carte fille 128 est enfichée dans la carte mère 130 et seuls 4 points de brasage 150, 152 (deux points seulement sont montrés sur la figure) sur les extrémités des conducteurs électriques externes 72, 76, des faces externes 74, 80 du circuit multicouche 60 sont nécessaires pour raccorder les lignes L1, L2 du transformateur à la carte mère. Ces points de brassage permettent à la fois la connexion et l'immobilisation de la carte fille 128 sur la carte mère 130, une forme asymétrique de la carte fille 128 assurant un détrompage aisé.The daughter card 128 is plugged into the motherboard 130 and only 4 brazing points 150, 152 (only two points are shown on the figure) on the ends of the external electrical conductors 72, 76, external faces 74, 80 of the multilayer circuit 60 are required to connect the lines L1, L2 of the transformer to the motherboard. These patch points allow both the connection and the immobilization of the daughter card 128 on the motherboard 130, an asymmetrical shape of the daughter card 128 providing easy coding.

Le mode de réalisation du transformateur proposé en exemple aux figures 5a et 5b est basé sur un dessin de circuit permettant l'emploi d'une carte fille (circuit multicouche 60) destinée à être reportée verticalement sur la carte mère 130 amplificatrice de la figure 6. L'épaisseur de cette carte fille est de l'ordre de 2mm.The embodiment of the transformer proposed as an example for Figures 5a and 5b is based on a circuit diagram allowing the use of a daughter card (multilayer circuit 60) to be carried vertically on the motherboard 130 amplifying the figure 6 . The thickness of this daughter card is of the order of 2mm.

Le dessin des paires de pistes pour connecter le transformateur selon l'invention permet de réduire l'encombrement de cette carte fille au minimum. Notamment, les accès haute impédance Eh et basse impédance Eb du transformateur 128 sont fortement rapprochés afin de diminuer la longueur d'implantation sur la carte mère 130.The design of pairs of tracks to connect the transformer according to the invention reduces the size of this daughter card to a minimum. In particular, the high impedance Eh and low impedance Eb accesses of the transformer 128 are closely approximated in order to reduce the implantation length on the motherboard 130.

Dans la réalisation des figures 5a et 5b la longueur de la partie centrale du substrat comportant les accès haute Eh et basse impédance Eb est de 8.5 mm alors que la longueur nécessaire à la connexion du transformateur à lignes enroulées Ls2 de la figure 2b est bien plus importante (de l'ordre de 15 mm).In the realization of Figures 5a and 5b the length of the central portion of the substrate having the high Eh and low impedance Eb access is 8.5 mm while the length required for the connection of the Ls2 wound line transformer of the figure 2b is much larger (about 15 mm).

Enfin, la forme asymétrique de la carte fille 128 (soit le transformateur d'impédance) est adaptée à la disposition des éléments implantés sur la carte mère 130. Ainsi, grâce aux décrochements 110, 112 du circuit multicouche 60 la carte fille 128 passe au-dessus d'éléments 160, 162 d'adaptation d'impédance des transistors du boîtier 132 brasés sur la carte mère 130 tout en permettant leur accès.Finally, the asymmetrical shape of the daughter card 128 (the impedance transformer) is adapted to the arrangement of the elements implanted on the motherboard 130. Thus, thanks to the recesses 110, 112 of the multilayer circuit 60 the daughter card 128 goes to above impedance matching elements 160, 162 of the soldered transistors 132 on the motherboard 130 while allowing access thereto.

Le transformateur en circuit multicouche selon l'invention présente les avantages suivants :

  • un encombrement réduit en particulier au niveau des connexions sur la carte mère par rapport aux transformateurs de l'état de l'art, notamment du fait de la topologie proposée. Celle-ci autorise une découpe de carte permettant de surplomber des éléments du circuit de la carte mère (ou du circuit d'interconnexion) tout en respectant des contraintes drastiques de hauteur imposées dans certains équipements
  • excellente reproductibilité par rapport aux solutions actuelles câblées manuellement,
  • baisse des coûts des amplificateurs ou dispositifs RF utilisants le transformateur selon l'invention car des opérations de câblage manuel sont remplacées par un report simplifié d'une carte fille (le transformateur) elle même assez simple et petite. Le coût de la carte fille (et gain associé) dépend des quantités produites
The multilayer circuit transformer according to the invention has the following advantages:
  • a reduced space in particular at the level of the connections on the motherboard compared to transformers of the state of the art, in particular because of the proposed topology. This allows cutting card for overhanging elements of the circuit of the motherboard (or the interconnection circuit) while respecting drastic height constraints imposed in certain equipment
  • excellent reproducibility compared to today's manually wired solutions,
  • lower costs of amplifiers or RF devices using the transformer according to the invention because manual wiring operations are replaced by a simplified report of a daughter card (the transformer) itself quite simple and small. The cost of the daughter card (and associated gain) depends on the quantities produced

Le transformateur d'impédances selon l'invention est adapté pour passer des puissances importantes, de l'ordre de quelques watts, avec peu de pertes radiofréquences.The impedance transformer according to the invention is adapted to pass large powers, of the order of a few watts, with little radio frequency losses.

Claims (10)

  1. An impedance transformer operating in the VHF and UHF frequency bands, having a low-impedance access Eb and a high-impedance access Eh, intended to be connected to a printed circuit (130),
    said impedance transformer being comprised of at least:
    - a multilayer circuit (60) comprising a long side (64) for its connection to the printed circuit, at least three layers, a first outer layer (Ce1) separated from a second outer layer (Ce2) of the same thickness (ex) by at least one inner layer (Ci) of thickness (ec) at least four times greater than the thickness (ex) of the outer layers, each outer layer having two metallised faces to form electrical conductors, an internal face (70, 80) comprising an internal electrical conductor (72, 82) and an external face (74, 84) including an external electrical conductor (76, 86) facing the internal electrical conductor to form a microstrip line (L1, L2) on each of the two outer layers (Ce1, Ce2), the two microstrip lines (L1, L2) being symmetrical with respect to a central plane (PC) of the multilayer circuit (60) to the external faces (74, 84), the multilayer circuit comprising:
    - an electrical connection (116, 118) between the end of the internal conductor (72, 82) of one (L1) of the microstrip lines and the end of the external conductor (76, 86) of the other (L2) microstrip line to produce said low- impedance access Eb, said two ends facing one another;
    - another electrical connection (114) between the two other ends of the internal electrical conductors (72, 82) of the two microstrip lines (L1, L2), to produce said high-impedance access Eh, said other ends facing one another;
    said low-impedance access Eb and said high-impedance access Eh being on the long side (64) of the multilayer circuit (60) and close to each other to limit the area of connection with the printed circuit (130).
  2. The VHF/UHF impedance transformer according to Claim 1, characterised in that the symmetrical microstrip lines (L1, L2) have impedances the value of which varies progressively between their two ends, from a low impedance (Zb) to a high impedance (Zf) in order to modify the impedance transformation ratio.
  3. The VHF/UHF impedance transformer according to either of Claims 1 or 2, characterised in that, for technological reasons, the inner layer (Ci) is comprised of two superposed layers to form a perfectly symmetrical multilayer circuit with four layers.
  4. The VHF/UHF impedance transformer according to any of Claims 1 to 3, characterised in that the electrical conductors (72, 76, 82, 86) of the microstrip lines (L1, L2) are at least partially of serpentine shape along a common axis XX' parallel to the long side (64) of the multilayer circuit including the high-impedance access Eh and the low-impedance access Eb to reduce the size of the multilayer circuit.
  5. The VHF/UHF impedance transformer according to any of Claims 2 to 4, characterised in that the widths of the external and internal conductors vary progressively from one of their ends to the other along the microstrip lines (L1, L2), from a certain initial width (Le) to a smaller final width (Lf) to obtain the progressive variation from said low impedance (Zb) to said high impedance (Zf) of the microstrip lines (L1, L2).
  6. The VHF/UHF impedance transformer according to any of Claims 1 to 5, characterised in that the electrical conductors of the microstrip lines (L1, L2) comprise:
    - straight first parts (100, 102) perpendicular to the long side (62) of the multilayer circuit (60) including the ends of the electrical conductors forming the high-impedance access Eh and the low-impedance access Eb,
    - second parts (104, 106), on either side of the high-impedance access Eh and the low-impedance access Eb, of serpentine shape along an axis XX' parallel to the long side (62) of the multilayer circuit (60),
    - straight third portions (108) parallel to the axis XX' over the portions of the electrical conductors of serpentine shape.
  7. The VHF/UHF impedance transformer according to any of Claims 1 to 6, characterised in that the long side (64) of the multilayer circuit (60) comprises a respective cut-out (110, 112) on either side of the high-impedance access Eh and the low-impedance access Eb, of depth P, having edges parallel to the long side (62), said cut-outs (110, 112) being made to leave room, beneath the transformer, for any components located on the printed circuit (130) (or motherboard) to which the transformer is intended to be connected.
  8. The VHF/UHF impedance transformer according to any of Claims 1 to 7, characterised in that the thickness (ex) of each of the outer layers is 100 µm, the thickness (ec) of the inner layer (Ci) being 1600 µm.
  9. The VHF/UHF impedance transformer according to Claim 8, characterised in that the inner layer (Ci) is formed by two superposed inner layers each 800 µm thick.
  10. The VHF/UHF impedance transformer according to any of Claims 1 to 9, characterised in that the transformation ratio Rz between the impedance of the high-impedance access Eh and the low-impedance access Eb can be between 2 and 9.
EP10787421.6A 2009-12-04 2010-12-03 Compact planar vhf/uhf power impedance Not-in-force EP2507865B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0905875A FR2953650B1 (en) 2009-12-04 2009-12-04 COMPACT PLANAR VHF / UHF POWER IMPEDANCE TRASFORMER
PCT/EP2010/068808 WO2011067368A1 (en) 2009-12-04 2010-12-03 Compact planar vhf/uhf power impedance

Publications (2)

Publication Number Publication Date
EP2507865A1 EP2507865A1 (en) 2012-10-10
EP2507865B1 true EP2507865B1 (en) 2018-05-23

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EP10787421.6A Not-in-force EP2507865B1 (en) 2009-12-04 2010-12-03 Compact planar vhf/uhf power impedance

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US (1) US8610529B2 (en)
EP (1) EP2507865B1 (en)
FR (1) FR2953650B1 (en)
MY (1) MY159930A (en)
SG (1) SG181171A1 (en)
WO (1) WO2011067368A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114464422B (en) * 2022-02-25 2025-06-13 昆山九华电子设备厂 A transmission line transformer with a non-integer square ratio
CN114914066B (en) * 2022-04-27 2024-09-27 昆山九华电子设备厂 Transmission line transformer connected by printed circuit board

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Publication number Priority date Publication date Assignee Title
US4035695A (en) * 1974-08-05 1977-07-12 Motorola, Inc. Microelectronic variable inductor
JP2773617B2 (en) * 1993-12-17 1998-07-09 株式会社村田製作所 Balun Trance
US5426404A (en) * 1994-01-28 1995-06-20 Motorola, Inc. Electrical circuit using low volume multilayer transmission line devices
US6278340B1 (en) * 1999-05-11 2001-08-21 Industrial Technology Research Institute Miniaturized broadband balun transformer having broadside coupled lines
US6396362B1 (en) * 2000-01-10 2002-05-28 International Business Machines Corporation Compact multilayer BALUN for RF integrated circuits
JP3780414B2 (en) * 2001-04-19 2006-05-31 株式会社村田製作所 Multilayer balun transformer
JP2003087008A (en) * 2001-07-02 2003-03-20 Ngk Insulators Ltd Multilayer dielectric filter
DE10217387B4 (en) * 2002-04-18 2018-04-12 Snaptrack, Inc. Electrical matching network with a transformation line
TWI256194B (en) * 2004-12-30 2006-06-01 Delta Electronics Inc Filter assembly with unbalanced to balanced conversion

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Also Published As

Publication number Publication date
EP2507865A1 (en) 2012-10-10
SG181171A1 (en) 2012-07-30
MY159930A (en) 2017-02-15
US8610529B2 (en) 2013-12-17
US20130169402A1 (en) 2013-07-04
WO2011067368A1 (en) 2011-06-09
FR2953650B1 (en) 2012-12-14
FR2953650A1 (en) 2011-06-10

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