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EP1150271A2 - Verfahren und Einrichtung zur Steuerung einer Flüssigkristallanzeige - Google Patents

Verfahren und Einrichtung zur Steuerung einer Flüssigkristallanzeige Download PDF

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Publication number
EP1150271A2
EP1150271A2 EP20010109767 EP01109767A EP1150271A2 EP 1150271 A2 EP1150271 A2 EP 1150271A2 EP 20010109767 EP20010109767 EP 20010109767 EP 01109767 A EP01109767 A EP 01109767A EP 1150271 A2 EP1150271 A2 EP 1150271A2
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EP
European Patent Office
Prior art keywords
luminance data
value
output
input
curve
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP20010109767
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English (en)
French (fr)
Inventor
Robert Audrow Nash
Lewis Anthony Latanzi
Thomas Rocco Walsh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DRS Naval Power Systems Inc
Original Assignee
Eaton Corp
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Application filed by Eaton Corp filed Critical Eaton Corp
Publication of EP1150271A2 publication Critical patent/EP1150271A2/de
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0261—Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/041—Temperature compensation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/16—Determination of a pixel data signal depending on the signal applied in the previous frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel

Definitions

  • the present invention generally relates to driving a video display panel, such as a liquid crystal display, and more particularly to an apparatus and method for adjusting a video signal to reduce flicker generated by the display.
  • a viewable display screen such as a liquid crystal display (LCD) panel
  • LCDs suffer from a disadvantage known as flicker.
  • Flicker is a variation (drop or rise) in the average luminance across an LCD when the LCD displays a moving, but constant luminance, image.
  • One particular cause of flicker is an asymmetry between the rise time and decay time of each pixel of the LCD. Viewing a display screen with flicker can cause considerable eye strain and fatigue.
  • a flickering display is nearly unacceptable.
  • An example of such an application is a display where an operator is required to pay close attention to the display for hours at a time without distraction.
  • the example display is a normally white active matrix LCD (AMLCD).
  • AMLCD normally white active matrix LCD
  • the same principle applies to most types of LCDs, including normally black LCDs.
  • FIG. 1a shows an image 200.
  • the image 200 is a black pixel or group of black pixels (i.e., fully dark pixels) displayed on at least a portion of a display 202 where the surrounding pixels are white (i.e., fully bright).
  • the display 202 is being driven by a video signal instructing to display the image 200 at a particular location, or first location 204.
  • the example image 200 illustrated in FIG. 1a corresponds to time t 0 in FIG. 2.
  • the video signal instructs the display 202 to move the image 200 to a second location 206.
  • the term move is used loosely, since the image 200 does not physically move. Rather, the video signal instructs the display 202 to make the pixels at the first location 204 fully bright and make the pixels at the second location 206 fully dark.
  • Other examples of image movement include the scrolling of text or the movement of a cursor on a computer display, and an underwater object moving on a sonar display.
  • the video signal data for the pixels at the first location 204 is a step function rising from fully dark (zero percent luminance) to fully bright (100% luminance) in a single frame.
  • the video signal data for the pixels at the second location 206 is a step function decaying from fully bright to fully dark.
  • Curve 208 represents the response of a pixel(s) to the rising step function
  • curve 210 represents the response of a pixel(s) to the decaying step function.
  • the responses are similar to that of a low pass filter; however, the low pass filter model is only a crude approximation.
  • the actual LCD response is a function of the actual behavior and inertia of the liquid crystal in the display.
  • the rising pixels will have a rise time t r with a duration longer than a decay time t d of the decaying pixels.
  • the rise time t r and decay time t d for a specific display, and for a specific pixel of a specific display, will vary. However, rise times are typically in the range of 30 milliseconds (ms) to 60 ms and decay times are typically in the range of 8 ms to 20 ms. It is noted that depending on the specific display, the decay time t d can be longer than the rise time t r . For instance, normally black panels often exhibit longer decay times. It should be apparent that longer decay times will still result in flicker as the display has asymmetrical rise and decay times.
  • FIG. 1b illustrates the image 200 at time t 1 in FIG. 2 when the pixels at the first location 204 are still transitioning from fully dark to fully bright and when the pixels at the second location 206 are still transitioning from fully bright to fully dark.
  • the lingering image at location 204 is referred to as an artifact.
  • Curve 212 in FIG. 2 represents the average luminance of the display for the first and second locations 204, 206.
  • the average luminance of the display due to the described luminance of the first and second locations 204, 206, as one rises and one falls in luminance will be constant.
  • the average luminance curve 212 is not constant.
  • the exemplary average luminance curve 212 has a negative flicker component. This variation is perceptible to humans and detracts from the performance of the display. It is noted that the average luminance curve for LCDs where the decay time is longer than the rise time will have a positive flicker component. Positive flicker components are equally perceptible and also detract from the performance of the display.
  • FIG. 1c illustrates the image 200 at time t 2 in FIG. 2 when the pixels at the first location 204 have transitioned to fully bright and when the pixels at the second location 206 have transitioned to fully dark.
  • Flicker can be exacerbated by several factors dependent on the incoming video signal.
  • An example situation that causes increased perceptible flicker includes sequentially moving an image through a series of adjacent pixels such that each pixel in the series of pixels is transitioned from light to dark (or vice versa) and becomes a luminance producing artifact as the image moves.
  • Another example situation is moving a relatively large or intricate image where the luminance of the artifacts in the aggregate results in a large flicker component.
  • This EP patent discloses using a subtractor to subtract a predicted present luminance from an incoming video signal.
  • a processing block is used to derive first ( ⁇ R) and second ( ⁇ C) correction values from the output of the subtractor and the predicted present luminance.
  • ⁇ C is a correction value to be added to the predicted present luminance in order to reach a chosen luminance which is output to the display panel.
  • ⁇ R is the predicted value with which the luminance will have changed after the next correction period when ⁇ C is added to the predicted present luminance, taking into account the parameters of the display screen.
  • the correction values are based on first order low pass filter equations such that the video signal output to the display panel attempts to increase the actual display luminance in a manner to significantly match an inverted version of an uncorrected decaying curve. More specifically, the corrected response attempts to follow a series of exponential curves from one correction period to the next.
  • the method and apparatus disclosed in the foregoing EP patent suffer from at least two significant disadvantages. Predictions of the luminance at the end of each correction period are made and used in the computation of the next output value. The predictions will be different from the actual displayed luminance and, even after one correction period, an accumulation of error between the predicted luminance and the actual luminance will be present. The error can achieve significant levels where the correction becomes ineffective to prevent flicker.
  • the second disadvantage is maintaining good contrast between the image as it moves and partially illuminated adjacent pixels (e.g., 20% to 50% luminance) which serves as a second image or as a background image.
  • the method and apparatus disclosed in the foregoing EP patent gradually increase the luminance of a pixel being made bright over the course of six or more correction periods.
  • the target pixel will have a brightness similar to that of the partially illuminated adjacent pixels and may become indistinguishable from the adjacent pixels for a longer period of time than is desirable.
  • the result is poor contrast and a potential loss of displayed information, especially if the target pixel moves again before the end of all the correction periods used to make the target pixel fully bright or fully dark.
  • the invention is a video data correction circuit for adjusting an input video signal intended to be displayed on a display, the display having at least one pixel, the pixel having a luminance rise time and a luminance decay time, one of the rise time and decay time being longer than the other, the video data correction circuit having a video data processor having a first video data input, a second video data input and a video data output, the first video data input connected to receive an input video signal having a series of input luminance data values, the output providing an output video signal having a series of output luminance data values, the second input being connected to receive a present output luminance data value, and the video data processor determines a difference between a present input luminance data value and the present output luminance data value, if the difference indicates that the input luminance data is changing in a prescribed direction the video data processor adjusts the present output luminance data value by an adjustment function to determine a next output luminance data value.
  • the invention is a method of adjusting an input video signal intended to be displayed on a display, the display having at least one pixel, the pixel having a luminance rise time and a luminance decay time, one of the rise time and the decay time being longer than the other, the method having the steps of deriving a difference between a value of a present input luminance data value and a value of a present output luminance data value; and adjusting the present output luminance data value by an adjustment function to determine a next output luminance data value when the difference indicates that the input luminance data is changing in a prescribed direction.
  • the invention is a method of adjusting an input video signal intended to be displayed on a display, the display having at least one pixel, the pixel having a luminance rise time and a luminance decay time, one of the rise time and the decay time being longer than the other, the method having the steps of inputting a present input luminance data value into an addressable memory device; inputting a present output luminance data value into the addressable memory device; and outputting a next output luminance data value from one of a plurality of addresses of the addressable memory device, each address corresponding to the current input luminance data value and the current output luminance data value, and values of the next output luminance data value stored at each address being based on an adjustment of the present output luminance data by an adjustment function when a difference between the present input luminance data value and the present output luminance data value indicates that the input luminance data is changing in a prescribed direction.
  • a liquid crystal display (LCD) video data correction circuit 10 is illustrated.
  • the LCD video data correction circuit 10 acts as a discrete time recursive filter to minimize flicker which otherwise results from the fluid dynamics, or some other function or characteristic, of the liquid crystal in the LCD panel causing an asymmetry between the rise time and decay time and between the rise rate and decay rate of the each pixel of the LCD.
  • AMLCD normally white active matrix LCD
  • the video data correction circuit 10 can be adapted for use with other LCD panels, such as normally black LCDs, twisted nematic, cholesteric and smectic LCDs, encapsulated liquid crystal LCDs, network liquid crystal LCDs, etc.
  • the video data correction circuit can also be used for non-LCD type displays, such as CRTs, electro-luminescent displays, plasma displays, etc.
  • An input video signal for display on an LCD 12 is received by an analog interface board 14.
  • the input video signal is an analog signal which is converted to a 24 bit RGB digital video signal by the analog interface board 14.
  • the digital video signal is output from the analog interface board 14 into a video data processor 16, such as a logic device implemented with hardware or software.
  • the video data processor 16 is a dual port random access memory (RAM) 17 (FIG. 4) rather than a logic device. In either arrangement, the video data processor 16 acts to compensate for the non-linearity and fluid dynamics of the liquid crystal in the LCD 12.
  • the 24 bit digital video signal has 8 bits representing red, 8 bits representing green and 8 bits representing blue. As is known, controlling the luminance of adjacent red, green and blue pixels allows for the generating of color images.
  • the invention described herein can also be used for monochromatic displays.
  • the video data correction circuit 10 operates on each 8 bit grouping of each frame of the video signal simultaneously. However, to discuss the invention in a clear and concise manner, the discussion herein will be limited to discussing one series of 8 bit digital words which represent a series of frames of the video data signal for a selected pixel as the video data is processed by the video data correction circuit 10. As should be apparent, an 8 bit digital word has a decimal equivalent ranging from zero to 255.
  • digital video data having a decimal equivalent of zero represents a desired luminance (also referred to as transmittance depending on the type of LCD panel) of 0%, or fully dark.
  • Digital video data having a decimal equivalent of 255 represents a desired luminance of 100%, or fully bright.
  • the video data processor 16 has a first input port 18 and a second input port 19.
  • the incoming video signal is connected to the first port 18 of the video data processor 16 and the bits of data associated with the presently arriving frame is considered present input video data, or X n .
  • the video data processor 16 is programmed with a process 20 to modify the present input data X n to output an associated frame, or set of frames, referred to herein as present output video data, or Y n .
  • the present output video data Y n is received by the LCD panel 12 via a personality module.
  • the personality module is used to properly address the particular LCD panel being used.
  • the present input data X n is modified, or corrected, so that the present output data Y n drives, or refreshes, the LCD in a particular manner to reduce flicker.
  • the process 20 used to modify the present input data X n will be described in more detail below.
  • the LCD response to an uncorrected video signal, or luminance data is illustrated.
  • the luminance data (curve 21) is a step function rising from decimal equivalent of zero, or fully dark, to a decimal equivalent of 255 (100% luminance), or fully bright, then decaying from the decimal equivalent of 255 back to zero.
  • the LCD will respond (curve 22) to the increase in luminance data by transitioning from dark to light.
  • the LCD pixel being instructed to become bright will transition to bright over a rise time, or t r .
  • the rise time t r can be about 30 milliseconds (ms) to about 60 ms.
  • the LCD response will transition to dark over a decay time, or t d .
  • the decay time t d can be about 8 ms to about 20 ms. Since the rise time t r and the decay time t d are not equal, the LCD panel will have a tendency to flicker. It is noted that the instantaneous slope of curve 22 during increasing luminance (i.e., rise rate) and during decreasing luminance (i.e., decay rate) are also not equal. Therefore, even if the rise time t r and the decay time t d were equal, flicker could be present if the rise rate and decay rate were unequal.
  • the present output data Y n is also received by a frame buffer 24.
  • the frame buffer 24 temporarily stores the most recent frame of the video data output from the video data processor 16.
  • This data which is Y n , is input into a buffer, such as a first- in/first-out (FIFO) buffer 26.
  • the FIFO buffer 26 queues the present video output data Y n so that the present video output data Y n can be input to the video data processor 16 at the prompting of a programmable logic controller 28.
  • the frame buffer 24 and FIFO buffer 26 can be combined into a single buffer or frame data storage device.
  • the programmable logic 28 is a logic device which can be implemented in hardware, such as one or more complex programmable logic devices (CPLD) or a microprocessor, or in software.
  • the programmable logic 28 communicates with the analog interface board 14 to receive synchronization signals, clocking signals and control signals.
  • the programmable logic 28 controls the storage and retrieval of video data and effectively clocks the video data as the video data progresses through the components of the video data correction circuit 10.
  • the programmable logic 28 can also control the refresh rate of the luminance data output to the personality module and LCD 12 by selecting from different modes of operation.
  • the modes include a frame locked mode, where the refresh rate of the present output data Y n directed to the display is locked at a steady rate matched to the incoming video signal frame rate (e.g., 60 Hz or a frame period of 17 ms).
  • the frame locked mode is preferable when the content of the video signal is moving quickly, for example video data changing every frame or every few frames. In this situation the frame locked mode assists in displaying moving images that are temporally uniform (i.e., not jerky).
  • the modes also include a free running mode, where the refresh rate is updated to be tuned with respect to the response of the LCD panel at a specified temperature.
  • the free running mode is appropriate for slow moving images, for example video data changing over a number of frames such that a difference between the frame rate of the incoming video signal and refresh rate of the output luminance data to the LCD would be imperceptible to the viewer.
  • the free running mode assists in providing enhanced compensation against flicker.
  • the LCD refresh rate may have three output refresh frames for each incoming video signal frame.
  • the video data correction circuit 10 has a processor 30 for calculating values to be used in the process 20, or for calculating values stored in a recursion matrix look up table 32 (FIG. 4) which is part of the RAM 17.
  • a processor 30 for calculating values to be used in the process 20, or for calculating values stored in a recursion matrix look up table 32 (FIG. 4) which is part of the RAM 17.
  • FOG. 4 recursion matrix look up table
  • These values may be dependent on external factors, such as user selectable preferences. Some users are more tolerant of flicker than others. Also, flicker perception can depend on factors such as the user's viewing angle, ambient light and other environmental factors. Therefore, it is desirable to make video data corrections based on user preferences which take into account factors such as a the user's tolerance, height, seating habits and ambient light.
  • the processor 30 receives data related to the external factors from an input device 34, such as a keyboard, switches, sensors, a microphone, a mouse, an interactive computer menu, a memory device or combination of devices making up the input device 34.
  • the data can be in the form of actual predetermined values known to the user. Alternatively, the data may be selected by the user from a menu of values.
  • the user can simply instruct the processor 30 to increase or decrease flicker compensation and the processor will calculate the appropriate compensation values.
  • the user can enter information related to the foregoing flicker dependent factors and the processor 30 can calculate the appropriate compensation values.
  • the processor 30 also may receive program instructions stored in the input device, or from some other source; an example of such program instructions is described below with respect to FIG. 6.
  • the processor 30 also compensates for temperature of the LCD. As is known, the performance of LCD panels, including the rise and decay times of each pixel, is dependent on the temperature of the pixels. Accordingly, the video data correction circuit 10 has a temperature sensor 36, such as a glass temperature sensor, for sensing the temperature of the display in at least one location on the display. Temperature information is provided to the processor 30 which updates the values calculated by the processor 30 based on the sensed temperature.
  • a temperature sensor 36 such as a glass temperature sensor
  • a programmed operating loop of the processor 30 is illustrated. After starting up in step 40, the operating loop will determine if user preference information has been received from the input device 34 in step 42. If user preference information has been entered, the processor 30 will access the information and read the information into a memory in step 44. If user preference information has not been entered, a default user preference information will be stored in the memory or the last input user preference information stored will be retained in the memory. Next, the processor 30 determines the temperature of the display, or a temperature gradient across the display, from the information provided by the temperature sensor 36 in step 46.
  • the processor 30 will calculate the values based on the user preference information stored in the memory and the sensed temperature(s) (step 50). Once the values are calculated, the processor 30 will communicate the values to the video data processor 16. The video data processor 16 stores the values for operational use in memory addresses. After calculating and storing the values, the operating loop will repeat itself.
  • step 48 the processor will determine whether a difference between the presently sensed temperature(s) and the temperature(s) sensed during a prior temperature measurement exceeds a predetermined threshold in step 52. If the threshold is not exceeded, the operating loop will repeat itself. If the threshold is exceeded, the processor will recalculate the values in step 50 using the presently sensed temperature(s). As one skilled in the art should appreciate, the measurement of LCD temperature and compensation for temperature variation is optional and these steps of the programmed operating loop can be omitted.
  • the ideal luminance response curve 64 is the inverse of the longer of the uncorrected LCD response to a rising step function or the uncorrected LCD response to a decaying step function.
  • the ideal luminance response curve 64 is selected in this manner since the sum of the values along the ideal curve 64 and the associated uncorrected LCD response at every point in time during the transition results in a constant average luminance. Since the example display has a longer uncorrected rising time tr, the ideal response curve 64 is the inverse of the LCD response to a rising step function.
  • the invention is not limited to slowing the faster LCD response to have an area under the corrected LCD response to be approximately equal to the area under an ideal curve where the ideal curve is the inverse of the slower uncorrected response curve.
  • Simple modifications can be implemented to speed the slower LCD response to have an area under the corrected LCD response to be approximately equal to the area under an inverse of the faster uncorrected response curve.
  • Other modifications can be made to slow the faster uncorrected response and to concurrently speed up the slower uncorrected response to match the corrected responses to a preselected ideal rising and decaying response.
  • the correction circuit 10 does not adjust the luminance data for incoming video data instructing the LCD to transition in the direction of the longer uncorrected response. Correction is made to the shorter of the uncorrected rising or decaying response so that the overall average luminance across the display is made fairly constant as one pixel is instructed to decay and another pixel is instructed to rise to give the appearance that an image is moving.
  • the rising time t r is longer than the decaying time t d . Therefore, when the incoming video data signal has successive frames instructing the LCD to increase the luminance of a pixel, the video data for that pixel will be passed to the personality module and LCD 12 without alteration.
  • the correction circuit 10 will adjust the video data for that pixel.
  • the decaying time t d is longer than the rise time t r , the correction circuit 10 should be configured to pass decaying luminance data to the personality module and LCD 12 without correction and correct rising luminance data in the same manner as described herein.
  • the area under a curve can be obtained by taking the integral of the function defining the curve. If the curve is made up of several segments where each segment can be defined by a function, the area under the overall curve can be derived by taking the integral of each segment's function and adding the results.
  • the overall actual LCD response to the progressive steps of the luminance data will overshoot the ideal curve (e.g., the first illustrated luminance data step 60a and corresponding LCD response 62a) and at some instances the overall actual LCD response to the progressive steps of the luminance data will undershoot the ideal curve (e.g., the third and forth illustrated luminance data steps 60b, 60c and corresponding LCD response 62b, 62c).
  • the LCD can be made to respond so that the area under the actual LCD response curve 62 is close enough to the area under the ideal decay curve 64 such that the average luminance of a moving image stays constant enough so that perceptible flicker is minimized or eliminated. It is noted that, in mathematical terms, some flicker will occur as the image moves since the average luminance across the display will not be actually constant during the corrected decay time t d'.
  • a more preferred approach adjusts the present input data X n by an adjustment function, such as a slope and offset function or a percentage offset function.
  • the adjustment function uses linear approximations and many possible equations may be employed to achieve the desired result.
  • the present input X n and the present output Y n are compared to derive the next output Y n+1 .
  • Y n+1 equals X n when (X n -Y n ) ⁇ 0.
  • Y n+1 is output from the video data processor 16, it becomes the present output data, or Y n , for display on the LCD 12 and for comparison with the next incoming video data frame.
  • Table 1 illustrates a situation where the incoming video signal instructs a pixel to rise in luminance by stepping the video data from a decimal equivalent of zero to a decimal equivalent of 255.
  • the next output video data Y n+1 in response to a present input data X n will be the present output data adjusted by the slope and offset correction equation.
  • One appropriate slope and offset function, or equation is (M(X n - Y n ) + B)(X n - Y n ).
  • M is a slope variable and B is an offset variable, each being derived by the processor 30 based on factors such as the user preferences, LCD panel temperature as is well known in the art, the duration of the longer of the rise time t r or the decay time t d , the input data frame rate and the output data refresh frame rate.
  • Y n+1 Y n + (M(X n - Y n ) + B)(X n - Y n )
  • Y n+1 equals X n when (Y n -X n ) is greater than or equal to zero and Y n+1 equals Y n -(M(Y n -X n )+B)(Y n -X n ) when (Y n -X n ) is less than zero.
  • table 2 illustrates an example situation where the incoming video signal instructs a pixel to decay in luminance by stepping the video data from a decimal equivalent of 255 to a decimal equivalent of 0 when M is 0.0025 and B is 1. It is noted that the values are decimal equivalents of 8 bit digital words. Therefore, the results of the equations are rounded down (preferably up for LCD panels where t d is longer than t r ) to the nearest integer such that the decimal result has a binary equivalent. Once the result of the calculation, or Y n+1 , is less than decimal 1, the output data signal will have a binary equivalent of all zeros representing fully dark video data.
  • Table 3 illustrates another example situation where the incoming video signal instructs a pixel to decay in luminance by stepping the video data from a decimal equivalent of 255 to a decimal equivalent of 0 when M is 0.002 and B is 1.
  • Frame Present Input Data (X n ) Present Output Data (Y n ) Difference Data (X n -Y n )
  • Next Output Data (Y n+1 ) n 255 255 0 255 n+1 0 255 -255 130 n+2 0 130 -130 34 n+3 0 34 -34 2 n+4 0 2 -2 0 n+5 0 0 0 0 0 0
  • the process 20 can be programmed such that if the calculated next output data Y n+1 is less than a selected threshold, for example 15 to 80, the actual next output data will be set to zero.
  • a selected threshold for example 15 to 80
  • This technique can be advantageous in instances when adjacent pixels may be fully or partially illuminated. In this situation it is desirable that the transition from fully bright to fully dark takes as little time as possible to increase contrast between the transitioning and adjacent pixels, while also attempting to increase the area under the actual LCD response curve to reduce flicker.
  • At least a first adjusted value in response to decaying luminance data is intended to drive the actual LCD response to have a greater luminance value than the luminance value of the ideal curve at the time just before the next adjusted refresh data frame is output. This will increase the area under the actual LCD response curve 62, but, to enhance contrast, the subsequent refresh frames can be adjusted to drive the LCD to fully dark at a faster rate than the ideal decay curve 64.
  • decimal equivalent response of the corrected luminance data curve 60 to a decaying input video step function would be the following series of luminance values: 255, 98 and zero.
  • the decimal equivalent response of the corrected luminance data curve 60 to a decaying input video step function would have the following series of luminance values: 255, 51, 10, 2 and zero.
  • a modified percentage offset technique is particularly useful in situations where the uncorrected rise time t r has a duration between one and two update frame periods and the uncorrected decay time t d is shorter or just slightly longer than the update frame period.
  • the video data processor 16 instead of allowing the luminance data to be reduced by the selected percentage at a time, when the difference between X n and Y n reaches a certain threshold the video data processor 16 will set the next output data Y n+1 to the present input data X n .
  • the threshold can be set as high as the maximum decimal equivalent value of C*Y n minus one.
  • the decimal equivalent response of the corrected luminance data curve 60 to a decaying input video step function would have the following series of luminance values: 255, 51 and zero.
  • This process 20 brings the LCD response of the target pixel to the desired luminance level by the end of two refresh frames, but the value of C can be selected to add area under the actual decay response curve to reduce flicker.
  • the corrected luminance data reduces the LCD response from higher to lower luminance over the course of several refresh frames.
  • the frame rate of the output video data can be the same as the frame rate of the incoming video data or independent of the incoming video data frame rate. For example, if the output video data frame rate is selected to be faster than the incoming video data, more than one luminance data value can be output to the personality module and LCD 12 before the arrival of the next incoming frame. This allows for greater flexibility in the quantity and value of the correction luminance data points used to correct the LCD response.
  • the invention is not limited to slowing the faster LCD response to have an area under the corrected LCD response to be approximately equal to the area under an ideal curve where the ideal curve is the inverse of the slower uncorrected response curve.
  • Simple modifications can be implemented to speed the slower LCD response to have an area under the corrected LCD response to be approximately equal to the area under an inverse of the faster uncorrected response curve.
  • Other modifications can be made to slow the faster uncorrected response and to concurrently speed up the slower uncorrected response to match the corrected responses to a preselected ideal rising and decaying response.
  • FIG. 3 illustrates the functional operation of the video data processor 16.
  • the video data processor 16 has a subtractor 66 for determining the difference between the present input data X n and the present output data Y n .
  • the processor 30 will calculate compensation values, such as M, B and/or C, for use by the process 20.
  • the compensation values are adjusted based on factors such as the user preferences, LCD panel temperature as is well known in the art, the duration of the longer of the rise time t r or the decay time t d , the input data frame rate and the output data refresh frame rate.
  • the process 20 will, in turn, derive output data values using the present input data, the difference result as determined by the subtractor 66 and the compensation values obtained from the processor 30.
  • the process 20 will pass each frame of the input data X n to the output of the video data processor 16 so that the next output frame Y n+1 is the same as X n . If, however, the difference result is negative or negative but above a certain threshold, the process 20 will adjust the present output data value Y n by the appropriate correction amount as derived from the adjustment equation so that the next output frame Y n+1 is a corrected output data value to control the LCD luminance response.
  • the video data processor 16 is continually making calculations to derive the value of the next output pixel value Y n+1 . Since the frame rate of the incoming video data is relatively fast (e.g., 60 Hz) and the frame rate of the output data may be even faster, the software or hardware logic processor implementing the video data processor 16 is preferably faster enough to calculate the output data at the selected frame rates.
  • FIG. 4 illustrates an alternative arrangement for the video data processor 16 without continual calculation of the output data. Rather, the alternative arrangement uses an addressable memory device, such as the dual port RAM 17 having a look up table 32 to derive the output data.
  • the processor 30 not only calculates the values used in the adjustment equations, such as M, B and or C, but precalculates the next output data value Y n+1 for each possible pair of present input data X n and present output data Y n values using the same calculation method described above. The results for Y n+1 are stored in the look up table 32.
  • the video frame data making up the present input data X n are entered into the RAM 17 through the first port 18.
  • the video frame data making up the present output data Y n are entered into the RAM 17 through the second port 19.
  • the RAM will match the present input value X n and the present output value Y n to addresses in the look up table and extract the next output value Y n+1 stored at the address matching X n and Y n .
  • the next output value Y n+1 will then be output from the RAM 17 to the personality module and LCD 12 for display.
  • the next output value Y n+1 will also be sent to the frame buffer 24 and FIFO 26 to be used in the next comparison between present input value X n and the present output value Y n .
  • the values stored in the look up table 32 can be dynamically updated in response to changes in user preferences, temperature or the like.
  • the values of Y n+1 stored in the look up table 32 for each possible pair of present input data X n and present output data Y n are derived from experimental results from monitoring an LCD panel, or a combination of calculated results, experimental results and/or computer modeled results.
  • the logic and memory devices can be embodied in software, in hardware or a combination of software and hardware. These devices can be combined into one device or separate devices. If embodied in hardware, the logic devices can be implemented as a circuit that employs any one or a combination of technologies, including but not limited to, discrete logic circuits having logic gates for implementing various logic functions upon an application of one or more data signals, an application specific integrated circuit having appropriate logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a microprocessor or other components. Such technologies are generally well known by those skilled in the art and, consequently, are not described in detail herein.
  • each block may represent a module, segment, or portion of code that comprises one or more executable instructions to implement the specified logical function(s).
  • each block may represent a circuit or a number of interconnected circuits to implement the specified logical function(s).
  • FIGS. 3, 4 and 6 illustrate a specific order of execution, it is understood that the order of execution may differ from that which is depicted. For example, the order of execution of two or more blocks may be altered relative to the order shown. Also, two or more blocks may be executed concurrently or with partial concurrence. It is understood that all such variations are within the scope of the present invention.

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  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
EP20010109767 2000-04-28 2001-04-20 Verfahren und Einrichtung zur Steuerung einer Flüssigkristallanzeige Withdrawn EP1150271A2 (de)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1449193A1 (de) * 2001-11-26 2004-08-25 Samsung Electronics Co., Ltd. Flüssigkristallanzeige und verfahren zu ihrer ansteuerung
EP1505568A2 (de) 2003-08-06 2005-02-09 Samsung Electronics Co., Ltd. Anzeigegerät mit reduziertem Flimmern
WO2005020205A3 (en) * 2003-08-22 2005-04-21 Philips Intellectual Property Method and arrangement for calibrating an arrangement for driving image-reproducing means subject to inertia
EP2375402A3 (de) * 2010-04-08 2012-02-08 Samsung Electronics Co., Ltd. LCD Anzeigevorrichtung und LCD Ansteuerverfahren

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1449193A1 (de) * 2001-11-26 2004-08-25 Samsung Electronics Co., Ltd. Flüssigkristallanzeige und verfahren zu ihrer ansteuerung
US7095393B2 (en) 2001-11-26 2006-08-22 Samsung Electronics Co., Ltd. Liquid crystal display and a driving method thereof
EP1505568A2 (de) 2003-08-06 2005-02-09 Samsung Electronics Co., Ltd. Anzeigegerät mit reduziertem Flimmern
WO2005020205A3 (en) * 2003-08-22 2005-04-21 Philips Intellectual Property Method and arrangement for calibrating an arrangement for driving image-reproducing means subject to inertia
EP2375402A3 (de) * 2010-04-08 2012-02-08 Samsung Electronics Co., Ltd. LCD Anzeigevorrichtung und LCD Ansteuerverfahren

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