Classifications

• • A—HUMAN NECESSITIES
  • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
  • A01C—PLANTING; SOWING; FERTILISING
  • A01C7/00—Sowing
  • A01C7/08—Broadcast seeders; Seeders depositing seeds in rows
  • A01C7/10—Devices for adjusting the seed-box ; Regulation of machines for depositing quantities at intervals
  • A01C7/102—Regulating or controlling the seed rate
  • A01C7/105—Seed sensors

Definitions

• Seed control apparatus with a microprocessor
• the invention relates to an apparatus with a microprocessor for the control of seeders.
• the apparatus contains photoelectric seed detectors, a device for measuring the path covered, display and operating organs, data and control busses, buffers, a power supply unit as well as a microprocessor system consisting of the interface circuits being inserted between the detector organs and the data bus.
• the seed control apparatus has to deliver a series of information to the operator in course of the seeding process.
• a failure e.g. the clogging of the seed-pipe, the number of the seeds being less or more, than the prescribed quantity, the serial number of the defective furrow splitter, the effective number of stocks and stock distance
• the number of the defective furrow splitters are to be signalled visually and/or acoustically.
• the seed control apparatuses must be compatible with several types of seeding machines,i.e. they could be adapted to different furrow splitter numbers and diverse diameters of the land wheels.
• the seed control apparatuses are meeting the requirements enumerated above in such a manner that the parameters qualifying the performance of seeding technologies are controlled by counting the pulses coming from the photoelectric seed detectors and the signal transmitters measuring the distance covered, and in case of failures the occurence, the place and extent are signalled visually and/or acoustically.
• the usual components i.e. the programmable counter circuits recommended by the manufacturers of the microprocessor are used for performing the counting functions.
• These counter circuits - contained in a house - comprise one to three relatively high speed counter stages of 8 to 16 bits.
• the aim of the invention is to eliminate the above mentioned drawbacks and to develop a seed control apparatus which is able to realize the required functions with less components, accordingly with a lower cost expenditure with the simultaneous increase of operational safety.
• the microprocessor is programmed in addition to the usual functions for counting operations, furtheron between the microprocessor system and the dececting organs a programm able parallel input/output interface circuit for interfacing the output of the detecting organs to the microprocessor as well as for each of the detecting organs a signal level interface unit are inserted.
• a preferred embodiment of the invention contains signal level interface units which are formed as pulse shaping units,
• monostable flip-flops are applied as signal level interfaces or pulse shaping units respectively.
• Figure 1 is a block diagram showing a traditional counter interface inserted between the detectors and the microprocessor system
• FIG. 2 is a block diagram showing the interface circuit according to the invention.
• Figure 3 the time diagram of the pulse train output of a detector
• FIG. 4 is a block diagram showing the seed control apparatus containing the interface circuit according to the invention.
• FIG. 5 shows schematically the connections between the seed control apparatus with the microprocessor according to the invention and the seeding machine.
• the traditional counter interface circuit demonstrat ted in figure 1 is processing, e .g . in case of a corn seeder with eighteen furrow splitters, the output signals of the signal transmitters not shown here of eighteen seed detectors for the microprocessor system and contains 18 + 2 interface elements 1, 18 precounters 2 and 6 + 1 programmable counter interfaces 3 comprising three 16-bit counter stages.
• the price of the totally seven programmable counter interfaces 3 represents a considerable proportion of the investment costs of the apparatus.
• the capacity of these expensive circuits, at least as regards to the counter frequency, is far not utilized, since the frequency of the output pulses of the seed detectors are generally of the order of magnitude of lo 100 Hz.
• the microprocessor informs said interface circuit 5 via the control bus 7 which input 8 out of the twenty-four inputs should be enabled in a given moment.
• the microprocessor informs said interface circuit 5 via the control bus 7 which input 8 out of the twenty-four inputs should be enabled in a given moment.
• one programmable interface IC 3 e.g. INTEL 8255
• IC 3 e.g. INTEL 8255
• the signal level interface units 4 it seems to be expedient to design the signal level interface units 4 so that they should be suitable for pulse shaping when operated e.g. in a monostable mode of operation.
• the time constant t m of the monostable circuit i.e. the increased pulse width should surpass the original pulse width t j , but should be shorter, than the half of the period of repetition T, at the same time, the periodical time of sampling T m should be shorter, than T m .
• T the minimal periodical time of the signal to be processed
• t j the original width of the signalling pulse
• t m the period of the signal, increased by the mono flop circuit
• T m periodical time of sampling.
• the instruction execution time being characteristic for the microprocessor, the number of the signal transmitters and detectors, the magnitude, number and time requirement of the task set for the microprocessor are restricting the period of sampling to be obtained by interrupts and thus the highest frequency of the signal to be received.
• One of the embodiments of the seed control apparatus containing the interface circuit according to the invention is based on a microprocessor and the belonging program and data memories fitting into the system, together with the programmable parallel interfaces with the programmable 22 + 24 lines, the display and operating organs.
• the block diagram of the apparatus is shown in Figure 4, while Figure 5 illustrates the connection thereof with the seeder.
• Figure 4 shows the block diagram of the seed control apparatus 9.
• the signals coming from the seed detectors arrive at the signal level interface unit 4, the inputs 8 of which are connected. to the programmable parallel interface circuit 5.
• the interface unit 21 for the output measuring the rotation of the land wheel, as well as the interface unit 22 detecting the elevated position of the seeding machine are also connected to the interface circuit 5.
• the interface circuit 5 is connected to the microprocessor 10 via the data bus 6 and the control bus 7, the microprocessor contains the program memory 11 and the data memory 12.
• the address bus 13 forwards the addresses required for the operation of the program memory 11 and the data memory 12, respectively.
• the parallel interface 14 is also connected to the microprocessor 10, via the busses mentioned above, and displays 15 and the operating organs 16 are connected thereto.
• FIG. 5 shows the block diagram of the completely assembled seeding machine system.
• the seed control apparatus 9 itself is arranged on the trailer 17 and it is connected via the collecting cable 18, the connecting cable 19 and the connectors 20 to the interface circuits 5 belonging to the single groups of furrow splitters; the interface circuits are furthermore connected to the signal level interface units 4 of the seed detectors (not illustrated here), to the interface units 21 measuring the distance covered and the matching units 22 sensing the elevated position.
• the apparatus solves in an economical manner the processing of the pulse train of a frequency of max. 50 Hz, arriving from the seed detectors of the seeder with eighteen furrow splitters and of further six informations, it performs the shift of the eighteen decimal counters each with six characters and two characters, respectively, simultaneously delivering various informations requiring relatively complicated arithmetic routines.

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• Life Sciences & Earth Sciences (AREA)
• Soil Sciences (AREA)
• Environmental Sciences (AREA)
• Testing Or Calibration Of Command Recording Devices (AREA)

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• 1982
  • 1982-11-05 EP EP19820903180 patent/EP0093731A1/de not_active Withdrawn
  • 1982-11-05 WO PCT/HU1982/000058 patent/WO1983001850A1/en not_active Ceased

Non-Patent Citations (1)

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