DE69023765D1 - Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur. - Google Patents
Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur.Info
- Publication number
- DE69023765D1 DE69023765D1 DE69023765T DE69023765T DE69023765D1 DE 69023765 D1 DE69023765 D1 DE 69023765D1 DE 69023765 T DE69023765 T DE 69023765T DE 69023765 T DE69023765 T DE 69023765T DE 69023765 D1 DE69023765 D1 DE 69023765D1
- Authority
- DE
- Germany
- Prior art keywords
- production
- components
- field effect
- effect transistors
- resulting structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
- H10D88/01—Manufacture or treatment
-
- H10W20/0698—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/164—Three dimensional processing
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP90480109A EP0469215B1 (de) | 1990-07-31 | 1990-07-31 | Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69023765D1 true DE69023765D1 (de) | 1996-01-04 |
| DE69023765T2 DE69023765T2 (de) | 1996-06-20 |
Family
ID=8205836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69023765T Expired - Fee Related DE69023765T2 (de) | 1990-07-31 | 1990-07-31 | Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur. |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5112765A (de) |
| EP (1) | EP0469215B1 (de) |
| JP (1) | JPH0652783B2 (de) |
| DE (1) | DE69023765T2 (de) |
Families Citing this family (63)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2852679B2 (ja) * | 1989-09-01 | 1999-02-03 | 富士通株式会社 | 半導体装置及びその製造方法 |
| US5173442A (en) * | 1990-07-23 | 1992-12-22 | Microelectronics And Computer Technology Corporation | Methods of forming channels and vias in insulating layers |
| EP0469214A1 (de) * | 1990-07-31 | 1992-02-05 | International Business Machines Corporation | Verfahren zur Herstellung geschichteter Leiter- und/oder Widerstandsbereiche in Multiebenen-Halbleiterbauelementen und daraus resultierende Struktur |
| KR970009274B1 (ko) * | 1991-11-11 | 1997-06-09 | 미쓰비시덴키 가부시키가이샤 | 반도체장치의 도전층접속구조 및 그 제조방법 |
| US6013565A (en) * | 1991-12-16 | 2000-01-11 | Penn State Research Foundation | High conductivity thin film material for semiconductor device |
| US5200880A (en) * | 1991-12-17 | 1993-04-06 | Sgs-Thomson Microelectronics, Inc. | Method for forming interconnect for integrated circuits |
| US5332913A (en) * | 1991-12-17 | 1994-07-26 | Intel Corporation | Buried interconnect structure for semiconductor devices |
| US5156987A (en) * | 1991-12-18 | 1992-10-20 | Micron Technology, Inc. | High performance thin film transistor (TFT) by solid phase epitaxial regrowth |
| US5266516A (en) * | 1992-01-02 | 1993-11-30 | Chartered Semiconductor Manufacturing Pte Ltd | Method for making electrical contact through an opening of one micron or less for CMOS technology |
| DE69211329T2 (de) * | 1992-03-27 | 1996-11-28 | Ibm | Verfahren zum Herstellen von pseudo-planaren Dünnschicht PFET-Anordnungen und hierdurch erzeugte Struktur |
| US5322804A (en) * | 1992-05-12 | 1994-06-21 | Harris Corporation | Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
| JP2665644B2 (ja) * | 1992-08-11 | 1997-10-22 | 三菱電機株式会社 | 半導体記憶装置 |
| EP0585059B1 (de) * | 1992-08-21 | 1999-05-12 | STMicroelectronics, Inc. | Verfahren zur Herstellung einer Halbleiter-Speicherstruktur vom vertikalen Typ und nach dem Verfahren hergestellte Struktur |
| US5244837A (en) * | 1993-03-19 | 1993-09-14 | Micron Semiconductor, Inc. | Semiconductor electrical interconnection methods |
| US5348899A (en) * | 1993-05-12 | 1994-09-20 | Micron Semiconductor, Inc. | Method of fabricating a bottom and top gated thin film transistor |
| US5616934A (en) * | 1993-05-12 | 1997-04-01 | Micron Technology, Inc. | Fully planarized thin film transistor (TFT) and process to fabricate same |
| US5858821A (en) * | 1993-05-12 | 1999-01-12 | Micron Technology, Inc. | Method of making thin film transistors |
| US5650655A (en) * | 1994-04-28 | 1997-07-22 | Micron Technology, Inc. | Integrated circuitry having electrical interconnects |
| DE4435461C2 (de) * | 1993-10-06 | 2001-09-20 | Micron Technology Inc N D Ges | Dünnfilmtransistor und dessen Herstellverfahren |
| US5391505A (en) * | 1993-11-01 | 1995-02-21 | Lsi Logic Corporation | Active device constructed in opening formed in insulation layer and process for making same |
| US6242772B1 (en) * | 1994-12-12 | 2001-06-05 | Altera Corporation | Multi-sided capacitor in an integrated circuit |
| JP3022744B2 (ja) * | 1995-02-21 | 2000-03-21 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US5658829A (en) * | 1995-02-21 | 1997-08-19 | Micron Technology, Inc. | Semiconductor processing method of forming an electrically conductive contact plug |
| JPH0955440A (ja) * | 1995-08-17 | 1997-02-25 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
| US5675185A (en) * | 1995-09-29 | 1997-10-07 | International Business Machines Corporation | Semiconductor structure incorporating thin film transistors with undoped cap oxide layers |
| US5637525A (en) * | 1995-10-20 | 1997-06-10 | Micron Technology, Inc. | Method of forming a CMOS circuitry |
| US5718800A (en) * | 1995-11-08 | 1998-02-17 | Micron Technology, Inc. | Self-aligned N+/P+ doped polysilicon plugged contacts to N+/P+ doped polysilicon gates and to N+/P+ doped source/drain regions |
| US5830798A (en) * | 1996-01-05 | 1998-11-03 | Micron Technology, Inc. | Method for forming a field effect transistor |
| US5808319A (en) * | 1996-10-10 | 1998-09-15 | Advanced Micro Devices, Inc. | Localized semiconductor substrate for multilevel transistors |
| US6107189A (en) * | 1997-03-05 | 2000-08-22 | Micron Technology, Inc. | Method of making a local interconnect using spacer-masked contact etch |
| US6143640A (en) * | 1997-09-23 | 2000-11-07 | International Business Machines Corporation | Method of fabricating a stacked via in copper/polyimide beol |
| US6043507A (en) * | 1997-09-24 | 2000-03-28 | Micron Technology, Inc. | Thin film transistors and methods of making |
| US6271542B1 (en) | 1997-12-08 | 2001-08-07 | International Business Machines Corporation | Merged logic and memory combining thin film and bulk Si transistors |
| US6921962B1 (en) * | 1998-12-18 | 2005-07-26 | Texas Instruments Incorporated | Integrated circuit having a thin film resistor located within a multilevel dielectric between an upper and lower metal interconnect layer |
| KR100296126B1 (ko) | 1998-12-22 | 2001-08-07 | 박종섭 | 고집적 메모리 소자의 게이트전극 형성방법 |
| KR100299386B1 (ko) | 1998-12-28 | 2001-11-02 | 박종섭 | 반도체 소자의 게이트 전극 형성방법 |
| JP3988342B2 (ja) | 1998-12-29 | 2007-10-10 | 株式会社ハイニックスセミコンダクター | 半導体素子のゲート電極形成方法 |
| US6346470B1 (en) * | 1999-04-19 | 2002-02-12 | Advanced Micro Devices, Inc. | Method for reducing electromigration in semiconductor interconnect lines |
| SG87934A1 (en) * | 2000-06-30 | 2002-04-16 | Chartered Semiconductor Mfg | A method of fabricating cmos devices featuring dual gate structures and a high dielectric constant gate insulator layer |
| US6303418B1 (en) | 2000-06-30 | 2001-10-16 | Chartered Semiconductor Manufacturing Ltd. | Method of fabricating CMOS devices featuring dual gate structures and a high dielectric constant gate insulator layer |
| US6853072B2 (en) * | 2002-04-17 | 2005-02-08 | Sanyo Electric Co., Ltd. | Semiconductor switching circuit device and manufacturing method thereof |
| US7122849B2 (en) * | 2003-11-14 | 2006-10-17 | International Business Machines Corporation | Stressed semiconductor device structures having granular semiconductor material |
| DE102005063092B3 (de) * | 2005-12-30 | 2007-07-19 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit einer Kontaktstruktur mit erhöhter Ätzselektivität |
| US8129256B2 (en) * | 2008-08-19 | 2012-03-06 | International Business Machines Corporation | 3D integrated circuit device fabrication with precisely controllable substrate removal |
| JP5781720B2 (ja) | 2008-12-15 | 2015-09-24 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| KR101996773B1 (ko) * | 2009-10-21 | 2019-07-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| KR101829074B1 (ko) | 2009-10-29 | 2018-02-13 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| KR102321812B1 (ko) * | 2009-10-29 | 2021-11-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| KR101753927B1 (ko) | 2009-11-06 | 2017-07-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US8780629B2 (en) | 2010-01-15 | 2014-07-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and driving method thereof |
| CN106847816A (zh) * | 2010-02-05 | 2017-06-13 | 株式会社半导体能源研究所 | 半导体装置 |
| WO2012002186A1 (en) | 2010-07-02 | 2012-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US8735892B2 (en) | 2010-12-28 | 2014-05-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device using oxide semiconductor |
| US9490241B2 (en) * | 2011-07-08 | 2016-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising a first inverter and a second inverter |
| JP5754334B2 (ja) | 2011-10-04 | 2015-07-29 | 富士通セミコンダクター株式会社 | 半導体装置及び半導体装置の製造方法 |
| US9117916B2 (en) | 2011-10-13 | 2015-08-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising oxide semiconductor film |
| JP2015084418A (ja) | 2013-09-23 | 2015-04-30 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP6570817B2 (ja) | 2013-09-23 | 2019-09-04 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| JP5856227B2 (ja) * | 2014-05-26 | 2016-02-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| KR102329267B1 (ko) * | 2014-09-29 | 2021-11-22 | 삼성디스플레이 주식회사 | 박막트랜지스터 기판, 이를 구비한 디스플레이 장치, 박막트랜지스터 기판 제조방법 및 디스플레이 장치 제조방법 |
| KR102481037B1 (ko) | 2014-10-01 | 2022-12-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 배선층 및 그 제작 방법 |
| US9773787B2 (en) | 2015-11-03 | 2017-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, memory device, electronic device, or method for driving the semiconductor device |
| US10388654B2 (en) * | 2018-01-11 | 2019-08-20 | Globalfoundries Inc. | Methods of forming a gate-to-source/drain contact structure |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0020135A1 (de) * | 1979-05-29 | 1980-12-10 | Massachusetts Institute Of Technology | Dreidimensionale Integration durch graphische Epitaxie |
| US4489478A (en) * | 1981-09-29 | 1984-12-25 | Fujitsu Limited | Process for producing a three-dimensional semiconductor device |
| US4430365A (en) * | 1982-07-22 | 1984-02-07 | International Business Machines Corporation | Method for forming conductive lines and vias |
| JPS6089953A (ja) * | 1983-10-22 | 1985-05-20 | Agency Of Ind Science & Technol | 積層型半導体装置の製造方法 |
| SE8603491L (sv) * | 1985-08-26 | 1987-02-27 | Rca Corp | Integrerad krets med staplade mosfelteffekttransistorer och sett att framstella densamma |
| US4944836A (en) * | 1985-10-28 | 1990-07-31 | International Business Machines Corporation | Chem-mech polishing method for producing coplanar metal/insulator films on a substrate |
| JPH0612799B2 (ja) * | 1986-03-03 | 1994-02-16 | 三菱電機株式会社 | 積層型半導体装置およびその製造方法 |
| US4767724A (en) * | 1986-03-27 | 1988-08-30 | General Electric Company | Unframed via interconnection with dielectric etch stop |
| US4840923A (en) * | 1986-04-30 | 1989-06-20 | International Business Machine Corporation | Simultaneous multiple level interconnection process |
| JPS6340343A (ja) * | 1986-08-05 | 1988-02-20 | Fujitsu Ltd | 三次元半導体装置及びその製造方法 |
| ATE75340T1 (de) * | 1987-01-28 | 1992-05-15 | Advanced Micro Devices Inc | Statische ram-zellen mit vier transistoren. |
| US4795722A (en) * | 1987-02-05 | 1989-01-03 | Texas Instruments Incorporated | Method for planarization of a semiconductor device prior to metallization |
| JPH063837B2 (ja) * | 1987-03-03 | 1994-01-12 | シャープ株式会社 | 三次元半導体集積回路の製造方法 |
| JPS63299251A (ja) * | 1987-05-29 | 1988-12-06 | Toshiba Corp | 半導体装置の製造方法 |
| US4902641A (en) * | 1987-07-31 | 1990-02-20 | Motorola, Inc. | Process for making an inverted silicon-on-insulator semiconductor device having a pedestal structure |
| GB2212979A (en) * | 1987-12-02 | 1989-08-02 | Philips Nv | Fabricating electrical connections,particularly in integrated circuit manufacture |
| US5064772A (en) * | 1988-08-31 | 1991-11-12 | International Business Machines Corporation | Bipolar transistor integrated circuit technology |
| US5026666A (en) * | 1989-12-28 | 1991-06-25 | At&T Bell Laboratories | Method of making integrated circuits having a planarized dielectric |
-
1990
- 1990-07-31 EP EP90480109A patent/EP0469215B1/de not_active Expired - Lifetime
- 1990-07-31 DE DE69023765T patent/DE69023765T2/de not_active Expired - Fee Related
-
1991
- 1991-05-15 JP JP3138644A patent/JPH0652783B2/ja not_active Expired - Lifetime
- 1991-07-16 US US07/730,736 patent/US5112765A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US5112765A (en) | 1992-05-12 |
| DE69023765T2 (de) | 1996-06-20 |
| JPH0652783B2 (ja) | 1994-07-06 |
| JPH0613576A (ja) | 1994-01-21 |
| EP0469215B1 (de) | 1995-11-22 |
| EP0469215A1 (de) | 1992-02-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |