DE69813018D1 - Verfahren in bezug auf prozessoren und angepasste prozessoren die in übereinstimmung mit dem verfahren funktionieren - Google Patents
Verfahren in bezug auf prozessoren und angepasste prozessoren die in übereinstimmung mit dem verfahren funktionierenInfo
- Publication number
- DE69813018D1 DE69813018D1 DE69813018T DE69813018T DE69813018D1 DE 69813018 D1 DE69813018 D1 DE 69813018D1 DE 69813018 T DE69813018 T DE 69813018T DE 69813018 T DE69813018 T DE 69813018T DE 69813018 D1 DE69813018 D1 DE 69813018D1
- Authority
- DE
- Germany
- Prior art keywords
- processors
- accordance
- work
- processor
- processor processors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1654—Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE9704606 | 1997-12-10 | ||
| SE9704606A SE511114C2 (sv) | 1997-12-10 | 1997-12-10 | Metod vid processor, samt processor anpassad att verka enligt metoden |
| PCT/SE1998/002267 WO1999030235A2 (en) | 1997-12-10 | 1998-12-09 | A method relating to processors, and processors adapted to function in accordance with the method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69813018D1 true DE69813018D1 (de) | 2003-05-08 |
| DE69813018T2 DE69813018T2 (de) | 2004-01-22 |
Family
ID=20409337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69813018T Expired - Lifetime DE69813018T2 (de) | 1997-12-10 | 1998-12-09 | Verfahren in bezug auf prozessoren und angepasste prozessoren die in übereinstimmung mit dem verfahren funktionieren |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6330701B1 (de) |
| EP (1) | EP1038224B1 (de) |
| JP (1) | JP2001526422A (de) |
| AU (1) | AU1795199A (de) |
| DE (1) | DE69813018T2 (de) |
| SE (1) | SE511114C2 (de) |
| WO (1) | WO1999030235A2 (de) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6587961B1 (en) * | 1998-06-15 | 2003-07-01 | Sun Microsystems, Inc. | Multi-processor system bridge with controlled access |
| JP2001297039A (ja) * | 2000-04-12 | 2001-10-26 | Matsushita Electric Ind Co Ltd | データ処理装置 |
| JP4492035B2 (ja) * | 2003-04-21 | 2010-06-30 | 日本電気株式会社 | データ処理装置 |
| DE10332557A1 (de) * | 2003-07-11 | 2005-02-17 | Siemens Ag | Verfahren und Computersystem zum Betreiben einer sicherungstechnischen Anlage |
| US7761657B2 (en) * | 2006-07-10 | 2010-07-20 | Hitachi, Ltd. | Storage control system, control method for storage control system, port selector, and controller |
| JP4461135B2 (ja) * | 2006-12-25 | 2010-05-12 | 富士通株式会社 | 演算回路及び演算方法並びに情報処理装置 |
| WO2009060953A1 (ja) * | 2007-11-07 | 2009-05-14 | Mitsubishi Electric Corporation | 安全制御装置 |
| US8051323B2 (en) * | 2010-01-21 | 2011-11-01 | Arm Limited | Auxiliary circuit structure in a split-lock dual processor system |
| US8108730B2 (en) * | 2010-01-21 | 2012-01-31 | Arm Limited | Debugging a multiprocessor system that switches between a locked mode and a split mode |
| US20110179255A1 (en) * | 2010-01-21 | 2011-07-21 | Arm Limited | Data processing reset operations |
| US8959392B2 (en) | 2010-03-23 | 2015-02-17 | Continental Teves Ag & Co. Ohg | Redundant two-processor controller and control method |
| WO2011117156A2 (de) * | 2010-03-23 | 2011-09-29 | Continental Teves Ag & Co. Ohg | Kontrollrechnersystem, verfahren zur steuerung eines kontrollrechnersystems, sowie verwendung eines kontrollrechnersystems |
| ES2581865T3 (es) | 2012-12-26 | 2016-09-07 | Universidad Del País Vasco-Euskal Herriko Unibertsitatea | Mimético de 1,2,3-triazol 1,4,5-trisustituido de RGD y/u OGP10-14, procedimiento para obtenerlo y usos del mismo |
| WO2015177927A1 (ja) * | 2014-05-23 | 2015-11-26 | 株式会社日立製作所 | 情報処理装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4228496A (en) * | 1976-09-07 | 1980-10-14 | Tandem Computers Incorporated | Multiprocessor system |
| US4358823A (en) * | 1977-03-25 | 1982-11-09 | Trw, Inc. | Double redundant processor |
| US4345328A (en) * | 1980-06-30 | 1982-08-17 | Sperry Corporation | ECC Check bit generation using through checking parity bits |
| JPH0833842B2 (ja) | 1987-05-01 | 1996-03-29 | 株式会社日立製作所 | 論理演算装置 |
| CA2032067A1 (en) * | 1989-12-22 | 1991-06-23 | Douglas E. Jewett | Fault-tolerant computer system with online reintegration and shutdown/restart |
| US5272696A (en) * | 1992-01-23 | 1993-12-21 | Northern Telecom Limited | ATM plane merging filter for ATM switches and the method thereof |
| MX9306994A (es) * | 1992-12-15 | 1994-06-30 | Ericsson Telefon Ab L M | Sistema de control de flujo para interruptores de paquete. |
| US5915082A (en) * | 1996-06-07 | 1999-06-22 | Lockheed Martin Corporation | Error detection and fault isolation for lockstep processor systems |
-
1997
- 1997-12-10 SE SE9704606A patent/SE511114C2/sv not_active IP Right Cessation
-
1998
- 1998-12-09 AU AU17951/99A patent/AU1795199A/en not_active Abandoned
- 1998-12-09 JP JP2000524727A patent/JP2001526422A/ja active Pending
- 1998-12-09 US US09/207,765 patent/US6330701B1/en not_active Expired - Lifetime
- 1998-12-09 DE DE69813018T patent/DE69813018T2/de not_active Expired - Lifetime
- 1998-12-09 EP EP98962793A patent/EP1038224B1/de not_active Expired - Lifetime
- 1998-12-09 WO PCT/SE1998/002267 patent/WO1999030235A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| US6330701B1 (en) | 2001-12-11 |
| JP2001526422A (ja) | 2001-12-18 |
| SE511114C2 (sv) | 1999-08-09 |
| SE9704606D0 (sv) | 1997-12-10 |
| DE69813018T2 (de) | 2004-01-22 |
| EP1038224A2 (de) | 2000-09-27 |
| AU1795199A (en) | 1999-06-28 |
| WO1999030235A3 (en) | 1999-08-26 |
| EP1038224B1 (de) | 2003-04-02 |
| SE9704606L (sv) | 1999-06-11 |
| WO1999030235A2 (en) | 1999-06-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |