DE69719104D1 - Bussteuerungs- und Informationsverarbeitungsgerät - Google Patents

Bussteuerungs- und Informationsverarbeitungsgerät

Info

Publication number: DE69719104D1
Authority: DE; Germany
Prior art keywords: information processing; processing device; bus control; bus; control
Prior art date: 1996-03-27
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE69719104T

Other languages

English (en)

Other versions

DE69719104T2 (de

Inventor

Touru Kakiage

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Panasonic Corp

Original Assignee

Matsushita Electric Industrial Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1996-03-27

Filing date

1997-03-27

Publication date

2003-03-27

1997-03-27 Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd

2003-03-27 Application granted granted Critical

2003-03-27 Publication of DE69719104D1 publication Critical patent/DE69719104D1/de

2003-07-31 Publication of DE69719104T2 publication Critical patent/DE69719104T2/de

2017-03-28 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Information Transfer Systems (AREA)

DE69719104T 1996-03-27 1997-03-27 Bussteuerungs- und Informationsverarbeitungsgerät Expired - Lifetime DE69719104T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP7271596		1996-03-27

Publications (2)

Publication Number	Publication Date
DE69719104D1 true DE69719104D1 (de)	2003-03-27
DE69719104T2 DE69719104T2 (de)	2003-07-31

Family

ID=13497336

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69719104T Expired - Lifetime DE69719104T2 (de)	1996-03-27	1997-03-27	Bussteuerungs- und Informationsverarbeitungsgerät

Country Status (4)

Country	Link
US (1)	US5916311A (de)
EP (1)	EP0798645B1 (de)
KR (1)	KR100222158B1 (de)
DE (1)	DE69719104T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2002041452A (ja) *	2000-07-27	2002-02-08	Hitachi Ltd	マイクロプロセッサ、半導体モジュール及びデータ処理システム
KR100800665B1 (ko) *	2001-09-29	2008-02-01	삼성전자주식회사	중앙처리장치와 주변 장치들간의 인터페이스를 위한 장치
US7315551B2 (en) *	2002-03-15	2008-01-01	Lockheed Martin Corporation	Synchronous low voltage differential I/O buss
JP2003323390A (ja) *	2002-05-08	2003-11-14	Nec Corp	外部入出力デバイス競合管理システム及びその管理方法並びにプログラム
US6948017B2 (en) *	2002-12-18	2005-09-20	International Business Machines Corporation	Method and apparatus having dynamically scalable clock domains for selectively interconnecting subsystems on a synchronous bus
CN116320023B (zh) *	2023-05-19	2023-08-15	小米汽车科技有限公司	服务请求处理方法、装置、车辆、存储介质及芯片

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5266346A (en) *	1975-11-29	1977-06-01	Tokyo Electric Co Ltd	Synch. clock control of microcomputer system
US5109492A (en) *	1986-09-19	1992-04-28	Hitachi, Ltd.	Microprocessor which terminates bus cycle when access address falls within a predetermined processor system address space
US5305452A (en) *	1987-10-23	1994-04-19	Chips And Technologies, Inc.	Bus controller with different microprocessor and bus clocks and emulation of different microprocessor command sequences
US5640585A (en) *	1988-02-09	1997-06-17	Ast Research, Inc.	State machine bus controller
US5218686A (en) *	1989-11-03	1993-06-08	Compaq Computer Corporation	Combined synchronous and asynchronous memory controller
JPH03248243A (ja) *	1990-02-26	1991-11-06	Nec Corp	情報処理装置
JPH0410045A (ja) *	1990-04-27	1992-01-14	Toshiba Corp	マイクロプロセッサ
US5175820A (en) *	1990-08-31	1992-12-29	Advanced Micro Devices, Inc.	Apparatus for use with a computing device controlling communications with a plurality of peripheral devices including a feedback bus to indicate operational modes
JPH04156629A (ja) *	1990-10-20	1992-05-29	Fujitsu Ltd	メモリクロックの制御方式
US5293603A (en) *	1991-06-04	1994-03-08	Intel Corporation	Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path
US5625821A (en) *	1991-08-12	1997-04-29	International Business Machines Corporation	Asynchronous or synchronous operation of event signaller by event management services in a computer system
JPH05108564A (ja) *	1991-10-17	1993-04-30	Shikoku Nippon Denki Software Kk	データ転送バスシステム
EP0574598A1 (de) *	1992-06-13	1993-12-22	International Business Machines Corporation	Datenpufferspeicher
US5434996A (en) *	1993-12-28	1995-07-18	Intel Corporation	Synchronous/asynchronous clock net with autosense
EP0667574A3 (de) *	1994-02-14	1997-02-12	Ibm	Rechnersystem.
JPH0844665A (ja) *	1994-07-14	1996-02-16	Fujitsu Ltd	複数のデータ転送サイズ及びプロトコルをサポートするバス
US5694586A (en) *	1995-05-02	1997-12-02	Apple Computer, Inc.	Controller using time-domain filter connected to a signal line to control a time at which signal line is sampled for receipt of information transfer signal
US5727171A (en) *	1995-11-16	1998-03-10	International Business Machines Corporation	Method and apparatus for allowing multi-speed synchronous communications between a processor and both slow and fast computing devices
US5721886A (en) *	1995-11-30	1998-02-24	Ncr Corporation	Synchronizer circuit which controls switching of clocks based upon synchronicity, asynchronicity, or change in frequency

1997
- 1997-03-20 US US08/821,596 patent/US5916311A/en not_active Expired - Lifetime
- 1997-03-27 EP EP97105243A patent/EP0798645B1/de not_active Expired - Lifetime
- 1997-03-27 KR KR1019970010857A patent/KR100222158B1/ko not_active Expired - Fee Related
- 1997-03-27 DE DE69719104T patent/DE69719104T2/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0798645A3 (de)	2001-11-14
DE69719104T2 (de)	2003-07-31
KR100222158B1 (ko)	1999-10-01
EP0798645B1 (de)	2003-02-19
EP0798645A2 (de)	1997-10-01
US5916311A (en)	1999-06-29
KR970066911A (ko)	1997-10-13

Publication	Publication Date	Title
DE69724397D1 (de)	2003-10-02	Informationsverarbeitungsgerät und -verfahren
DE69712725D1 (de)	2002-06-27	Informationsverarbeitungsgerät und -verfahren
DE69729917D1 (de)	2004-08-26	Cachespeicherräumungsvorrichtung und hiermit versehenes Rechnersystem
DE69730645D1 (de)	2004-10-21	Datenverarbeitungsverfahren und -gerät
KR960011619A (ko)	1996-04-20	손 받침대 및 그것을 구비한 정보처리장치
DE69525673D1 (de)	2002-04-11	Informationsverarbeitungsmethode und Gerät dafür
DE69734748D1 (de)	2006-01-05	Zugriffssteuerungssystem und -verfahren
DE69510251D1 (de)	1999-07-22	Informationsverarbeitungsverfahren und -vorrichtung
DE69827544D1 (de)	2004-12-23	Datenverarbeitungsgerät und -Verfahren
KR960015319A (ko)	1996-05-22	복합 처리 장치 및 그것의 제어 방법
DE69734540D1 (de)	2005-12-15	Drucksystem und Datenverarbeitungsverfahren dafür
DE69827915D1 (de)	2005-01-05	Verarbeitungsverfahren und -vorrichtung
DE69939199D1 (de)	2008-09-11	Informationsverarbeitungsystem und -Verfahren
DE69733374D1 (de)	2005-07-07	Speichersteuerungsvorrichtung und -system
DE69727721D1 (de)	2004-04-01	Rechnervorrichtung und Bussteuerungsschema
DE69726818D1 (de)	2004-01-29	Fahrzeugsteuerungsgerät und -verfahren
NO975418D0 (no)	1997-11-25	Kryptografisk tilgangs- og merkingssystem
DE50001073D1 (de)	2003-02-20	Verteiltes Fahrzeuginformationsverarbeitungs- und Fahrzeugsteuersystem
DE69309704D1 (de)	1997-05-15	Datenverarbeitungssystem und betriebssystem
DE69735042D1 (de)	2006-03-30	Verarbeitungsvorrichtung
DE69736872D1 (de)	2006-12-14	Datenverarbeitungssystem
DE69705961D1 (de)	2001-09-06	Asynchrone datenverarbeitungsvorrichtung
DE69831906T2 (de)	2006-06-14	Datenverarbeitungssystem und -verfahren
DE69732061D1 (de)	2005-02-03	Datenverarbeitungssystem und -verfahren
DE69517870D1 (de)	2000-08-17	Datenverarbeitungsvorrichtung

Legal Events

Date	Code	Title	Description
2004-03-18	8364	No opposition during term of opposition
2009-05-07	8327	Change in the person/name/address of the patent owner	Owner name: PANASONIC CORP., KADOMA, OSAKA, JP