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DE69630944D1 - Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung - Google Patents

Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung

Info

Publication number
DE69630944D1
DE69630944D1 DE69630944T DE69630944T DE69630944D1 DE 69630944 D1 DE69630944 D1 DE 69630944D1 DE 69630944 T DE69630944 T DE 69630944T DE 69630944 T DE69630944 T DE 69630944T DE 69630944 D1 DE69630944 D1 DE 69630944D1
Authority
DE
Germany
Prior art keywords
manufacturing
high voltage
mos transistor
voltage mos
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69630944T
Other languages
English (en)
Inventor
Lorenzo Fratin
Carlo Riva
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69630944D1 publication Critical patent/DE69630944D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/022—Manufacture or treatment of FETs having insulated gates [IGFET] having lightly-doped source or drain extensions selectively formed at the sides of the gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/605—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having significant overlap between the lightly-doped extensions and the gate electrode
    • H10D64/01322—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/671—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor having lateral variation in doping or structure
DE69630944T 1996-03-29 1996-03-29 Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung Expired - Lifetime DE69630944D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP96830175A EP0798785B1 (de) 1996-03-29 1996-03-29 Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung

Publications (1)

Publication Number Publication Date
DE69630944D1 true DE69630944D1 (de) 2004-01-15

Family

ID=8225861

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69630944T Expired - Lifetime DE69630944D1 (de) 1996-03-29 1996-03-29 Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung

Country Status (3)

Country Link
US (1) US5977591A (de)
EP (1) EP0798785B1 (de)
DE (1) DE69630944D1 (de)

Families Citing this family (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19612950C1 (de) * 1996-04-01 1997-07-31 Siemens Ag Schaltungsstruktur mit mindestens einem MOS-Transistor und Verfahren zu deren Herstellung
JPH10154815A (ja) * 1996-11-25 1998-06-09 Furontetsuku:Kk 薄膜トランジスタおよびその製造方法とそれを用いた液晶表示装置
US6388288B1 (en) * 1998-03-30 2002-05-14 Texas Instruments Incorporated Integrating dual supply voltages using a single extra mask level
US6015993A (en) * 1998-08-31 2000-01-18 International Business Machines Corporation Semiconductor diode with depleted polysilicon gate structure and method
US6461918B1 (en) 1999-12-20 2002-10-08 Fairchild Semiconductor Corporation Power MOS device with improved gate charge performance
US6255175B1 (en) * 2000-01-07 2001-07-03 Advanced Micro Devices, Inc. Fabrication of a field effect transistor with minimized parasitic Miller capacitance
US7064313B1 (en) 2000-10-05 2006-06-20 Ess Technology, Inc. Gradual reset voltage reduction for resetting an image sensor
US6768149B1 (en) * 2000-10-05 2004-07-27 Ess Technology, Inc. Tapered threshold reset FET for CMOS imagers
US7345342B2 (en) 2001-01-30 2008-03-18 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US7132712B2 (en) 2002-11-05 2006-11-07 Fairchild Semiconductor Corporation Trench structure having one or more diodes embedded therein adjacent a PN junction
US6888198B1 (en) 2001-06-04 2005-05-03 Advanced Micro Devices, Inc. Straddled gate FDSOI device
US7235862B2 (en) * 2001-07-10 2007-06-26 National Semiconductor Corporation Gate-enhanced junction varactor
JP2003086810A (ja) * 2001-09-11 2003-03-20 Fujitsu Ltd 半導体装置及びその製造方法
US7061066B2 (en) 2001-10-17 2006-06-13 Fairchild Semiconductor Corporation Schottky diode using charge balance structure
US6750106B2 (en) * 2001-11-16 2004-06-15 Altera Corporation Polysilicon gate doping level variation for reduced leakage current
JP4000256B2 (ja) * 2001-12-11 2007-10-31 富士通株式会社 半導体装置及びその製造方法
US6630720B1 (en) 2001-12-26 2003-10-07 Advanced Micro Devices, Inc. Asymmetric semiconductor device having dual work function gate and method of fabrication
US7078296B2 (en) 2002-01-16 2006-07-18 Fairchild Semiconductor Corporation Self-aligned trench MOSFETs and methods for making the same
US7081663B2 (en) * 2002-01-18 2006-07-25 National Semiconductor Corporation Gate-enhanced junction varactor with gradual capacitance variation
KR100859701B1 (ko) 2002-02-23 2008-09-23 페어차일드코리아반도체 주식회사 고전압 수평형 디모스 트랜지스터 및 그 제조 방법
US6586808B1 (en) 2002-06-06 2003-07-01 Advanced Micro Devices, Inc. Semiconductor device having multi-work function gate electrode and multi-segment gate dielectric
US6787835B2 (en) * 2002-06-11 2004-09-07 Hitachi, Ltd. Semiconductor memories
US7576388B1 (en) 2002-10-03 2009-08-18 Fairchild Semiconductor Corporation Trench-gate LDMOS structures
JP2004186452A (ja) 2002-12-04 2004-07-02 Renesas Technology Corp 不揮発性半導体記憶装置およびその製造方法
US7335958B2 (en) * 2003-06-25 2008-02-26 Micron Technology, Inc. Tailoring gate work-function in image sensors
SE526207C2 (sv) * 2003-07-18 2005-07-26 Infineon Technologies Ag Ldmos-transistoranordning, integrerad krets och framställningsmetod därav
US7368777B2 (en) 2003-12-30 2008-05-06 Fairchild Semiconductor Corporation Accumulation device with charge balance structure and method of forming the same
US7352036B2 (en) 2004-08-03 2008-04-01 Fairchild Semiconductor Corporation Semiconductor power device having a top-side drain using a sinker trench
US7265415B2 (en) 2004-10-08 2007-09-04 Fairchild Semiconductor Corporation MOS-gated transistor with reduced miller capacitance
US20060124975A1 (en) * 2004-12-09 2006-06-15 Honeywell International Inc. Dual work function gate in CMOS device
JP2006229045A (ja) * 2005-02-18 2006-08-31 Toshiba Corp 半導体装置及びその製造方法
US7504306B2 (en) 2005-04-06 2009-03-17 Fairchild Semiconductor Corporation Method of forming trench gate field effect transistor with recessed mesas
US20060285374A1 (en) * 2005-06-16 2006-12-21 Clement Szeto Content addressable memory cell
US7545007B2 (en) * 2005-08-08 2009-06-09 International Business Machines Corporation MOS varactor with segmented gate doping
US7385248B2 (en) 2005-08-09 2008-06-10 Fairchild Semiconductor Corporation Shielded gate field effect transistor with improved inter-poly dielectric
US7446374B2 (en) 2006-03-24 2008-11-04 Fairchild Semiconductor Corporation High density trench FET with integrated Schottky diode and method of manufacture
US7319256B1 (en) 2006-06-19 2008-01-15 Fairchild Semiconductor Corporation Shielded gate trench FET with the shield and gate electrodes being connected together
US8476709B2 (en) 2006-08-24 2013-07-02 Infineon Technologies Ag ESD protection device and method
US7675097B2 (en) * 2006-12-01 2010-03-09 International Business Machines Corporation Silicide strapping in imager transfer gate device
WO2008084085A1 (en) * 2007-01-11 2008-07-17 Stmicroelectronics Crolles 2 Sas Method of fabricating a transistor with semiconductor gate combined locally with a metal
US7781288B2 (en) * 2007-02-21 2010-08-24 International Business Machines Corporation Semiconductor structure including gate electrode having laterally variable work function
JP5627165B2 (ja) * 2007-04-27 2014-11-19 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置及び半導体装置の製造方法
US8110465B2 (en) * 2007-07-30 2012-02-07 International Business Machines Corporation Field effect transistor having an asymmetric gate electrode
US20090090983A1 (en) * 2007-10-03 2009-04-09 Adkisson James W Dual work function high voltage devices
US7772668B2 (en) 2007-12-26 2010-08-10 Fairchild Semiconductor Corporation Shielded gate trench FET with multiple channels
US7785973B2 (en) * 2008-01-25 2010-08-31 Spansion Llc Electronic device including a gate electrode having portions with different conductivity types and a process of forming the same
US7808039B2 (en) * 2008-04-09 2010-10-05 International Business Machines Corporation SOI transistor with merged lateral bipolar transistor
KR101413651B1 (ko) * 2008-05-28 2014-07-01 삼성전자주식회사 트랜지스터를 구비한 반도체 소자 및 그 제조 방법
US20100019351A1 (en) * 2008-07-28 2010-01-28 Albert Ratnakumar Varactors with enhanced tuning ranges
US8735983B2 (en) * 2008-11-26 2014-05-27 Altera Corporation Integrated circuit transistors with multipart gate conductors
US20100127331A1 (en) * 2008-11-26 2010-05-27 Albert Ratnakumar Asymmetric metal-oxide-semiconductor transistors
US9496268B2 (en) 2009-12-02 2016-11-15 Altera Corporation Integrated circuits with asymmetric and stacked transistors
US8638594B1 (en) 2009-12-02 2014-01-28 Altera Corporation Integrated circuits with asymmetric transistors
US8482963B1 (en) 2009-12-02 2013-07-09 Altera Corporation Integrated circuits with asymmetric and stacked transistors
US8138797B1 (en) 2010-05-28 2012-03-20 Altera Corporation Integrated circuits with asymmetric pass transistors
US20120112256A1 (en) * 2010-11-04 2012-05-10 Globalfoundries Singapore PTE, LTD. Control gate structure and method of forming a control gate structure
US8975928B1 (en) 2013-04-26 2015-03-10 Altera Corporation Input-output buffer circuitry with increased drive strength
US9437701B2 (en) * 2014-10-27 2016-09-06 Freescale Semiconductor, Inc. Integrated circuit devices with counter-doped conductive gates
JP2016149442A (ja) * 2015-02-12 2016-08-18 ソニー株式会社 トランジスタ、保護回路およびトランジスタの製造方法
US20180076281A1 (en) * 2016-09-12 2018-03-15 Jeng-Jye Shau Deep channel isolated drain metal-oxide-semiconductor transistors
US10622558B2 (en) 2018-03-30 2020-04-14 Intel Corporation Non-volatile memory cell structures including a chalcogenide material having a narrowed end and a three-dimensional memory device
JP2022089648A (ja) * 2020-12-04 2022-06-16 ローム株式会社 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5650574A (en) * 1979-10-01 1981-05-07 Seiko Epson Corp Silicon gate mos field effect transistor
JPS57148375A (en) * 1981-03-09 1982-09-13 Nissan Motor Co Ltd Semiconductor device
JPS6043863A (ja) * 1983-08-22 1985-03-08 Toshiba Corp 半導体装置
JPS6143477A (ja) * 1984-08-08 1986-03-03 Hitachi Ltd Ｍｏｓトランジスタの製造方法
IT1196997B (it) * 1986-07-25 1988-11-25 Sgs Microelettronica Spa Processo per realizzare strutture includenti celle di memoria non volatili e2prom con strati di silicio autoallineate transistori associati
JPS6373566A (ja) * 1986-09-16 1988-04-04 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US4745079A (en) * 1987-03-30 1988-05-17 Motorola, Inc. Method for fabricating MOS transistors having gates with different work functions
JPH01232765A (ja) * 1988-03-12 1989-09-18 Fujitsu Ltd 絶縁ゲート電界効果トランジスタ
US5279976A (en) * 1991-05-03 1994-01-18 Motorola, Inc. Method for fabricating a semiconductor device having a shallow doped region
EP0591599B1 (de) * 1992-09-30 2001-12-19 STMicroelectronics S.r.l. Herstellungsverfahren von integrierten Vorrichtungen und so hergestellte integrierte Vorrichtung
JPH06151828A (ja) * 1992-10-30 1994-05-31 Toshiba Corp 半導体装置及びその製造方法
JP3039200B2 (ja) * 1993-06-07 2000-05-08 日本電気株式会社 Ｍｏｓトランジスタおよびその製造方法

Also Published As

Publication number Publication date
EP0798785A1 (de) 1997-10-01
EP0798785B1 (de) 2003-12-03
US5977591A (en) 1999-11-02

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Legal Events

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