DE69618831D1 - ECC-geschützte Speicherorganisation mit Lese-Änderungs-Schreib-Pipelinezugriff - Google Patents
ECC-geschützte Speicherorganisation mit Lese-Änderungs-Schreib-PipelinezugriffInfo
- Publication number
- DE69618831D1 DE69618831D1 DE69618831T DE69618831T DE69618831D1 DE 69618831 D1 DE69618831 D1 DE 69618831D1 DE 69618831 T DE69618831 T DE 69618831T DE 69618831 T DE69618831 T DE 69618831T DE 69618831 D1 DE69618831 D1 DE 69618831D1
- Authority
- DE
- Germany
- Prior art keywords
- data block
- ecc
- read
- logic unit
- change
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
- G06F11/1056—Updating check bits on partial write, i.e. read/modify/write
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1064—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in cache or content addressable memories
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/397,912 US5687353A (en) | 1995-03-03 | 1995-03-03 | Merging data using a merge code from a look-up table and performing ECC generation on the merged data |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69618831D1 true DE69618831D1 (de) | 2002-03-14 |
| DE69618831T2 DE69618831T2 (de) | 2002-08-29 |
Family
ID=23573190
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69618831T Expired - Lifetime DE69618831T2 (de) | 1995-03-03 | 1996-03-01 | ECC-geschützte Speicherorganisation mit Lese-Änderungs-Schreib-Pipelinezugriff |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5687353A (de) |
| EP (1) | EP0730228B1 (de) |
| AT (1) | ATE212739T1 (de) |
| DE (1) | DE69618831T2 (de) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6446224B1 (en) | 1995-03-03 | 2002-09-03 | Fujitsu Limited | Method and apparatus for prioritizing and handling errors in a computer system |
| US6343343B1 (en) * | 1998-07-31 | 2002-01-29 | International Business Machines Corporation | Disk arrays using non-standard sector sizes |
| US7051264B2 (en) * | 2001-11-14 | 2006-05-23 | Monolithic System Technology, Inc. | Error correcting memory and method of operating same |
| US20050103888A1 (en) * | 2003-11-19 | 2005-05-19 | Corbett J. C. | Sprinkler spacer and stake system |
| US7797609B2 (en) * | 2004-08-19 | 2010-09-14 | Unisys Corporation | Apparatus and method for merging data blocks with error correction code protection |
| CN100399287C (zh) * | 2004-10-27 | 2008-07-02 | 威盛电子股份有限公司 | 数据错误检查方法及相关装置 |
| US7392456B2 (en) * | 2004-11-23 | 2008-06-24 | Mosys, Inc. | Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory |
| US7904789B1 (en) * | 2006-03-31 | 2011-03-08 | Guillermo Rozas | Techniques for detecting and correcting errors in a memory device |
| JP5010271B2 (ja) * | 2006-12-27 | 2012-08-29 | 富士通株式会社 | エラー訂正コード生成方法、およびメモリ制御装置 |
| US8645796B2 (en) | 2010-06-24 | 2014-02-04 | International Business Machines Corporation | Dynamic pipeline cache error correction |
| KR102014624B1 (ko) | 2014-12-19 | 2019-11-04 | 마이크론 테크놀로지, 인크. | 오류 정정 코딩이 있는 메모리 연산을 파이프라이닝하기 위한 방법 및 장치 |
| US10394647B2 (en) | 2017-06-22 | 2019-08-27 | International Business Machines Corporation | Bad bit register for memory |
| KR102456582B1 (ko) * | 2017-12-19 | 2022-10-20 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 메모리 시스템의 동작 방법 |
| CN109800184B (zh) * | 2018-12-12 | 2024-06-25 | 平安科技(深圳)有限公司 | 针对小块输入的缓存方法、系统、装置及可存储介质 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990002373A1 (en) * | 1988-08-30 | 1990-03-08 | Unisys Corporation | Merge select decode checking |
| JP2993975B2 (ja) * | 1989-08-23 | 1999-12-27 | 株式会社リコー | 中央演算処理装置 |
| US5058116A (en) * | 1989-09-19 | 1991-10-15 | International Business Machines Corporation | Pipelined error checking and correction for cache memories |
| US5295080A (en) * | 1990-08-06 | 1994-03-15 | Tektronix, Inc. | Method of operating a buffer memory to provide a trigger pattern by storing a trigger code in preselected areas of the buffer memory |
| US5313475A (en) * | 1991-10-31 | 1994-05-17 | International Business Machines Corporation | ECC function with self-contained high performance partial write or read/modify/write and parity look-ahead interface scheme |
| US5459842A (en) * | 1992-06-26 | 1995-10-17 | International Business Machines Corporation | System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory |
| US5488691A (en) * | 1993-11-17 | 1996-01-30 | International Business Machines Corporation | Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operating and initializaiton modes |
| US5452429A (en) * | 1993-11-17 | 1995-09-19 | International Business Machines Corporation | Error correction code on add-on cards for writing portions of data words |
| US5471597A (en) * | 1993-12-23 | 1995-11-28 | Unisys Corporation | System and method for executing branch instructions wherein branch target addresses are dynamically selectable under programmer control from writable branch address tables |
-
1995
- 1995-03-03 US US08/397,912 patent/US5687353A/en not_active Expired - Lifetime
-
1996
- 1996-03-01 AT AT96103207T patent/ATE212739T1/de not_active IP Right Cessation
- 1996-03-01 DE DE69618831T patent/DE69618831T2/de not_active Expired - Lifetime
- 1996-03-01 EP EP96103207A patent/EP0730228B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US5687353A (en) | 1997-11-11 |
| ATE212739T1 (de) | 2002-02-15 |
| EP0730228B1 (de) | 2002-01-30 |
| DE69618831T2 (de) | 2002-08-29 |
| EP0730228A1 (de) | 1996-09-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |