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DE69426094D1 - Herstellungsmethode einer mikroelektronikanordnung unter verwendung eines alternierenden substrates. - Google Patents

Herstellungsmethode einer mikroelektronikanordnung unter verwendung eines alternierenden substrates.

Info

Publication number
DE69426094D1
DE69426094D1 DE69426094T DE69426094T DE69426094D1 DE 69426094 D1 DE69426094 D1 DE 69426094D1 DE 69426094 T DE69426094 T DE 69426094T DE 69426094 T DE69426094 T DE 69426094T DE 69426094 D1 DE69426094 D1 DE 69426094D1
Authority
DE
Germany
Prior art keywords
production method
microelectronic arrangement
alternating substrate
alternating
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69426094T
Other languages
English (en)
Other versions
DE69426094T2 (de
Inventor
T Malloy
J Bendik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Application granted granted Critical
Publication of DE69426094D1 publication Critical patent/DE69426094D1/de
Publication of DE69426094T2 publication Critical patent/DE69426094T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H10P72/74—
    • H10P72/7402—
    • H10P72/7416—
    • H10P72/7422—
    • H10P72/743—
    • H10P72/7434—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges
DE69426094T 1993-01-19 1994-01-10 Herstellungsmethode einer mikroelektronikanordnung unter verwendung eines alternierenden substrates. Expired - Fee Related DE69426094T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/006,119 US5455202A (en) 1993-01-19 1993-01-19 Method of making a microelectric device using an alternate substrate
PCT/US1994/000372 WO1994017550A1 (en) 1993-01-19 1994-01-10 Method of fabricating a microelectronic device using an alternate substrate

Publications (2)

Publication Number Publication Date
DE69426094D1 true DE69426094D1 (de) 2000-11-16
DE69426094T2 DE69426094T2 (de) 2001-03-01

Family

ID=21719407

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69426094T Expired - Fee Related DE69426094T2 (de) 1993-01-19 1994-01-10 Herstellungsmethode einer mikroelektronikanordnung unter verwendung eines alternierenden substrates.

Country Status (5)

Country Link
US (1) US5455202A (de)
EP (1) EP0631690B1 (de)
JP (1) JPH07506938A (de)
DE (1) DE69426094T2 (de)
WO (1) WO1994017550A1 (de)

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US6004865A (en) * 1993-09-06 1999-12-21 Hitachi, Ltd. Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
US5414276A (en) * 1993-10-18 1995-05-09 The Regents Of The University Of California Transistors using crystalline silicon devices on glass
JPH0831791A (ja) * 1994-07-11 1996-02-02 Mitsubishi Electric Corp 半導体層の製造方法
DE4433833A1 (de) * 1994-09-22 1996-03-28 Fraunhofer Ges Forschung Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung unter Erreichung hoher Systemausbeuten
US5668045A (en) * 1994-11-30 1997-09-16 Sibond, L.L.C. Process for stripping outer edge of BESOI wafers
US5534466A (en) * 1995-06-01 1996-07-09 International Business Machines Corporation Method of making area direct transfer multilayer thin film structure
US5674758A (en) * 1995-06-06 1997-10-07 Regents Of The University Of California Silicon on insulator achieved using electrochemical etching
US6277696B1 (en) * 1995-06-27 2001-08-21 Hewlett-Packard Company Surface emitting laser using two wafer bonded mirrors
KR100228719B1 (ko) * 1996-05-27 1999-11-01 윤덕용 전기 화학적 식각방법을 이용하는 soi형 반도체 소자 및 이를 이용한 능동구동 액정표시장치의 제조방법
SE9700215L (sv) * 1997-01-27 1998-02-18 Abb Research Ltd Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken
US5904495A (en) * 1997-06-11 1999-05-18 Massachusetts Institute Of Technology Interconnection technique for hybrid integrated devices
JPH1126733A (ja) * 1997-07-03 1999-01-29 Seiko Epson Corp 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置，アクティブマトリクス基板、液晶表示装置および電子機器
JP4439602B2 (ja) * 1997-09-29 2010-03-24 株式会社東芝 半導体装置の製造方法
FR2781925B1 (fr) * 1998-07-30 2001-11-23 Commissariat Energie Atomique Transfert selectif d'elements d'un support vers un autre support
EP1041624A1 (de) * 1999-04-02 2000-10-04 Interuniversitair Microelektronica Centrum Vzw Transfermethode ultra-dünner Substrate und Anwendung zur Herstellung von Mehrlagen-Dünnschichtstrukturen
JP2001274528A (ja) 2000-01-21 2001-10-05 Fujitsu Ltd 薄膜デバイスの基板間転写方法
US6287891B1 (en) * 2000-04-05 2001-09-11 Hrl Laboratories, Llc Method for transferring semiconductor device layers to different substrates
US6743697B2 (en) * 2000-06-30 2004-06-01 Intel Corporation Thin silicon circuits and method for making the same
US6627998B1 (en) * 2000-07-27 2003-09-30 International Business Machines Corporation Wafer scale thin film package
JP3502036B2 (ja) * 2000-11-08 2004-03-02 シャープ株式会社 半導体素子の製造方法および半導体素子
DE10140826B4 (de) * 2000-12-13 2005-11-10 Infineon Technologies Ag Verfahren zur mehrschrittigen Bearbeitung eines dünnen und unter den Bearbeitungsschritten bruchgefährdeten Halbleiter-Waferprodukts
DE10065686C2 (de) * 2000-12-29 2002-11-14 Infineon Technologies Ag Verfahren zur Handhabung eines dünnen Halbleiterwafers oder Substrats
FR2837620B1 (fr) * 2002-03-25 2005-04-29 Commissariat Energie Atomique Procede de transfert d'elements de substrat a substrat
JP2004056046A (ja) * 2002-07-24 2004-02-19 Disco Abrasive Syst Ltd Ｓｏｉ基板の加工方法
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
TWI237915B (en) * 2004-12-24 2005-08-11 Cleavage Entpr Co Ltd Manufacturing method of light-emitting diode
FR2880189B1 (fr) * 2004-12-24 2007-03-30 Tracit Technologies Sa Procede de report d'un circuit sur un plan de masse
US7635637B2 (en) * 2005-07-25 2009-12-22 Fairchild Semiconductor Corporation Semiconductor structures formed on substrates and methods of manufacturing the same
US8420505B2 (en) * 2006-03-25 2013-04-16 International Rectifier Corporation Process for manufacture of thin wafer
US7851333B2 (en) * 2007-03-15 2010-12-14 Infineon Technologies Ag Apparatus comprising a device and method for producing it
US8101500B2 (en) * 2007-09-27 2012-01-24 Fairchild Semiconductor Corporation Semiconductor device with (110)-oriented silicon
TWI384434B (zh) * 2008-08-28 2013-02-01 Au Optronics Corp 可撓式顯示面板及其製造方法、光電裝置及其製造方法
US8039877B2 (en) * 2008-09-09 2011-10-18 Fairchild Semiconductor Corporation (110)-oriented p-channel trench MOSFET having high-K gate dielectric
FR2990565B1 (fr) * 2012-05-09 2016-10-28 Commissariat Energie Atomique Procede de realisation de detecteurs infrarouges
US10354910B2 (en) * 2016-05-27 2019-07-16 Raytheon Company Foundry-agnostic post-processing method for a wafer

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3918148A (en) * 1974-04-15 1975-11-11 Ibm Integrated circuit chip carrier and method for forming the same
US3959045A (en) * 1974-11-18 1976-05-25 Varian Associates Process for making III-V devices
US5147808A (en) * 1988-11-02 1992-09-15 Universal Energy Systems, Inc. High energy ion implanted silicon on insulator structure
GB2237143A (en) * 1989-09-15 1991-04-24 Philips Electronic Associated Two-terminal non-linear devices and their fabrication
US5013681A (en) * 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
US5102821A (en) * 1990-12-20 1992-04-07 Texas Instruments Incorporated SOI/semiconductor heterostructure fabrication by wafer bonding of polysilicon to titanium
US5240876A (en) * 1991-02-22 1993-08-31 Harris Corporation Method of fabricating SOI wafer with SiGe as an etchback film in a BESOI process
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
US5213986A (en) * 1992-04-10 1993-05-25 North American Philips Corporation Process for making thin film silicon-on-insulator wafers employing wafer bonding and wafer thinning

Also Published As

Publication number Publication date
JPH07506938A (ja) 1995-07-27
US5455202A (en) 1995-10-03
EP0631690A1 (de) 1995-01-04
WO1994017550A1 (en) 1994-08-04
EP0631690B1 (de) 2000-10-11
DE69426094T2 (de) 2001-03-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee