DE69410514D1 - Verfahren zum Herstellen von Halbleiterscheiben - Google Patents

Verfahren zum Herstellen von Halbleiterscheiben

Info

Publication number: DE69410514D1
Authority: DE; Germany
Prior art keywords: production; semiconductor wafers; wafers; semiconductor
Prior art date: 1993-03-24
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE69410514T

Other languages

English (en)

Other versions

DE69410514T2 (de

Inventor

Tadahiro Kato

Sunao Shima

Masami Nakano

Hisashi Masumura

Hideo Kudo

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Shin Etsu Handotai Co Ltd

Original Assignee

Shin Etsu Handotai Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1993-03-24

Filing date

1994-03-24

Publication date

1998-07-02

1994-03-24 Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd

1998-07-02 Publication of DE69410514D1 publication Critical patent/DE69410514D1/de

1999-03-04 Application granted granted Critical

1999-03-04 Publication of DE69410514T2 publication Critical patent/DE69410514T2/de

2014-03-25 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- H10P90/12—
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/138—Roughened surface
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation

DE69410514T 1993-03-24 1994-03-24 Verfahren zum Herstellen von Halbleiterscheiben Expired - Fee Related DE69410514T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP5064896A JP2853506B2 (ja)	1993-03-24	1993-03-24	ウエーハの製造方法

Publications (2)

Publication Number	Publication Date
DE69410514D1 true DE69410514D1 (de)	1998-07-02
DE69410514T2 DE69410514T2 (de)	1999-03-04

Family

ID=13271303

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69410514T Expired - Fee Related DE69410514T2 (de)	1993-03-24	1994-03-24	Verfahren zum Herstellen von Halbleiterscheiben

Country Status (4)

Country	Link
US (1)	US5447890A (de)
EP (1)	EP0617457B1 (de)
JP (1)	JP2853506B2 (de)
DE (1)	DE69410514T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0634658B1 (de) *	1993-07-16	2002-10-16	Fuji Photo Film Co., Ltd.	Biochemischer Analysator und Inkubator dafür
JP3534207B2 (ja) *	1995-05-16	2004-06-07	コマツ電子金属株式会社	半導体ウェーハの製造方法
US6006736A (en) *	1995-07-12	1999-12-28	Memc Electronic Materials, Inc.	Method and apparatus for washing silicon ingot with water to remove particulate matter
JPH0936080A (ja) *	1995-07-13	1997-02-07	Toray Eng Co Ltd	加工済シリコンインゴットの洗浄方法
JPH0945643A (ja) *	1995-07-31	1997-02-14	Komatsu Electron Metals Co Ltd	半導体ウェハ及びその製造方法
TW308561B (de) *	1995-08-24	1997-06-21	Mutsubishi Gum Kk
JP3534213B2 (ja) *	1995-09-30	2004-06-07	コマツ電子金属株式会社	半導体ウェハの製造方法
JP3317330B2 (ja) *	1995-12-27	2002-08-26	信越半導体株式会社	半導体鏡面ウェーハの製造方法
JPH09270400A (ja) *	1996-01-31	1997-10-14	Shin Etsu Handotai Co Ltd	半導体ウェーハの製造方法
JP3252702B2 (ja) *	1996-03-28	2002-02-04	信越半導体株式会社	気相エッチング工程を含む半導体単結晶鏡面ウエーハの製造方法およびこの方法で製造される半導体単結晶鏡面ウエーハ
US5821166A (en) *	1996-12-12	1998-10-13	Komatsu Electronic Metals Co., Ltd.	Method of manufacturing semiconductor wafers
JP3620683B2 (ja) *	1996-12-27	2005-02-16	信越半導体株式会社	半導体ウエーハの製造方法
WO1998056726A1 (en) *	1997-06-13	1998-12-17	Cfmt, Inc.	Methods for treating semiconductor wafers
CN1272222A (zh) *	1997-08-21	2000-11-01	Memc电子材料有限公司	处理半导体晶片的方法
US6239039B1 (en) *	1997-12-09	2001-05-29	Shin-Etsu Handotai Co., Ltd.	Semiconductor wafers processing method and semiconductor wafers produced by the same
JP3358549B2 (ja)	1998-07-08	2002-12-24	信越半導体株式会社	半導体ウエーハの製造方法ならびにウエーハチャック
US6214704B1 (en)	1998-12-16	2001-04-10	Memc Electronic Materials, Inc.	Method of processing semiconductor wafers to build in back surface damage
JP2001096455A (ja) *	1999-09-28	2001-04-10	Ebara Corp	研磨装置
US6514423B1 (en)	2000-02-22	2003-02-04	Memc Electronic Materials, Inc.	Method for wafer processing
KR20020034475A (ko) *	2000-11-02	2002-05-09	이 창 세	반도체급 웨이퍼 제조방법
JP2005039155A (ja) *	2003-07-18	2005-02-10	Matsushita Electric Ind Co Ltd	半導体装置の製造方法及びそれに用いる半導体基板の製造方法
US7399422B2 (en)	2005-11-29	2008-07-15	Asml Holding N.V.	System and method for forming nanodisks used in imprint lithography and nanodisk and memory disk formed thereby
US7409759B2 (en)	2004-12-16	2008-08-12	Asml Holding N.V.	Method for making a computer hard drive platen using a nano-plate
US7363854B2 (en)	2004-12-16	2008-04-29	Asml Holding N.V.	System and method for patterning both sides of a substrate utilizing imprint lithography
US7331283B2 (en)	2004-12-16	2008-02-19	Asml Holding N.V.	Method and apparatus for imprint pattern replication
US7410591B2 (en)	2004-12-16	2008-08-12	Asml Holding N.V.	Method and system for making a nano-plate for imprint lithography
JP5368000B2 (ja) *	2008-04-01	2013-12-11	信越化学工業株式会社	Ｓｏｉ基板の製造方法
JP6191154B2 (ja) *	2013-02-19	2017-09-06	信越化学工業株式会社	Ｓｏｉ基板の製造方法
US9281251B2 (en) *	2013-08-09	2016-03-08	Tokyo Electron Limited	Substrate backside texturing
JP2023046630A (ja) *	2021-09-24	2023-04-05	株式会社Ｓｃｒｅｅｎホールディングス	研磨方法および基板処理装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS54110783A (en) *	1978-02-20	1979-08-30	Hitachi Ltd	Semiconductor substrate and its manufacture
JPS5958827A (ja) *	1982-09-28	1984-04-04	Toshiba Corp	半導体ウエ−ハ、半導体ウエ−ハの製造方法及び半導体ウエ−ハの製造装置
JPS63293813A (ja) *	1987-05-27	1988-11-30	Hitachi Ltd	半導体基板
JP2747516B2 (ja) *	1987-05-31	1998-05-06	住友シチックス株式会社	半導体基板のバックサイドダメージ加工法
JPH0637025B2 (ja) *	1987-09-14	1994-05-18	スピードファム株式会社	ウエハの鏡面加工装置
JPH06103678B2 (ja) *	1987-11-28	1994-12-14	株式会社東芝	半導体基板の加工方法

1993
- 1993-03-24 JP JP5064896A patent/JP2853506B2/ja not_active Expired - Fee Related
1994
- 1994-03-21 US US08/210,437 patent/US5447890A/en not_active Expired - Fee Related
- 1994-03-24 EP EP94302115A patent/EP0617457B1/de not_active Expired - Lifetime
- 1994-03-24 DE DE69410514T patent/DE69410514T2/de not_active Expired - Fee Related

Also Published As

Publication number	Publication date
JP2853506B2 (ja)	1999-02-03
JPH06275480A (ja)	1994-09-30
US5447890A (en)	1995-09-05
EP0617457A3 (de)	1995-01-11
DE69410514T2 (de)	1999-03-04
EP0617457A2 (de)	1994-09-28
EP0617457B1 (de)	1998-05-27

Publication	Publication Date	Title
DE69410514D1 (de)	1998-07-02	Verfahren zum Herstellen von Halbleiterscheiben
DE69707219D1 (de)	2001-11-15	Verfahren zum Herstellen von Silizium-Halbleiter Einzelsubstrat
DE69325325D1 (de)	1999-07-22	Verfahren zur Herstellung von Halbleiterscheiben
DE69431385D1 (de)	2002-10-24	Verfahren zur Herstellung von Silizium-Halbleiterplättchen
DE69409347D1 (de)	1998-05-07	Verfahren zum Herstellen von Halbleitervorrichtungen
DE3853397D1 (de)	1995-04-27	Verfahren zum schleierfreien Polieren von Halbleiterscheiben.
DE69434536D1 (de)	2005-12-15	Verfahren zur Herstellung von halbleitenden Wafern
DE69430457D1 (de)	2002-05-29	Verfahren zum teilweisen Sägen von intergrierter Schaltkreise
DE69022604D1 (de)	1995-11-02	Verfahren zum Herstellen von Unterwasserbauwerken.
DE69737702D1 (de)	2007-06-14	Verfahren zur Herstellung von Halbleiterscheiben
DE3684676D1 (de)	1992-05-07	Verfahren zum herstellen von halbleitersubstraten.
DE69020802D1 (de)	1995-08-17	Verfahren zum Ausheilen von Halbleitern.
DE69407663D1 (de)	1998-02-12	Verfahren zum Herstellen von Doppelplüschgeweben
DE69205255D1 (de)	1995-11-09	Verfahren zum Aufspannen und Fixieren von Halbleiter-Plättchen.
DE59408739D1 (de)	1999-10-21	Verfahren zum Herstellen von lackierten Teilen
DE69206862D1 (de)	1996-02-01	Verfahren zum Herstellen von organischen Carbonaten
DE3486210D1 (de)	1993-10-14	Verfahren zum Herstellen von Polsterartikeln.
DE59506147D1 (de)	1999-07-15	Verfahren zum Reinigen von Halbleiterscheiben
DE69316268D1 (de)	1998-02-19	Verfahren zum Herstellen von Glasgegenständen
DE69126637D1 (de)	1997-07-31	Verfahren zum Herstellen von Polysilizium mit niedriger Fehlerdichte
DE69525566D1 (de)	2002-04-04	Verfahren zum gitterangepassten Aufwachsen von Halbleiterschichten
DE69126153D1 (de)	1997-06-26	Verfahren zur Herstellung von verbundenen Halbleiterplättchen
DE59503046D1 (de)	1998-09-10	Verfahren zum Herstellen von Formteilen
DE69517557D1 (de)	2000-07-27	Verfahren zum Herstellen von Elektrostahl
DE69114209D1 (de)	1995-12-07	Verfahren zum Herstellen von Glasgegenständen.

Legal Events

Date	Code	Title	Description
1999-07-01	8364	No opposition during term of opposition
2005-01-05	8339	Ceased/non-payment of the annual fee