DE68924744D1 - Kontaktstiftelektronik-Einrichtung mit Phasenjustierung für einen IC-Tester und Verfahren zur Phasenjustierung. - Google Patents
Kontaktstiftelektronik-Einrichtung mit Phasenjustierung für einen IC-Tester und Verfahren zur Phasenjustierung.Info
- Publication number
- DE68924744D1 DE68924744D1 DE68924744T DE68924744T DE68924744D1 DE 68924744 D1 DE68924744 D1 DE 68924744D1 DE 68924744 T DE68924744 T DE 68924744T DE 68924744 T DE68924744 T DE 68924744T DE 68924744 D1 DE68924744 D1 DE 68924744D1
- Authority
- DE
- Germany
- Prior art keywords
- phase adjustment
- tester
- contact pin
- electronics device
- pin electronics
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
- G01R31/3191—Calibration
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63215855A JP2688941B2 (ja) | 1988-08-29 | 1988-08-29 | 位相補正装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE68924744D1 true DE68924744D1 (de) | 1995-12-14 |
| DE68924744T2 DE68924744T2 (de) | 1996-05-02 |
Family
ID=16679392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE68924744T Expired - Fee Related DE68924744T2 (de) | 1988-08-29 | 1989-08-28 | Kontaktstiftelektronik-Einrichtung mit Phasenjustierung für einen IC-Tester und Verfahren zur Phasenjustierung. |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4929888A (de) |
| EP (1) | EP0356967B1 (de) |
| JP (1) | JP2688941B2 (de) |
| DE (1) | DE68924744T2 (de) |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5025205A (en) * | 1989-06-22 | 1991-06-18 | Texas Instruments Incorporated | Reconfigurable architecture for logic test system |
| US5235566A (en) * | 1989-09-07 | 1993-08-10 | Amdahl Corporation | Clock skew measurement technique |
| US5003256A (en) * | 1989-09-07 | 1991-03-26 | Amdahl Corporation | Clock skew measurement technique |
| JP2582906B2 (ja) * | 1989-10-21 | 1997-02-19 | 東芝マイクロエレクトロニクス株式会社 | 半導体装置の直流電流・電圧特性の測定方法 |
| US5293626A (en) * | 1990-06-08 | 1994-03-08 | Cray Research, Inc. | Clock distribution apparatus and processes particularly useful in multiprocessor systems |
| JPH0481675A (ja) * | 1990-07-25 | 1992-03-16 | Mitsubishi Electric Corp | 半導体デバイステスト装置 |
| US5225772A (en) * | 1990-09-05 | 1993-07-06 | Schlumberger Technologies, Inc. | Automatic test equipment system using pin slice architecture |
| US5212443A (en) * | 1990-09-05 | 1993-05-18 | Schlumberger Technologies, Inc. | Event sequencer for automatic test equipment |
| US5471136A (en) * | 1991-07-24 | 1995-11-28 | Genrad Limited | Test system for calculating the propagation delays in signal paths leading to a plurality of pins associated with a circuit |
| FR2682191B1 (fr) * | 1991-10-04 | 1995-08-11 | Aerospatiale | Methode de compensation automatique des incertitudes de temps d'un systeme electronique teste par un testeur automatique. |
| US5268639A (en) * | 1992-06-05 | 1993-12-07 | Rambus, Inc. | Testing timing parameters of high speed integrated circuit devices |
| US5402079A (en) * | 1992-12-18 | 1995-03-28 | Vlsi Technology, Inc. | Integrated circuit relay control system |
| JP3591657B2 (ja) * | 1993-10-13 | 2004-11-24 | 株式会社アドバンテスト | 半導体ic試験装置 |
| US5459738A (en) * | 1994-01-26 | 1995-10-17 | Watari; Hiromichi | Apparatus and method for digital circuit testing |
| JPH07294605A (ja) * | 1994-04-22 | 1995-11-10 | Advantest Corp | 半導体試験装置用校正データの転送装置及びその方法 |
| US5521493A (en) * | 1994-11-21 | 1996-05-28 | Megatest Corporation | Semiconductor test system including a novel driver/load circuit |
| US5589766A (en) * | 1995-04-06 | 1996-12-31 | General Electric Company | Field-testable integrated circuit and method of testing |
| JPH09318704A (ja) * | 1996-05-30 | 1997-12-12 | Ando Electric Co Ltd | Ic試験装置 |
| KR100245929B1 (ko) * | 1997-06-30 | 2000-03-02 | 윤종용 | 클록 사용 제한조건이 설정된 고속 메모리 소자 검사방법 |
| US6820234B2 (en) | 1998-06-29 | 2004-11-16 | Acuid Limited | Skew calibration means and a method of skew calibration |
| WO2000000836A1 (en) | 1998-06-29 | 2000-01-06 | Iliya Valeryevich Klochkov | A skew calibration means and a method of skew calibration |
| US6158030A (en) | 1998-08-21 | 2000-12-05 | Micron Technology, Inc. | System and method for aligning output signals in massively parallel testers and other electronic devices |
| US6329833B1 (en) * | 1999-02-24 | 2001-12-11 | Xilinx, Inc. | System and method for automatically measuring input voltage levels for integrated circuits |
| JP4118463B2 (ja) * | 1999-07-23 | 2008-07-16 | 株式会社アドバンテスト | タイミング保持機能を搭載したic試験装置 |
| JP2001141792A (ja) * | 1999-10-01 | 2001-05-25 | Schlumberger Technol Inc | 源同期信号出力を有する電子デバイスを試験する方法および装置 |
| US6642734B1 (en) * | 1999-12-01 | 2003-11-04 | Hitachi Electronics Engineering Co., Ltd. | Method and apparatus to generate a ground level of a semiconductor IC tester having a plurality of substrates |
| US6622103B1 (en) * | 2000-06-20 | 2003-09-16 | Formfactor, Inc. | System for calibrating timing of an integrated circuit wafer tester |
| US6441666B1 (en) | 2000-07-20 | 2002-08-27 | Silicon Graphics, Inc. | System and method for generating clock signals |
| JP4508385B2 (ja) * | 2000-08-31 | 2010-07-21 | 株式会社アドバンテスト | タイミング発生器及び半導体試験装置 |
| US6677775B2 (en) * | 2001-01-10 | 2004-01-13 | Analog Devices, Inc. | Circuit testing device using a driver to perform electronics testing |
| JP2002296329A (ja) * | 2001-03-30 | 2002-10-09 | Agilent Technologies Japan Ltd | 集積回路の試験装置 |
| CN1680820B (zh) | 2001-06-07 | 2010-09-29 | 株式会社艾德温特斯特 | 半导体试验装置的校准方法 |
| US6940271B2 (en) * | 2001-08-17 | 2005-09-06 | Nptest, Inc. | Pin electronics interface circuit |
| DE10330043B4 (de) * | 2003-06-30 | 2007-09-27 | Infineon Technologies Ag | System und Kalibrierverfahren |
| KR100505425B1 (ko) * | 2003-06-30 | 2005-08-04 | 주식회사 하이닉스반도체 | 반도체 장치에서의 신호의 지연 시간 제어 방법 |
| EP2081036A3 (de) * | 2003-09-09 | 2010-06-09 | Advantest Corporation | Tester |
| US7502974B2 (en) * | 2006-02-22 | 2009-03-10 | Verigy (Singapore) Pte. Ltd. | Method and apparatus for determining which timing sets to pre-load into the pin electronics of a circuit test system, and for pre-loading or storing said timing sets |
| JP5235190B2 (ja) * | 2007-03-20 | 2013-07-10 | 株式会社アドバンテスト | クロックデータリカバリ回路、方法ならびにそれらを利用した試験装置 |
| EP2136218A1 (de) | 2007-03-22 | 2009-12-23 | Advantest Corporation | Datenempfangsschaltung, tester damit und timing-einstellschaltung für ein strobe-signal und verfahren |
| US8295182B2 (en) | 2007-07-03 | 2012-10-23 | Credence Systems Corporation | Routed event test system and method |
| JP2009103469A (ja) * | 2007-10-19 | 2009-05-14 | Advantest Corp | 試験装置、スキュー測定装置、デバイスおよびボード |
| US7755375B2 (en) * | 2008-01-08 | 2010-07-13 | Advantest Corporation | Test apparatus, probe card, and test method |
| CN102057287B (zh) | 2008-06-09 | 2013-08-21 | 株式会社爱德万测试 | 测试装置 |
| US20100325372A1 (en) * | 2009-06-17 | 2010-12-23 | Housty Oswin E | Parallel training of dynamic random access memory channel controllers |
| KR101315499B1 (ko) * | 2009-06-29 | 2013-10-07 | 가부시키가이샤 어드밴티스트 | 시험 장치, 교정 방법 및 프로그램 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US31056A (en) * | 1861-01-01 | Nut-machine | ||
| USRE31056E (en) | 1977-03-23 | 1982-10-12 | Fairchild Camera & Instrument Corp. | Computer controlled high-speed circuit for testing electronic devices |
| JPS5832178A (ja) * | 1981-08-19 | 1983-02-25 | Advantest Corp | Icテスタ |
| US4635259A (en) * | 1983-08-01 | 1987-01-06 | Fairchild Semiconductor Corporation | Method and apparatus for monitoring response signals during automated testing of electronic circuits |
| US4635256A (en) * | 1983-08-01 | 1987-01-06 | Fairchild Semiconductor Corporation | Formatter for high speed test system |
| US4660197A (en) * | 1985-11-01 | 1987-04-21 | Teradyne, Inc. | Circuitry for synchronizing a multiple channel circuit tester |
-
1988
- 1988-08-29 JP JP63215855A patent/JP2688941B2/ja not_active Expired - Fee Related
-
1989
- 1989-08-23 US US07/397,884 patent/US4929888A/en not_active Expired - Fee Related
- 1989-08-28 DE DE68924744T patent/DE68924744T2/de not_active Expired - Fee Related
- 1989-08-28 EP EP89115860A patent/EP0356967B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE68924744T2 (de) | 1996-05-02 |
| EP0356967A2 (de) | 1990-03-07 |
| JP2688941B2 (ja) | 1997-12-10 |
| EP0356967A3 (de) | 1991-07-03 |
| JPH0262983A (ja) | 1990-03-02 |
| US4929888A (en) | 1990-05-29 |
| EP0356967B1 (de) | 1995-11-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |