DE68916249D1 - Logikschaltung. - Google Patents

Logikschaltung.

Info

Publication number: DE68916249D1
Authority: DE; Germany
Prior art keywords: logic circuit; logic; circuit
Prior art date: 1989-11-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE68916249T

Other languages

English (en)

Other versions

DE68916249T2 (de

Inventor

Nicholas David Butler

Roy Bernard Harrison

Keith Robert Barraclough

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee

International Business Machines Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1989-11-30

Filing date

1989-11-30

Publication date

1994-07-21

1989-11-30 Application filed by International Business Machines Corp filed Critical International Business Machines Corp

1994-07-21 Application granted granted Critical

1994-07-21 Publication of DE68916249D1 publication Critical patent/DE68916249D1/de

1995-05-24 Publication of DE68916249T2 publication Critical patent/DE68916249T2/de

2009-12-01 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318558—Addressing or selecting of subparts of the device under test
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318552—Clock circuits details
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers

Landscapes

Engineering & Computer Science (AREA)
General Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Theoretical Computer Science (AREA)
Logic Circuits (AREA)
Tests Of Electronic Circuits (AREA)
Power Sources (AREA)
Test And Diagnosis Of Digital Computers (AREA)
Shift Register Type Memory (AREA)

DE68916249T 1989-11-30 1989-11-30 Logikschaltung. Expired - Fee Related DE68916249T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
EP89312532A EP0429728B1 (de)	1989-11-30	1989-11-30	Logikschaltung

Publications (2)

Publication Number	Publication Date
DE68916249D1 true DE68916249D1 (de)	1994-07-21
DE68916249T2 DE68916249T2 (de)	1995-05-24

Family

ID=8202867

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE68916249T Expired - Fee Related DE68916249T2 (de)	1989-11-30	1989-11-30	Logikschaltung.

Country Status (4)

Country	Link
US (1)	US5157286A (de)
EP (1)	EP0429728B1 (de)
JP (1)	JPH0766341B2 (de)
DE (1)	DE68916249T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5235600A (en) *	1991-03-21	1993-08-10	Amdahl Corporation	Scannable system with addressable clock suppress elements
JP2744724B2 (ja) *	1991-10-03	1998-04-28	シャープ株式会社	データフロー型システムにおけるパケット収集回路
US5444404A (en) *	1994-03-03	1995-08-22	Vlsi Technology, Inc.	Scan flip-flop with power saving feature
KR20040081803A (ko) *	2002-02-21	2004-09-22	코닌클리즈케 필립스 일렉트로닉스 엔.브이.	집적 회로
US20080005634A1 (en) *	2006-06-29	2008-01-03	Grise Gary D	Scan chain circuitry that enables scan testing at functional clock speed
CN103454577A (zh) *	2012-05-31	2013-12-18	国际商业机器公司	扫描链结构和扫描链诊断的方法和设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3555433A (en) *	1968-02-26	1971-01-12	Rca Corp	Bidirectional shift register
US4627085A (en) *	1984-06-29	1986-12-02	Applied Micro Circuits Corporation	Flip-flop control circuit
JPS6249457A (ja) *	1985-08-28	1987-03-04	Ascii Corp	記憶装置
US4780874A (en) *	1987-04-20	1988-10-25	Tandem Computers Incorporated	Diagnostic apparatus for a data processing system
US4775653A (en) *	1987-04-28	1988-10-04	Vista Chemical Company	Alkoxylation process using calcium based catalysts
US4961013A (en) *	1989-10-18	1990-10-02	Hewlett-Packard Company	Apparatus for generation of scan control signals for initialization and diagnosis of circuitry in a computer

1989
- 1989-11-30 DE DE68916249T patent/DE68916249T2/de not_active Expired - Fee Related
- 1989-11-30 EP EP89312532A patent/EP0429728B1/de not_active Expired - Lifetime
1990
- 1990-02-23 US US07/484,144 patent/US5157286A/en not_active Expired - Fee Related
- 1990-10-31 JP JP2292236A patent/JPH0766341B2/ja not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0429728A1 (de)	1991-06-05
US5157286A (en)	1992-10-20
DE68916249T2 (de)	1995-05-24
JPH0766341B2 (ja)	1995-07-19
EP0429728B1 (de)	1994-06-15
JPH03181099A (ja)	1991-08-07

Publication	Publication Date	Title
DE69016850D1 (de)	1995-03-23	Lade-Entladeschaltung.
DE68917235D1 (de)	1994-09-08	Programmierbare logische Schaltung.
NO891828D0 (no)	1989-05-03	Integrert kretskort.
FI890607A0 (fi)	1989-02-08	Kopplingsanordning.
DE69018108D1 (de)	1995-05-04	Servo-Stromkreis.
DE69021683D1 (de)	1995-09-21	Selbstprüfbare Randlogikschaltung.
DE69017601D1 (de)	1995-04-13	Schaltungsanordnung.
DE69008464D1 (de)	1994-06-01	Schaltungsanordnung.
DE69001914D1 (de)	1993-07-22	Kommutierende schaltung.
DE69009218D1 (de)	1994-07-07	Speiseschaltung.
DE68901985D1 (de)	1992-08-13	Verzoegerungsschaltung.
DE3785833D1 (de)	1993-06-17	Logikschaltung.
DE68916093D1 (de)	1994-07-21	Integrierte Schaltung.
NO900183L (no)	1990-07-17	Magnetkrets.
DE3854012D1 (de)	1995-07-27	Fehlertolerante Logikschaltung.
DE68922594D1 (de)	1995-06-14	Integrierte Mikrowellenschaltung.
DE69023971D1 (de)	1996-01-18	Schaltungsmodul.
DE69021616D1 (de)	1995-09-21	Verzögerungsschaltung.
DE69023395D1 (de)	1995-12-14	Arbitrierungsschaltung.
DE58906111D1 (de)	1993-12-09	Oszillatorschaltung.
DE69014910D1 (de)	1995-01-26	Servoschaltungsanordnung.
DE69023358D1 (de)	1995-12-14	Logische Schaltung.
DE68916249D1 (de)	1994-07-21	Logikschaltung.
DE68920785D1 (de)	1995-03-09	Logische Schaltung.
DE3581936D1 (de)	1991-04-04	Integrierte logikschaltung.

Legal Events

Date	Code	Title	Description
1995-07-13	8364	No opposition during term of opposition
1997-11-06	8339	Ceased/non-payment of the annual fee