DE60325576D1 - Redundanzschema für einen integrierten Speicherbaustein - Google Patents

Redundanzschema für einen integrierten Speicherbaustein

Info

Publication number: DE60325576D1
Authority: DE; Germany
Prior art keywords: memory module; integrated memory; redundancy scheme; redundancy; scheme
Prior art date: 2003-07-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE60325576T

Other languages

English (en)

Inventor

Andrea Martinelli

Daniele Balluchi

Corrado Villa

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

STMicroelectronics SRL

Original Assignee

STMicroelectronics SRL

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2003-07-16

Filing date

2003-07-16

Publication date

2009-02-12

2003-07-16 Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL

2009-02-12 Application granted granted Critical

2009-02-12 Publication of DE60325576D1 publication Critical patent/DE60325576D1/de

2023-07-17 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption

DE60325576T 2003-07-16 2003-07-16 Redundanzschema für einen integrierten Speicherbaustein Expired - Lifetime DE60325576D1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
EP03077228A EP1498906B1 (de)	2003-07-16	2003-07-16	Redundanzschema für einen integrierten Speicherbaustein

Publications (1)

Publication Number	Publication Date
DE60325576D1 true DE60325576D1 (de)	2009-02-12

Family

ID=33462170

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE60325576T Expired - Lifetime DE60325576D1 (de)	2003-07-16	2003-07-16	Redundanzschema für einen integrierten Speicherbaustein

Country Status (3)

Country	Link
US (1)	US7154803B2 (de)
EP (1)	EP1498906B1 (de)
DE (1)	DE60325576D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2006185535A (ja) *	2004-12-28	2006-07-13	Nec Electronics Corp	半導体記憶装置
US8527819B2 (en) *	2007-10-19	2013-09-03	Apple Inc.	Data storage in analog memory cell arrays having erase failures
US7609569B2 (en) *	2007-11-19	2009-10-27	International Busines Machines Corporation	System and method for implementing row redundancy with reduced access time and reduced device area
US7796451B2 (en) *	2007-12-10	2010-09-14	Unity Semiconductor Corporation	Integrated circuits and methods to compensate for defective memory in multiple layers of memory
US9779796B1 (en)	2016-09-07	2017-10-03	Micron Technology, Inc.	Redundancy array column decoder for memory
CN111833941B (zh) *	2019-04-15	2022-09-02	中电海康集团有限公司	存储器的读电路与存储器
US11335416B1 (en)	2020-12-16	2022-05-17	Micron Technology, Inc.	Operational modes for reduced power consumption in a memory system
KR20230000168A (ko) *	2021-06-24	2023-01-02	에스케이하이닉스 주식회사	메모리, 메모리의 동작 방법 및 메모리 시스템의 동작 방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
WO1990012401A1 (en) *	1989-04-13	1990-10-18	Dallas Semiconductor Corporation	Memory with power supply intercept and redundancy logic
JP3001252B2 (ja) *	1990-11-16	2000-01-24	株式会社日立製作所	半導体メモリ
US5428621A (en) *	1992-09-21	1995-06-27	Sundisk Corporation	Latent defect handling in EEPROM devices
US5465233A (en) *	1993-05-28	1995-11-07	Sgs-Thomson Microelectronics, Inc.	Structure for deselecting broken select lines in memory arrays
US5822256A (en) *	1994-09-06	1998-10-13	Intel Corporation	Method and circuitry for usage of partially functional nonvolatile memory
US5768196A (en) *	1996-03-01	1998-06-16	Cypress Semiconductor Corp.	Shift-register based row select circuit with redundancy for a FIFO memory
US5946257A (en) *	1996-07-24	1999-08-31	Micron Technology, Inc.	Selective power distribution circuit for an integrated circuit
US6058052A (en) *	1997-08-21	2000-05-02	Cypress Semiconductor Corp.	Redundancy scheme providing improvements in redundant circuit access time and integrated circuit layout area
US6075729A (en) *	1997-09-05	2000-06-13	Hitachi, Ltd.	High-speed static random access memory
JP2000067595A (ja) *	1998-06-09	2000-03-03	Mitsubishi Electric Corp	半導体記憶装置
US6324103B2 (en) *	1998-11-11	2001-11-27	Hitachi, Ltd.	Semiconductor integrated circuit device, memory module, storage device and the method for repairing semiconductor integrated circuit device
JP4071378B2 (ja) *	1998-11-17	2008-04-02	株式会社ルネサステクノロジ	半導体回路装置
US6141267A (en) *	1999-02-03	2000-10-31	International Business Machines Corporation	Defect management engine for semiconductor memories and memory systems
US6249464B1 (en) *	1999-12-15	2001-06-19	Cypress Semiconductor Corp.	Block redundancy in ultra low power memory circuits
JP2004103143A (ja) *	2002-09-11	2004-04-02	Fujitsu Ltd	冗長構成を有するメモリ回路
DE60220278D1 (de) *	2002-09-30	2007-07-05	St Microelectronics Srl	Verfahren zum Detektieren eines widerstandsbehafteten Weges oder eines bestimmten Potentials in nicht-flüchtigen elektronischen Speichervorrichtungen

2003
- 2003-07-16 EP EP03077228A patent/EP1498906B1/de not_active Expired - Lifetime
- 2003-07-16 DE DE60325576T patent/DE60325576D1/de not_active Expired - Lifetime
2004
- 2004-07-16 US US10/893,760 patent/US7154803B2/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP1498906A1 (de)	2005-01-19
US20050047226A1 (en)	2005-03-03
US7154803B2 (en)	2006-12-26
EP1498906B1 (de)	2008-12-31

Publication	Publication Date	Title
DE50308451D1 (de)	2007-12-06	Gassack für ein Airbagmodul
DE60325509D1 (de)	2009-02-05	Schaltung für präzise speicherleseoperationen
DE602004023162D1 (de)	2009-10-29	Speicherkarte
DE60315613D1 (de)	2007-09-27	Schreibschaltung für Phasenwechsel-Speicher
DE502004003088D1 (de)	2007-04-19	Module für Etikettiermaschinen
DE60210416D1 (de)	2006-05-18	Speicherkarte
DE60326423D1 (de)	2009-04-16	Klebestruktur für einen Motor
DE602004031437D1 (de)	2011-03-31	Integriertes kennzeichnungssystem für einen elektronischen stossdämpfer
DE602006008084D1 (de)	2009-09-10	Speicherkartenadapter
DE602004026129D1 (de)	2010-04-29	Montagestruktur für kompaktes Kameramodul
DE102004033444B8 (de)	2008-10-16	Integrierter Speicherschaltungsbaustein
DE60305752D1 (de)	2006-07-20	SpeicherKarte
DE60322449D1 (de)	2008-09-04	Steuermodul
DE60232053D1 (de)	2009-06-04	Sprachkommentare für Chipkarten
DE602006002691D1 (de)	2008-10-23	Haltevorrichtung für einen Airbagmodul
DE50305647D1 (de)	2006-12-21	Lagerung für wischerantriebe
DE60325576D1 (de)	2009-02-12	Redundanzschema für einen integrierten Speicherbaustein
DE502004010138D1 (de)	2009-11-12	Schaltungsmodul
DE602005013212D1 (de)	2009-04-23	Halbleiter-speicherkarte
NL1027613A1 (nl)	2005-05-30	Geheugenmodule.
DE50310371D1 (de)	2008-10-02	Träger für modulgehäuse
DE60230129D1 (de)	2009-01-15	Zeilenauswahlschaltung für Speicherzellenarray
DE50301973D1 (de)	2006-01-26	Gassackmodul
DE50302160D1 (de)	2006-04-06	Gassackmodul
DE60202024D1 (de)	2004-12-30	Anpassungsmodul für Karte

Legal Events

Date	Code	Title	Description
2010-01-21	8364	No opposition during term of opposition