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DE60321010D1 - Scan-testbarer FIFO-Speicher - Google Patents

Scan-testbarer FIFO-Speicher

Info

Publication number
DE60321010D1
DE60321010D1 DE60321010T DE60321010T DE60321010D1 DE 60321010 D1 DE60321010 D1 DE 60321010D1 DE 60321010 T DE60321010 T DE 60321010T DE 60321010 T DE60321010 T DE 60321010T DE 60321010 D1 DE60321010 D1 DE 60321010D1
Authority
DE
Germany
Prior art keywords
testable
scan
fifo memory
fifo
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60321010T
Other languages
English (en)
Inventor
Jerome Bombal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments France SAS
Texas Instruments Inc
Original Assignee
Texas Instruments France SAS
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments France SAS, Texas Instruments Inc filed Critical Texas Instruments France SAS
Application granted granted Critical
Publication of DE60321010D1 publication Critical patent/DE60321010D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/003—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation in serial memories
DE60321010T 2003-11-26 2003-11-26 Scan-testbarer FIFO-Speicher Expired - Lifetime DE60321010D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03292958A EP1538635B1 (de) 2003-11-26 2003-11-26 Scan-testbarer FIFO-Speicher

Publications (1)

Publication Number Publication Date
DE60321010D1 true DE60321010D1 (de) 2008-06-26

Family

ID=34443095

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60321010T Expired - Lifetime DE60321010D1 (de) 2003-11-26 2003-11-26 Scan-testbarer FIFO-Speicher

Country Status (3)

Country Link
US (1) US20050114612A1 (de)
EP (1) EP1538635B1 (de)
DE (1) DE60321010D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8201172B1 (en) 2005-12-14 2012-06-12 Nvidia Corporation Multi-threaded FIFO memory with speculative read and write capability
US7630389B1 (en) * 2005-12-14 2009-12-08 Nvidia Corporation Multi-thread FIFO memory generator
US7756148B1 (en) * 2005-12-14 2010-07-13 Nvidia Corporation Multi-threaded FIFO memory generator with speculative read and write capability
US8429661B1 (en) 2005-12-14 2013-04-23 Nvidia Corporation Managing multi-threaded FIFO memory by determining whether issued credit count for dedicated class of threads is less than limit
US7779316B2 (en) * 2007-12-05 2010-08-17 Oracle America, Inc. Method of testing memory array at operational speed using scan
US10528131B2 (en) * 2018-05-16 2020-01-07 Tobii Ab Method to reliably detect correlations between gaze and stimuli
US10747466B2 (en) * 2018-12-28 2020-08-18 Texas Instruments Incorporated Save-restore in integrated circuits
EP3938943A1 (de) * 2019-03-14 2022-01-19 Xenergic AB Verfahren zur implementierung einer integrierten schaltung mit direktzugriffsspeicher-in-logik
EP4097623A1 (de) * 2020-01-31 2022-12-07 Synopsys, Inc. System und verfahren zum erfassen von hardware-emulationsdaten

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4947357A (en) * 1988-02-24 1990-08-07 Stellar Computer, Inc. Scan testing a digital system using scan chains in integrated circuits
US5784382A (en) * 1995-03-01 1998-07-21 Unisys Corporation Method and apparatus for dynamically testing a memory within a computer system
JPH10188597A (ja) * 1996-12-19 1998-07-21 Advantest Corp メモリ試験装置
US6049901A (en) * 1997-09-16 2000-04-11 Stock; Mary C. Test system for integrated circuits using a single memory for both the parallel and scan modes of testing
US6157210A (en) * 1997-10-16 2000-12-05 Altera Corporation Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits
US5995988A (en) * 1997-12-04 1999-11-30 Xilinx, Inc. Configurable parallel and bit serial load apparatus
US6343358B1 (en) * 1999-05-19 2002-01-29 Arm Limited Executing multiple debug instructions
US6584584B1 (en) * 2000-04-10 2003-06-24 Opentv, Inc. Method and apparatus for detecting errors in a First-In-First-Out buffer
US6738795B1 (en) * 2000-05-30 2004-05-18 Hewlett-Packard Development Company, L.P. Self-timed transmission system and method for processing multiple data sets
DE60132633T2 (de) * 2000-10-18 2009-01-15 Koninklijke Philips Electronics N.V. Digitale signalprozessorvorrichtung
US6748564B1 (en) * 2000-10-24 2004-06-08 Nptest, Llc Scan stream sequencing for testing integrated circuits
FR2821202B1 (fr) * 2001-02-21 2003-06-20 St Microelectronics Sa Procede de test d'un plan-memoire a acces sequentiel, et dispositif semiconducteur de memoire a acces sequentiel correspondant
JP2003332443A (ja) * 2002-05-08 2003-11-21 Toshiba Corp 半導体集積回路とその設計支援装置およびテスト方法
US6848042B1 (en) * 2003-03-28 2005-01-25 Xilinx, Inc. Integrated circuit and method of outputting data from a FIFO
US6882583B2 (en) * 2003-04-30 2005-04-19 International Business Machines Corporation Method and apparatus for implementing DRAM redundancy fuse latches using SRAM
US7047468B2 (en) * 2003-09-25 2006-05-16 International Business Machines Corporation Method and apparatus for low overhead circuit scan
US7181663B2 (en) * 2004-03-01 2007-02-20 Verigy Pte, Ltd. Wireless no-touch testing of integrated circuits

Also Published As

Publication number Publication date
EP1538635A1 (de) 2005-06-08
US20050114612A1 (en) 2005-05-26
EP1538635B1 (de) 2008-05-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition