[go: up one dir, main page]

DE60314145D1 - Methode und vorrichtung welche einen externen zugriff zu internen konfigurationsregistern erlauben - Google Patents

Methode und vorrichtung welche einen externen zugriff zu internen konfigurationsregistern erlauben

Info

Publication number
DE60314145D1
DE60314145D1 DE60314145T DE60314145T DE60314145D1 DE 60314145 D1 DE60314145 D1 DE 60314145D1 DE 60314145 T DE60314145 T DE 60314145T DE 60314145 T DE60314145 T DE 60314145T DE 60314145 D1 DE60314145 D1 DE 60314145D1
Authority
DE
Germany
Prior art keywords
configuration
internal configuration
configuration registers
access
external access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60314145T
Other languages
English (en)
Other versions
DE60314145T2 (de
Inventor
Aniruddha Joshi
John Lee
Atul Kwatra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60314145D1 publication Critical patent/DE60314145D1/de
Publication of DE60314145T2 publication Critical patent/DE60314145T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0024Peripheral component interconnect [PCI]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE60314145T 2002-06-28 2003-04-02 Methode und vorrichtung welche einen externen zugriff zu internen konfigurationsregistern erlauben Expired - Lifetime DE60314145T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US183641 2002-06-28
US10/183,641 US6973526B2 (en) 2002-06-28 2002-06-28 Method and apparatus to permit external access to internal configuration registers
PCT/US2003/010245 WO2004003761A1 (en) 2002-06-28 2003-04-02 Method and apparatus to permit external access to internal configuration registers

Publications (2)

Publication Number Publication Date
DE60314145D1 true DE60314145D1 (de) 2007-07-12
DE60314145T2 DE60314145T2 (de) 2008-01-24

Family

ID=29779171

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60314145T Expired - Lifetime DE60314145T2 (de) 2002-06-28 2003-04-02 Methode und vorrichtung welche einen externen zugriff zu internen konfigurationsregistern erlauben

Country Status (8)

Country Link
US (2) US6973526B2 (de)
EP (1) EP1522022B1 (de)
CN (1) CN1679009B (de)
AT (1) ATE363690T1 (de)
AU (1) AU2003223437A1 (de)
DE (1) DE60314145T2 (de)
TW (1) TWI273416B (de)
WO (1) WO2004003761A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6954809B2 (en) * 2002-09-27 2005-10-11 Via Technologies, Inc. Apparatus and method for accessing computer system resources via serial bus
JP4217452B2 (ja) * 2002-09-30 2009-02-04 キヤノン株式会社 プロセッサシステム
US7366872B2 (en) * 2003-12-30 2008-04-29 Intel Corporation Method for addressing configuration registers by scanning for a structure in configuration space and adding a known offset
US7103703B1 (en) * 2004-06-14 2006-09-05 Advanced Micro Devices, Inc. Back to back connection of PCI host bridges on a single PCI bus
US7987312B2 (en) * 2004-07-30 2011-07-26 Via Technologies, Inc. Method and apparatus for dynamically determining bit configuration
CN100426199C (zh) * 2006-12-20 2008-10-15 华为技术有限公司 一种配置寄存器及其寄存方法
TW200910052A (en) * 2007-08-16 2009-03-01 Acer Inc Notebook with a miniature projector
US20090094044A1 (en) * 2007-10-06 2009-04-09 Peterson Jr Harold Lee System, method and computer-readable medium for configuring a computer via a network to generate a personalized user experience
US9330027B2 (en) 2013-03-15 2016-05-03 Intel Corporation Register access white listing
FR3026869B1 (fr) * 2014-10-07 2016-10-28 Sagem Defense Securite Systeme embarque sur puce a haute surete de fonctionnement
US10394711B2 (en) * 2016-11-30 2019-08-27 International Business Machines Corporation Managing lowest point of coherency (LPC) memory using a service layer adapter
US11656594B2 (en) 2019-10-22 2023-05-23 Fisher-Rosemount Systems, Inc. Technologies for configuring voting blocks associated with a process control system
CN113179216B (zh) * 2021-04-23 2023-05-02 北京物芯科技有限责任公司 一种寄存器的远程配置方法、计算机设备及存储介质

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408612A (en) * 1992-09-09 1995-04-18 Digital Equipment Corporation Microprocessor system for selectively accessing a processor internal register when the processor has control of the bus and partial address identifying the register
US5299315A (en) * 1992-09-17 1994-03-29 International Business Machines Corp. Personal computer with programmable threshold FIFO registers for data transfer
US6518874B2 (en) 1998-06-17 2003-02-11 Micron Technology, Inc. Portable computer supporting paging functions
US6119192A (en) * 1998-10-21 2000-09-12 Integrated Technology Express, Inc. Circuit and method for configuring a bus bridge using parameters from a supplemental parameter memory
US6408334B1 (en) * 1999-01-13 2002-06-18 Dell Usa, L.P. Communications system for multiple computer system management circuits
US6381636B1 (en) 1999-03-10 2002-04-30 International Business Machines Corporation Data processing system and method for permitting a server to remotely access a powered-off client computer system's asset information
US6763458B1 (en) * 1999-09-27 2004-07-13 Captaris, Inc. System and method for installing and servicing an operating system in a computer or information appliance
KR100477637B1 (ko) * 1999-11-10 2005-03-23 삼성전자주식회사 컴퓨터의 도킹 시스템
US6446150B1 (en) * 1999-12-02 2002-09-03 International Business Machines Corporation Method of and system for managing reselection on a SCSI bus
US7006522B1 (en) * 2001-02-28 2006-02-28 3Com Corporation System and method for alert generation using network interface
WO2002086989A2 (en) * 2001-04-24 2002-10-31 Broadcom Corporation Alerting system, architecture and circuitry
US6574708B2 (en) * 2001-05-18 2003-06-03 Broadcom Corporation Source controlled cache allocation
TW514791B (en) * 2001-05-28 2002-12-21 Via Tech Inc Structure, method and related control chip for accessing device of computer system with system management bus
US7120720B1 (en) * 2001-11-01 2006-10-10 Advanced Micro Devices, Inc. Microcomputer bridge for remote manageability
US6990549B2 (en) * 2001-11-09 2006-01-24 Texas Instruments Incorporated Low pin count (LPC) I/O bridge

Also Published As

Publication number Publication date
TWI273416B (en) 2007-02-11
US6973526B2 (en) 2005-12-06
CN1679009A (zh) 2005-10-05
DE60314145T2 (de) 2008-01-24
TW200404214A (en) 2004-03-16
CN1679009B (zh) 2010-05-26
EP1522022B1 (de) 2007-05-30
ATE363690T1 (de) 2007-06-15
US20060075177A1 (en) 2006-04-06
AU2003223437A1 (en) 2004-01-19
WO2004003761A1 (en) 2004-01-08
EP1522022A1 (de) 2005-04-13
US20040003161A1 (en) 2004-01-01

Similar Documents

Publication Publication Date Title
DE60008088D1 (de) Mehrprozessorsystem Prüfungsschaltung
DE60314145D1 (de) Methode und vorrichtung welche einen externen zugriff zu internen konfigurationsregistern erlauben
DE60336247D1 (de) Bilddatenverarbeitungsverfahren, bilddatenverarbeitungseinrichtung und computerprogramm
AU2003222411A8 (en) Access to a wide memory
EP1486860A4 (de) Bildverarbeitungseinrichtung, bildverarbeitungsprogramm und bildverarbeitungsverfahren
WO2006118667A3 (en) Prefetching across a page boundary
EP1213650A3 (de) Auf aktueller Aufgabe basierte Prioritätsarbitrierung und Speicherverwaltungseinheit
EP1688816A4 (de) Datenverarbeitungseinrichtung
EP1560431A4 (de) Vorrichtung zur datenverarbeitung
JP2006505046A5 (de)
EP1517554A4 (de) Datenverarbeitungseinrichtung
EP1211601A4 (de) Akten-verarbeitungs-verfahren, daten-verarbeitungs-vorrichtung und speichermedium
DE60042332D1 (de) Mechanismus zur umordnung von transaktionen in rechnersystemen mit snoopbasierten cachespeicherkohärenz-protokollen
EP1369787A3 (de) Prozessor, Informationsverarbeitungsgerät, Kompiliervorrichtung, und Kompilierverfahren mittels dieses Prozessors
EP1566937A4 (de) "informationsverarbeitungseinrichtung, informationsverarbeitungsverfahren und computerprogramm"
TW200630799A (en) Memory system and method having uni-directional data buses
GB2432943A (en) Data transfer into a processor cache using a DMA controller in the processor
BRPI0415551A (pt) sistemas e processos de distribuição de conteúdo
EP1615433A4 (de) Datenverarbeitungseinrichtung
DE60325605D1 (de) Verfahren, system und programm zum speicherbasierten datentransfer
WO2003090231A3 (en) Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
EP1429251A3 (de) Adressbereichsvergleicher für die Entdeckung von Speicherzugriffen variabler Grösse mit einer Datenvergleichsqualifizierung und voller oder partieller Überlappung
陳秀芬 The treatment effectiveness of top-down approaches for children with developmental coordination disorder: A meta-analysis
US7120749B2 (en) Cache mechanism
EP1674986A4 (de) Datenverarbeitungseinrichtung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition