DE60140068D1 - Erneutes starten der übersetzten befehle - Google Patents
Erneutes starten der übersetzten befehleInfo
- Publication number
- DE60140068D1 DE60140068D1 DE60140068T DE60140068T DE60140068D1 DE 60140068 D1 DE60140068 D1 DE 60140068D1 DE 60140068 T DE60140068 T DE 60140068T DE 60140068 T DE60140068 T DE 60140068T DE 60140068 D1 DE60140068 D1 DE 60140068D1
- Authority
- DE
- Germany
- Prior art keywords
- restart
- translated commands
- translated
- commands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
- G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Devices For Executing Special Programs (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0024402A GB2367653B (en) | 2000-10-05 | 2000-10-05 | Restarting translated instructions |
| PCT/GB2001/002741 WO2002029555A1 (en) | 2000-10-05 | 2001-06-21 | Restarting translated instructions |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE60140068D1 true DE60140068D1 (de) | 2009-11-12 |
Family
ID=9900736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE60140068T Expired - Lifetime DE60140068D1 (de) | 2000-10-05 | 2001-06-21 | Erneutes starten der übersetzten befehle |
Country Status (12)
| Country | Link |
|---|---|
| US (1) | US7003652B2 (de) |
| EP (1) | EP1323032B1 (de) |
| JP (1) | JP4950408B2 (de) |
| KR (1) | KR100890243B1 (de) |
| CN (1) | CN1287270C (de) |
| DE (1) | DE60140068D1 (de) |
| GB (1) | GB2367653B (de) |
| IL (2) | IL151396A0 (de) |
| MY (1) | MY127147A (de) |
| RU (1) | RU2263949C2 (de) |
| TW (1) | TWI224280B (de) |
| WO (1) | WO2002029555A1 (de) |
Families Citing this family (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100584964B1 (ko) * | 1996-01-24 | 2006-05-29 | 선 마이크로시스템즈 인코퍼레이티드 | 스택 메모리 구조에서의 캐싱 장치 |
| US7162612B2 (en) * | 2000-08-16 | 2007-01-09 | Ip-First, Llc | Mechanism in a microprocessor for executing native instructions directly from memory |
| KR20040058228A (ko) * | 2001-10-25 | 2004-07-03 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 낮은 오버헤드의 예외 체킹 |
| US7155718B1 (en) * | 2002-04-04 | 2006-12-26 | Applied Micro Circuits Corp. | Method and apparatus to suspend and resume on next instruction for a microcontroller |
| JP2004094533A (ja) * | 2002-08-30 | 2004-03-25 | Hajime Seki | 計算機システム |
| JP4127495B2 (ja) * | 2002-09-05 | 2008-07-30 | 株式会社ルネサステクノロジ | 情報処理装置 |
| US9158574B2 (en) | 2002-11-18 | 2015-10-13 | Arm Limited | Handling interrupts in data processing |
| US7539853B2 (en) | 2002-11-18 | 2009-05-26 | Arm Limited | Handling interrupts in data processing of data in which only a portion of a function has been processed |
| GB2406684B (en) * | 2002-12-12 | 2005-08-24 | Advanced Risc Mach Ltd | Processing activity masking in a data processing system |
| DE102004025418A1 (de) * | 2004-05-24 | 2005-12-22 | Infineon Technologies Ag | Controller mit einer Decodiereinrichtung |
| DE102004025419A1 (de) * | 2004-05-24 | 2005-12-22 | Infineon Technologies Ag | Controller und Verfahren zum Verarbeiten von Befehlen |
| US8621444B2 (en) * | 2004-06-01 | 2013-12-31 | The Regents Of The University Of California | Retargetable instruction set simulators |
| EP1622009A1 (de) * | 2004-07-27 | 2006-02-01 | Texas Instruments Incorporated | JSM-Architektur und Systeme |
| GB2424092A (en) * | 2005-03-11 | 2006-09-13 | Transitive Ltd | Switching between code translation and execution using a trampoline |
| US7769983B2 (en) * | 2005-05-18 | 2010-08-03 | Qualcomm Incorporated | Caching instructions for a multiple-state processor |
| RU2320002C2 (ru) * | 2006-04-18 | 2008-03-20 | Общество с ограниченной ответственностью "Юникор микросистемы" | Способ переключения контекста задач и процедур в процессоре |
| US8010849B2 (en) * | 2006-09-05 | 2011-08-30 | Arm Limited | Diagnosing faults within programs being executed by virtual machines |
| US7711927B2 (en) * | 2007-03-14 | 2010-05-04 | Qualcomm Incorporated | System, method and software to preload instructions from an instruction set other than one currently executing |
| US8489989B1 (en) * | 2008-07-15 | 2013-07-16 | Adobe Systems Incorporated | Methods and systems for preflighting using multiple preflight profiles |
| US9645822B2 (en) | 2011-04-07 | 2017-05-09 | Via Technologies, Inc | Conditional store instructions in an out-of-order execution microprocessor |
| US9032189B2 (en) | 2011-04-07 | 2015-05-12 | Via Technologies, Inc. | Efficient conditional ALU instruction in read-port limited register file microprocessor |
| US9146742B2 (en) | 2011-04-07 | 2015-09-29 | Via Technologies, Inc. | Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA |
| US9378019B2 (en) | 2011-04-07 | 2016-06-28 | Via Technologies, Inc. | Conditional load instructions in an out-of-order execution microprocessor |
| US9128701B2 (en) | 2011-04-07 | 2015-09-08 | Via Technologies, Inc. | Generating constant for microinstructions from modified immediate field during instruction translation |
| US8880851B2 (en) | 2011-04-07 | 2014-11-04 | Via Technologies, Inc. | Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline |
| US9292470B2 (en) | 2011-04-07 | 2016-03-22 | Via Technologies, Inc. | Microprocessor that enables ARM ISA program to access 64-bit general purpose registers written by x86 ISA program |
| US9336180B2 (en) | 2011-04-07 | 2016-05-10 | Via Technologies, Inc. | Microprocessor that makes 64-bit general purpose registers available in MSR address space while operating in non-64-bit mode |
| US9043580B2 (en) | 2011-04-07 | 2015-05-26 | Via Technologies, Inc. | Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA) |
| US8924695B2 (en) | 2011-04-07 | 2014-12-30 | Via Technologies, Inc. | Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor |
| US9141389B2 (en) | 2011-04-07 | 2015-09-22 | Via Technologies, Inc. | Heterogeneous ISA microprocessor with shared hardware ISA registers |
| US9317288B2 (en) | 2011-04-07 | 2016-04-19 | Via Technologies, Inc. | Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline |
| US9176733B2 (en) | 2011-04-07 | 2015-11-03 | Via Technologies, Inc. | Load multiple and store multiple instructions in a microprocessor that emulates banked registers |
| US9274795B2 (en) | 2011-04-07 | 2016-03-01 | Via Technologies, Inc. | Conditional non-branch instruction prediction |
| US8880857B2 (en) | 2011-04-07 | 2014-11-04 | Via Technologies, Inc. | Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor |
| US9898291B2 (en) | 2011-04-07 | 2018-02-20 | Via Technologies, Inc. | Microprocessor with arm and X86 instruction length decoders |
| US9244686B2 (en) | 2011-04-07 | 2016-01-26 | Via Technologies, Inc. | Microprocessor that translates conditional load/store instructions into variable number of microinstructions |
| US8914615B2 (en) | 2011-12-02 | 2014-12-16 | Arm Limited | Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format |
| WO2013132767A1 (ja) | 2012-03-09 | 2013-09-12 | パナソニック株式会社 | プロセッサ、マルチプロセッサシステム、コンパイラ、ソフトウェアシステム、メモリ制御システムおよびコンピュータシステム |
| GB2514618B (en) * | 2013-05-31 | 2020-11-11 | Advanced Risc Mach Ltd | Data processing systems |
| US9727944B2 (en) | 2015-06-22 | 2017-08-08 | Apple Inc. | GPU instruction storage |
| CN110945482A (zh) * | 2017-08-02 | 2020-03-31 | 飞力凯网路股份有限公司 | 信息处理装置和信息处理方法 |
| JP7581191B2 (ja) | 2019-03-07 | 2024-11-12 | イラミーナ インコーポレーテッド | 短タンデム反復領域の変動を決定するための配列グラフ系ツール |
| CN112817812B (zh) * | 2020-12-31 | 2022-11-04 | 深圳市联影高端医疗装备创新研究院 | 序列翻译模拟方法、装置、设备及存储介质 |
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-
2000
- 2000-10-05 GB GB0024402A patent/GB2367653B/en not_active Expired - Lifetime
-
2001
- 2001-06-21 CN CNB018108180A patent/CN1287270C/zh not_active Expired - Lifetime
- 2001-06-21 RU RU2002127807/09A patent/RU2263949C2/ru not_active IP Right Cessation
- 2001-06-21 IL IL15139601A patent/IL151396A0/xx active IP Right Grant
- 2001-06-21 JP JP2002533061A patent/JP4950408B2/ja not_active Expired - Lifetime
- 2001-06-21 DE DE60140068T patent/DE60140068D1/de not_active Expired - Lifetime
- 2001-06-21 EP EP01940796A patent/EP1323032B1/de not_active Expired - Lifetime
- 2001-06-21 WO PCT/GB2001/002741 patent/WO2002029555A1/en not_active Ceased
- 2001-06-21 KR KR1020037004687A patent/KR100890243B1/ko not_active Expired - Lifetime
- 2001-06-25 US US09/887,559 patent/US7003652B2/en not_active Expired - Lifetime
- 2001-07-14 MY MYPI20013351 patent/MY127147A/en unknown
- 2001-09-25 TW TW090123666A patent/TWI224280B/zh not_active IP Right Cessation
-
2002
- 2002-08-21 IL IL151396A patent/IL151396A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| MY127147A (en) | 2006-11-30 |
| US20020066003A1 (en) | 2002-05-30 |
| EP1323032B1 (de) | 2009-09-30 |
| GB0024402D0 (en) | 2000-11-22 |
| JP2004511041A (ja) | 2004-04-08 |
| JP4950408B2 (ja) | 2012-06-13 |
| IL151396A (en) | 2008-08-07 |
| KR100890243B1 (ko) | 2009-03-24 |
| IL151396A0 (en) | 2003-04-10 |
| EP1323032A1 (de) | 2003-07-02 |
| RU2002127807A (ru) | 2004-02-27 |
| KR20030034243A (ko) | 2003-05-01 |
| RU2263949C2 (ru) | 2005-11-10 |
| TWI224280B (en) | 2004-11-21 |
| CN1434938A (zh) | 2003-08-06 |
| GB2367653B (en) | 2004-10-20 |
| WO2002029555A1 (en) | 2002-04-11 |
| GB2367653A (en) | 2002-04-10 |
| US7003652B2 (en) | 2006-02-21 |
| CN1287270C (zh) | 2006-11-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |