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DE60126800D1 - Burstread mit ausgangbasierter redundanz - Google Patents

Burstread mit ausgangbasierter redundanz

Info

Publication number
DE60126800D1
DE60126800D1 DE60126800T DE60126800T DE60126800D1 DE 60126800 D1 DE60126800 D1 DE 60126800D1 DE 60126800 T DE60126800 T DE 60126800T DE 60126800 T DE60126800 T DE 60126800T DE 60126800 D1 DE60126800 D1 DE 60126800D1
Authority
DE
Germany
Prior art keywords
defective
memory cells
output
redundant
regular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60126800T
Other languages
English (en)
Other versions
DE60126800T2 (de
Inventor
Ali Al-Shamma
Takao Akaogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Spansion LLC
Original Assignee
Advanced Micro Devices Inc
Spansion LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc, Spansion LLC filed Critical Advanced Micro Devices Inc
Publication of DE60126800D1 publication Critical patent/DE60126800D1/de
Application granted granted Critical
Publication of DE60126800T2 publication Critical patent/DE60126800T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16—Protection against loss of memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G11C15/046—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements using non-volatile storage elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Radio Relay Systems (AREA)
  • Error Detection And Correction (AREA)
DE60126800T 2000-07-25 2001-07-17 Burstread mit ausgangbasierter redundanz Expired - Lifetime DE60126800T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US22069000P 2000-07-25 2000-07-25
US220690P 2000-07-25
US09/724,669 US6307787B1 (en) 2000-07-25 2000-11-28 Burst read incorporating output based redundancy
US724669 2000-11-28
PCT/US2001/022646 WO2002017078A2 (en) 2000-07-25 2001-07-17 Burst read incorporating output based redundancy

Publications (2)

Publication Number Publication Date
DE60126800D1 true DE60126800D1 (de) 2007-04-05
DE60126800T2 DE60126800T2 (de) 2007-11-29

Family

ID=26915092

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60126800T Expired - Lifetime DE60126800T2 (de) 2000-07-25 2001-07-17 Burstread mit ausgangbasierter redundanz

Country Status (11)

Country Link
US (1) US6307787B1 (de)
EP (1) EP1327193B1 (de)
JP (2) JP5406420B2 (de)
KR (1) KR100822486B1 (de)
CN (1) CN1275159C (de)
AT (1) ATE354828T1 (de)
AU (1) AU2001275976A1 (de)
BR (1) BR0112740A (de)
DE (1) DE60126800T2 (de)
TW (1) TW533411B (de)
WO (1) WO2002017078A2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6396749B2 (en) * 2000-05-31 2002-05-28 Advanced Micro Devices, Inc. Dual-ported CAMs for a simultaneous operation flash memory
US6498506B1 (en) 2000-07-26 2002-12-24 Gore Enterprise Holdings, Inc. Spring probe assemblies
US6751755B1 (en) * 2000-09-13 2004-06-15 Cypress Semiconductor Corporation Content addressable memory having redundancy capabilities
JP4259922B2 (ja) * 2002-07-30 2009-04-30 シャープ株式会社 半導体記憶装置
JP4469649B2 (ja) 2003-09-17 2010-05-26 株式会社ルネサステクノロジ 半導体フラッシュメモリ
KR100624287B1 (ko) * 2004-05-11 2006-09-18 에스티마이크로일렉트로닉스 엔.브이. 낸드 플래시 메모리 소자의 리던던시 회로
US7193895B2 (en) * 2005-06-24 2007-03-20 Chingis Technology Corporation Redundant memory content substitution apparatus and method
US7301832B2 (en) * 2005-11-03 2007-11-27 Atmel Corporation Compact column redundancy CAM architecture for concurrent read and write operations in multi-segment memory arrays
US11119857B2 (en) * 2012-09-18 2021-09-14 Mosys, Inc. Substitute redundant memory
KR20120105155A (ko) * 2011-03-15 2012-09-25 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이의 동작 방법
CN110176264B (zh) * 2019-04-26 2021-05-07 安徽大学 一种基于内存内计算的高低位合并电路结构
KR102840199B1 (ko) * 2019-12-17 2025-08-01 삼성전자주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
US11848269B2 (en) * 2021-10-04 2023-12-19 Advanced Micro Devices, Inc. Techniques to create power connections from floating nets in standard cells
CN114220475B (zh) * 2021-12-15 2024-10-29 珠海深圳清华大学研究院创新中心 一种闪存芯片的缺陷检测方法及系统

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0380500A (ja) * 1989-08-24 1991-04-05 Sharp Corp 半導体記憶装置
JPH05166396A (ja) 1991-12-12 1993-07-02 Mitsubishi Electric Corp 半導体メモリ装置
US5471426A (en) * 1992-01-31 1995-11-28 Sgs-Thomson Microelectronics, Inc. Redundancy decoder
US5347484A (en) * 1992-06-19 1994-09-13 Intel Corporation Nonvolatile memory with blocked redundant columns and corresponding content addressable memory sets
US5438546A (en) * 1994-06-02 1995-08-01 Intel Corporation Programmable redundancy scheme suitable for single-bit state and multibit state nonvolatile memories
US5502676A (en) * 1995-04-24 1996-03-26 Motorola, Inc. Integrated circuit memory with column redundancy having shared read global data lines
US5574688A (en) * 1995-05-10 1996-11-12 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column
KR100192574B1 (ko) * 1995-10-04 1999-06-15 윤종용 디코디드 퓨즈를 사용한 반도체 메모리 장치의 컬럼 리던던시 회로
JPH09204790A (ja) * 1996-01-24 1997-08-05 Hitachi Ltd 半導体記憶装置
US5774396A (en) * 1996-03-29 1998-06-30 Aplus Integrated Circuits, Inc. Flash memory with row redundancy
DE69626792T2 (de) * 1996-05-09 2004-03-25 Stmicroelectronics S.R.L., Agrate Brianza Elektrische löschbare und programmierbare nichtflüchtige Speicheranordnung mit prüfbaren Redundanzschaltungen
JP3039400B2 (ja) 1996-11-21 2000-05-08 日本電気株式会社 不揮発性半導体記憶装置及び不揮発性半導体記憶装置におけるブロック消去のテスト方法
JPH10172294A (ja) * 1996-12-10 1998-06-26 Toshiba Corp 半導体記憶装置
JP2001052495A (ja) * 1999-06-03 2001-02-23 Toshiba Corp 半導体メモリ

Also Published As

Publication number Publication date
KR20030020410A (ko) 2003-03-08
KR100822486B1 (ko) 2008-04-16
JP5406420B2 (ja) 2014-02-05
BR0112740A (pt) 2003-07-01
JP2004507857A (ja) 2004-03-11
CN1444743A (zh) 2003-09-24
ATE354828T1 (de) 2007-03-15
WO2002017078A3 (en) 2002-08-01
TW533411B (en) 2003-05-21
JP2012155846A (ja) 2012-08-16
US6307787B1 (en) 2001-10-23
EP1327193B1 (de) 2007-02-21
DE60126800T2 (de) 2007-11-29
JP5937888B2 (ja) 2016-06-22
AU2001275976A1 (en) 2002-03-04
CN1275159C (zh) 2006-09-13
WO2002017078A2 (en) 2002-02-28
EP1327193A2 (de) 2003-07-16

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: ADVANCED MICRO DEVICES, INC., SUNNYVALE, CALIF, US

Owner name: SPANSION LLC, SUNNYVALE, CALIF., US

8364 No opposition during term of opposition