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DE60121537D1 - Verbindung von peripheren Schaltkreisen in einem Mikrocomputer - Google Patents

Verbindung von peripheren Schaltkreisen in einem Mikrocomputer

Info

Publication number
DE60121537D1
DE60121537D1 DE60121537T DE60121537T DE60121537D1 DE 60121537 D1 DE60121537 D1 DE 60121537D1 DE 60121537 T DE60121537 T DE 60121537T DE 60121537 T DE60121537 T DE 60121537T DE 60121537 D1 DE60121537 D1 DE 60121537D1
Authority
DE
Germany
Prior art keywords
microcomputer
connection
peripheral circuits
circuits
peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60121537T
Other languages
English (en)
Other versions
DE60121537T2 (de
Inventor
Tadahiro Ushiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE60121537D1 publication Critical patent/DE60121537D1/de
Application granted granted Critical
Publication of DE60121537T2 publication Critical patent/DE60121537T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7814—Specially adapted for real time processing, e.g. comprising hardware timers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
DE60121537T 2000-12-26 2001-12-18 Verbindung von peripheren Schaltkreisen in einem Mikrocomputer Expired - Lifetime DE60121537T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000395170 2000-12-26
JP2000395170A JP2002197049A (ja) 2000-12-26 2000-12-26 マイクロコンピュータ

Publications (2)

Publication Number Publication Date
DE60121537D1 true DE60121537D1 (de) 2006-08-31
DE60121537T2 DE60121537T2 (de) 2007-07-05

Family

ID=18860677

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60121537T Expired - Lifetime DE60121537T2 (de) 2000-12-26 2001-12-18 Verbindung von peripheren Schaltkreisen in einem Mikrocomputer

Country Status (7)

Country Link
US (1) US6826633B2 (de)
EP (1) EP1220109B1 (de)
JP (1) JP2002197049A (de)
KR (1) KR20020053021A (de)
CN (1) CN1199113C (de)
DE (1) DE60121537T2 (de)
TW (1) TWI223152B (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5087884B2 (ja) 2006-08-11 2012-12-05 富士通セミコンダクター株式会社 データ処理ユニット、およびこれを使用したデータ処理装置

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597625A (en) * 1979-01-17 1980-07-25 Fanuc Ltd Bus connection system
US4654820A (en) * 1983-11-30 1987-03-31 At&T Bell Laboratories Interrupt bus structure
US5142625A (en) * 1985-06-12 1992-08-25 Minolta Camera Kabushiki Kaisha One-chip microcomputer including a programmable logic array for interrupt control
JPH01162971A (ja) * 1987-09-09 1989-06-27 Hitachi Ltd シングルチップマイクロコンピュータ
US5111423A (en) * 1988-07-21 1992-05-05 Altera Corporation Programmable interface for computer system peripheral circuit card
US4952367A (en) * 1988-08-19 1990-08-28 Motorola, Inc. Timer channel for use in a multiple channel timer system
JP2690213B2 (ja) 1991-06-07 1997-12-10 日本電気アイシーマイコンシステム株式会社 マイクロコンピュータ
JPH05127913A (ja) 1991-11-05 1993-05-25 Toshiba Corp マイクロプロセツサシステム
CN1076532A (zh) 1993-03-04 1993-09-22 牛振有 微型计算机外设故障诊断方法及其装置
JPH0876995A (ja) * 1994-09-07 1996-03-22 Matsushita Electric Ind Co Ltd マイクロプロセッサ
US5630174A (en) * 1995-02-03 1997-05-13 Cirrus Logic, Inc. Adapter for detecting whether a peripheral is standard or multimedia type format and selectively switching the peripheral to couple or bypass the system bus
US5619706A (en) * 1995-03-02 1997-04-08 Intel Corporation Method and apparatus for switching between interrupt delivery mechanisms within a multi-processor system
US6263378B1 (en) * 1996-06-03 2001-07-17 Sun Microsystems, Inc. System and method for rapid development of bootstrap device detection modules
US5854908A (en) * 1996-10-15 1998-12-29 International Business Machines Corporation Computer system generating a processor interrupt in response to receiving an interrupt/data synchronizing signal over a data bus
US6154857A (en) * 1997-04-08 2000-11-28 Advanced Micro Devices, Inc. Microprocessor-based device incorporating a cache for capturing software performance profiling data
US5933656A (en) * 1997-06-18 1999-08-03 Raytheon Company System for interfacing host computer to multiple peripheral devices using daisy-chainable bus and federated computational input/output circuit card assemblies
US6044411A (en) * 1997-11-17 2000-03-28 International Business Machines Corporation Method and apparatus for correlating computer system device physical location with logical address
US6145020A (en) * 1998-05-14 2000-11-07 Advanced Technology Materials, Inc. Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array
JP3700759B2 (ja) * 1999-06-22 2005-09-28 株式会社デンソー パルス幅検出機能を有する１チップマイクロコンピュータ
US6510473B1 (en) * 1999-08-19 2003-01-21 Micron Technology, Inc. Apparatus and method for automatically selecting an appropriate signal from a plurality of signals, based on the configuration of a peripheral installed within a computing device

Also Published As

Publication number Publication date
EP1220109A2 (de) 2002-07-03
CN1199113C (zh) 2005-04-27
EP1220109B1 (de) 2006-07-19
KR20020053021A (ko) 2002-07-04
US20020083220A1 (en) 2002-06-27
US6826633B2 (en) 2004-11-30
JP2002197049A (ja) 2002-07-12
EP1220109A3 (de) 2004-04-28
CN1362674A (zh) 2002-08-07
DE60121537T2 (de) 2007-07-05
TWI223152B (en) 2004-11-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition