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DE60107577D1 - Datadekodierung - Google Patents

Datadekodierung

Info

Publication number
DE60107577D1
DE60107577D1 DE60107577T DE60107577T DE60107577D1 DE 60107577 D1 DE60107577 D1 DE 60107577D1 DE 60107577 T DE60107577 T DE 60107577T DE 60107577 T DE60107577 T DE 60107577T DE 60107577 D1 DE60107577 D1 DE 60107577D1
Authority
DE
Germany
Prior art keywords
current
input
currents
transistor
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60107577T
Other languages
English (en)
Other versions
DE60107577T2 (de
Inventor
William Redman-White
D Bramwell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE60107577D1 publication Critical patent/DE60107577D1/de
Application granted granted Critical
Publication of DE60107577T2 publication Critical patent/DE60107577T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3961Arrangements of methods for branch or transition metric calculation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/14Arrangements for performing computing operations, e.g. operational amplifiers for addition or subtraction 
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Surgical Instruments (AREA)
  • Holo Graphy (AREA)
  • Optical Communication System (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE60107577T 2000-08-02 2001-07-20 Datadekodierung Expired - Fee Related DE60107577T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GBGB0018843.3A GB0018843D0 (en) 2000-08-02 2000-08-02 Data decoding
GB0018843 2000-08-02
PCT/EP2001/008473 WO2002011293A1 (en) 2000-08-02 2001-07-20 Data decoding

Publications (2)

Publication Number Publication Date
DE60107577D1 true DE60107577D1 (de) 2005-01-05
DE60107577T2 DE60107577T2 (de) 2005-12-08

Family

ID=9896747

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60107577T Expired - Fee Related DE60107577T2 (de) 2000-08-02 2001-07-20 Datadekodierung

Country Status (8)

Country Link
US (1) US6963625B2 (de)
EP (1) EP1307970B1 (de)
JP (1) JP2004505400A (de)
KR (1) KR100828290B1 (de)
AT (1) ATE284093T1 (de)
DE (1) DE60107577T2 (de)
GB (1) GB0018843D0 (de)
WO (1) WO2002011293A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9360505B1 (en) * 2015-07-14 2016-06-07 Global Unichip Corporation Squelch detector
CN106533400B (zh) * 2015-09-09 2019-05-10 创意电子股份有限公司 振幅阈值检测器
US10395701B1 (en) * 2018-05-09 2019-08-27 Micron Technology, Inc. Memory device with a latching mechanism

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5059814A (en) * 1988-11-30 1991-10-22 The California Institute Of Technology Winner-take-all circuits for neural computing systems
GB2255482B (en) 1991-05-01 1995-05-10 Silicon Systems Inc Maximum likelihood sequence metric calculator
JP3088844B2 (ja) 1992-06-03 2000-09-18 パイオニア株式会社 ディジタル信号再生装置
JP3233485B2 (ja) 1993-04-06 2001-11-26 松下電器産業株式会社 ディジタル信号検出回路
US5491698A (en) 1993-12-16 1996-02-13 International Business Machines Corporation Setting optimal boundary thresholds in a decoder for coded signal processing channels
JP3467343B2 (ja) 1994-03-24 2003-11-17 シリコン システムズ インコーポレーテッド Prmlチャネルのためのビタビ検出器を実現するための装置
US5790495A (en) 1994-05-06 1998-08-04 Discovision Associates Data generator assembly for retrieving stored data by comparing threshold signal with preprocessed signal having DC component
JP2638520B2 (ja) 1994-11-22 1997-08-06 日本電気株式会社 光情報記録媒体再生装置
US5889430A (en) * 1997-06-26 1999-03-30 The Aerospace Corporation Current mode transistor circuit
US6255897B1 (en) * 1998-09-28 2001-07-03 Ericsson Inc. Current biasing circuit
GB0018842D0 (en) * 2000-08-02 2000-09-20 Koninkl Philips Electronics Nv Data decoder
GB0018841D0 (en) * 2000-08-02 2000-09-20 Koninkl Philips Electronics Nv Data decoding

Also Published As

Publication number Publication date
KR100828290B1 (ko) 2008-05-07
US20010050588A1 (en) 2001-12-13
EP1307970B1 (de) 2004-12-01
JP2004505400A (ja) 2004-02-19
WO2002011293A1 (en) 2002-02-07
EP1307970A1 (de) 2003-05-07
GB0018843D0 (en) 2000-09-20
US6963625B2 (en) 2005-11-08
KR20020048945A (ko) 2002-06-24
DE60107577T2 (de) 2005-12-08
ATE284093T1 (de) 2004-12-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

8339 Ceased/non-payment of the annual fee