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DE60017704D1 - Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher - Google Patents

Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher

Info

Publication number
DE60017704D1
DE60017704D1 DE60017704T DE60017704T DE60017704D1 DE 60017704 D1 DE60017704 D1 DE 60017704D1 DE 60017704 T DE60017704 T DE 60017704T DE 60017704 T DE60017704 T DE 60017704T DE 60017704 D1 DE60017704 D1 DE 60017704D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
column decoder
reading pages
pages
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60017704T
Other languages
English (en)
Inventor
Daniele Balluchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE60017704D1 publication Critical patent/DE60017704D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1021Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
DE60017704T 2000-02-29 2000-02-29 Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher Expired - Fee Related DE60017704D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00830149A EP1130601B1 (de) 2000-02-29 2000-02-29 Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher

Publications (1)

Publication Number Publication Date
DE60017704D1 true DE60017704D1 (de) 2005-03-03

Family

ID=8175211

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60017704T Expired - Fee Related DE60017704D1 (de) 2000-02-29 2000-02-29 Spaltedekodierer für das Lesen von Seiten in einem Halbleiterspeicher

Country Status (3)

Country Link
US (1) US6507534B2 (de)
EP (1) EP1130601B1 (de)
DE (1) DE60017704D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20012817A1 (it) * 2001-12-28 2003-06-28 St Microelectronics Srl Struttura di decodifica per un dispositivo di memoria con codice di controllo
KR100543448B1 (ko) * 2003-04-03 2006-01-23 삼성전자주식회사 버스트 읽기 동작 모드를 갖는 플래시 메모리 장치
US6975553B2 (en) * 2004-04-05 2005-12-13 Neomagic Israel Ltd. Nonaligned access to random access memory
ITMI20041910A1 (it) * 2004-10-08 2005-01-08 Atmel Corp Architettura di decodifica a colonne migliorata per memorie flash
KR100586558B1 (ko) * 2005-04-07 2006-06-08 주식회사 하이닉스반도체 컬럼 경로회로
US7099202B1 (en) * 2005-04-08 2006-08-29 Atmel Corporation Y-mux splitting scheme
KR100732633B1 (ko) * 2006-02-01 2007-06-27 삼성전자주식회사 비연속적인 비트라인 디코딩을 수행하는 플래시 메모리장치
TWI629684B (zh) * 2017-07-28 2018-07-11 華邦電子股份有限公司 記憶體裝置的行解碼器
JP2019040646A (ja) * 2017-08-22 2019-03-14 東芝メモリ株式会社 半導体記憶装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179687A (en) * 1987-09-26 1993-01-12 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device containing a cache and an operation method thereof
US5226147A (en) * 1987-11-06 1993-07-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device for simple cache system
US5285421A (en) * 1990-07-25 1994-02-08 Advanced Micro Devices Scheme for eliminating page boundary limitation on initial access of a serial contiguous access memory
US5696917A (en) * 1994-06-03 1997-12-09 Intel Corporation Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory
US5500819A (en) * 1994-09-30 1996-03-19 Cirrus Logic, Inc. Circuits, systems and methods for improving page accesses and block transfers in a memory system
US5901105A (en) * 1995-04-05 1999-05-04 Ong; Adrian E Dynamic random access memory having decoding circuitry for partial memory blocks
US5835436A (en) * 1995-07-03 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
JPH09288614A (ja) * 1996-04-22 1997-11-04 Mitsubishi Electric Corp 半導体集積回路装置、半導体記憶装置およびそのための制御回路
US5901086A (en) * 1996-12-26 1999-05-04 Motorola, Inc. Pipelined fast-access floating gate memory architecture and method of operation
US6172935B1 (en) * 1997-04-25 2001-01-09 Micron Technology, Inc. Synchronous dynamic random access memory device
US5999451A (en) * 1998-07-13 1999-12-07 Macronix International Co., Ltd. Byte-wide write scheme for a page flash device

Also Published As

Publication number Publication date
US6507534B2 (en) 2003-01-14
EP1130601A1 (de) 2001-09-05
EP1130601B1 (de) 2005-01-26
US20010028598A1 (en) 2001-10-11

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee