DE3921028A1 - Avalanche photodiode with mesa structure - including guard ring preventing edge breakdown - Google Patents

Abstract

An avalanche photodiode has, on a III-V semiconductor substrate (17), weakly doped first conductivity type absorption (27) and intermediate (47) layers, a highly doped opposite second conductivity type cover layer (67) as the uppermost grown semiconductor layer, a multiplication layer (57) which has higher first conductivity type doping than the intermediate layer (47) and which is located between the intermediate (47) and cover (67) layers, a second conductivity type doped guard ring (1), a first contact (37) having a light inlet opening and formed on the cover layer (67), and a second contact (97) applied onto part of the first conductivity type doped semiconductor material. The novelty is that (i) at least the multiplication (57) and cover (67) layers are grown on top of one another and are formed as a mesa; (ii) the guard ring (1) has a low second conductivity type doping level and is formed as an annulus in the mesa; (iii) the guard ring (i) extends from the cover layer surface, opposite the multiplciaton layer, at least to the intermediate layer (47); and (iv) the portion of the cover layer (67) within the guard ring (i) is provided for light entry. Prodn. of the avalanche photodiode is also claimed. ADVANTAGE - Edge breakdown is effectively prevented and the photodiode is simple to produce.

Description

The present invention relates to a top-lit avalanche photodiode in the material system InP / InGaAs (P) with separated absorption and multiplication layers (SAM-APD) and a method for their production. Fig. 1 shows the basic structure of such an avalanche photodiode. It has a p-doped region 61 on the surface and otherwise consists of n-doped material. The amount of p-doping is much higher than the amount of n-doping. In this component, the incident light is absorbed in the absorption layer 21 consisting of In _0.53 Ga _0.47 As (InGaAs). This creates electron-hole pairs that are separated from each other under the influence of an applied electric field. The holes formed are sucked into the multiplication layer 41 consisting of InP and multiplied there. Between the absorption layer 21 and the multiplication layer 41 there is at least one transition layer 31 made of InGaAsP, which serves to improve the time behavior of the diode (Y. Matsushima ea, Electron. Lett. 18, 945-946 (1982)).

The multiplication of holes should be evenly distributed over the area of the photodiode (active area). To achieve this multiplication (avalanche or avalanche breakthrough), high electric field strengths are required in the central, active area of the photodiode. With the necessary high applied voltages, higher electric fields occur at the edge of the component than in the active area, so that the multiplication of charge carriers first occurs at the edge (edge breakthrough). The level of the electric field strength depends on the n-doping and the curvature of the pn junction at the fixed applied voltage. The field strength increases with increasing n-doping and with increasing positive curvature (region 2 of positive curvature with dashed lines in FIG. 1). In Fig. 1, on the p region 61, a ring-shaped first contact 81 and a second contact 91 located on the underside of the substrate 11.

The first avalanche photodiodes in the material system InP / InGaAs (P) had a mesa structure to avoid the edge breakthrough ( FIGS. 2 and 3). In the photodiode shown in FIG. 2, the p⁺ region is formed by the substrate 12 , and the light is incident from the substrate side through an annular first contact 82 applied to the underside of the substrate 12 . On the side of the substrate 11 opposite the light entry, the multiplication layer 42 , at least one transition layer 32 and the absorption layer 22 are formed as a mesa. On the absorption layer 22 there is the second contact 92 .

The embodiment shown in FIG. 3 according to F. Osaka ea, Electron. Lett. 16, 716-717 (1980), in addition to the mesa etching, has a protective ring and a locally increased n-doping in the active region, as proposed by HW Ruegg in IEEE Trans. Electron Dev. ED-14, 239-251 (1967) has been. Here there is only a pn junction with a higher n-doping (2 * 10¹⁶ cm ^-3 ) in the active area, while there is a significantly lower n-doping in the critical edge area. To achieve this structure, starting from a suitable layer sequence on a substrate 13 made of n -InP, namely an absorption layer 23 made of n-InGaAsP, an intermediate layer 43 made of n⁻-InP and a multiplication layer 53 made of n-InP etched into the multiplication layer 53 and the intermediate layer 43 , then a full-surface Cd diffusion was carried out to produce a cover layer 63 made of p C-Cd and finally a second deep mesa etching comprising all the grown layers was carried out.

In the photodiodes shown in FIG. 2 and 3, the transitions between the multiplication layer 42 are made of InP and the transition layer 32 made of InGaAsP, and between the intermediate layer 43 made of InP and the absorption layer 23 of InGaAsP and the transition between the transitional layer 32 and the absorption layer 22 made of InGaAs (heterojunctions) in the area of high electric field strengths on the surface of the mesa flanks. This causes problems with the surface passivation required for long-term stability. Therefore, various planar designs have been developed.

In Figs. 4 to 6 of the upper part is shown in each case of such a planar layer structure, wherein each of the figures show the clipping with the p⁺-region 5 and the multiplication layer 6 in the cross section. These cross sections in Fig. 4 to 6 show the protective ring 4 and the first contact 3 due to the existing symmetry only on one side.

The design shown in Fig. 4 based on HW Ruegg (aa0.) Represents a planar solution as proposed by various authors:
K. Yasuda ea Electron. Lett. 20, 373-374 (1984),
T. Shirai ea, ECOC 87, Helsinki, Finland, Technical Digest, 55-61 (1987),
H. Imai ea, J. Lightwave Technology 6, 1634-1642 (1988),
PPWebb ea, OFC New Orleans, LA June 1988.

The protective ring 4 shown in broken lines serves to further reduce the E field in the edge region. This protective ring 4 has a lower electric field due to its lower edge curvature and a special p-doping.

In G.C. Chi e. a., Appl. Phys. Lett. 50, 1158-1160 (1987), A solution is proposed in which the lowering of the E field at the edge due to a very low p-doping and achieved by a very slight curvature of the pn junction becomes.  

In Fig. 5 shows an embodiment with double protective ring 4. The inner protective ring, which overlaps with the p⁺ region 5, has a lower p doping than the active p⁺ region 5 and extends deeper into the semiconductor material than the doping of the p⁺ to avoid the critical positive edge curvature. Area 5 . The outer protective ring overlaps with the inner protective ring and has an even lower p-doping than the inner protective ring. This outer guard ring reduces the curvature at the edge of the inner guard ring. The uppermost layer portion above the multiplication layer 6 made of n⁻-InP is less n doped than the multiplication layer 6 made of n-InP in order to reduce the E field at the edge of the outer protective ring (K. Taguchi ea, J. Lightwave Technology 6, 1643 -1655 (1988)).

In Y. Liu ea, Appl. Phys. Lett. 53, 1311-1313 (1988) lists a structure with two floating guard rings 4 , in which the two guard rings 4 are separated from the active zone by narrow n-doped regions ( FIG. 6). Here, too, the top layer portion of n aus-InP is less doped than the multiplication layer 6 of n-InP in order to reduce the E field at the edge of the outer protective ring.

All of these known structures exhibit critical manufacturing steps on or just barely avoid the edge breakthrough.

The object of the present invention is an avalanche Specify photodiode where the edge opening is effective is prevented and which is easy to manufacture at the same time. Another task is the specification of an associated manufacturer procedure.

This task is carried out with an avalanche photodiode with the Merk paint of claim 1 and with the manufacturing process solved the features of claim 8.  

There follows a description of the avalanche photodiode according to the invention with reference to FIGS . 7 to 11 and the associated production method with reference to FIGS. 12 to 17.

Fig. 7 shows the structure of an avalanche photodiode according to the invention in cross section. Figs. 8 to 11 show further embodiments of the construction according to the invention respectively in a section of the cross section shown in Fig. 7. Figs. 12 to 17 show successive steps of the production process in cross section.

Essential features of the avalanche photodiode according to the invention are a flat mesa etching with a protective ring produced by local doping around a locally higher doping in the active region. Fig. 7 shows a possible embodiment in cross section. A buffer layer 7 with a thickness of approximately 1 μm made of n-InP and a doping height greater than 10 ¹⁶ cm ^{-3 was} grown on an n-doped substrate 17 made of n⁺-InP. This is followed by an absorption layer 27 with a thickness of approximately 2.5 μm made of n-InGaAs with a doping height of less than 10 ¹⁵ cm ^-3 . This is followed by at least one transition layer 37 with a thickness of approximately 0.2 μm made of n-InGaAsP with a doping height of less than 10 ¹⁵ cm ^-3 . This is followed by an intermediate layer 47 with a thickness of approximately 1.3 μm made of n-InP and a doping height of less than 10 ¹⁵ cm ^-3 . The area provided for the multiplication effect is expanded above this intermediate layer 47 by a multiplication layer 57 with a thickness of approximately 0.4 μm made of n-InP and with a doping level of approximately 5 * 10¹⁶ cm ^-3 . This multiplication layer 57 is followed at the top by a cover layer 67 with a thickness of approximately 0.5 μm made of p⁺-InP and a doping level of greater than 2 * 10¹⁸ cm ^-3 .

This cover layer 67 and the multiplication layer 57 are etched back to form a mesa, it being possible for an upper layer portion of the intermediate layer 47 to be removed as well. The intermediate layer 47 is present over the entire area. A protective ring 1 is formed on the edge in the mesa. The surface of the semiconductor material is covered with a passivation layer 67 . In an annular recess of this passivation layer, a first contact 87 is applied to the surface of the cover layer 67 in the area of the protective ring 1 . A second contact 97 is applied over the entire area to the surface of the substrate 17 opposite the overgrown side of the substrate 17 . The first contact 87 is annular, so that the inner opening of this first contact 87 allows light to enter the cover layer 67 . The portion of the passivation layer 77 present there acts as an anti-reflective coating.

The separate production of the p⁺-doped cover layer 67 in the active region and the protective ring 1 achieves the following advantages:
The protective ring can be p-doped low. The electric field strength in the area of the protective ring 1 is thus low. The setting of the diffusion or implantation depth required for the production of the protective ring is not critical since the cover layer 67 to be produced with tighter tolerances is produced separately.

A second, deep mesa etching, as in the structure shown in FIG. 3, is omitted.

Due to the small height (less than 1.5 µm) of the required mesa etching, the structure is quasi-planar and, in contrast to a conventional mesa structure (FIGS . 2 and 3), no problems arise for subsequent process steps which include photolithography.

The construction of an avalanche photodiode according to the invention, as he was described in the above embodiment, can be used to avoid edge breakthrough in each half Realize conductor material, i.e. not only as above wrote for the material combination InP / InGaAs (P). As well is an exchange of the signs of the doping (p- or n- Doping) possible.  

Figs. 8 to 11 show various embodiments for the protection ring 1 10 and the first contact 8, 80. In FIGS. 8 and 10 of the protective ring 1 corresponding to the out operation example of Fig. 7 is formed. In FIG. 8, the first contact 8 is applied in a ring on the surface of the cover layer 64 within the protective ring 1 . In Fig. 10, this first contact 80 is additionally pulled down over the flank of the mesa and has an area extending on the passivation layer 9 outside the area of the mesa. In FIGS. 9 and 11 of guard ring 10 is formed as far as in the intermediate layer 45 in that it extends in this intermediate layer 45 and in an outer, outside the area occupied by the mesa area lying area. A first contact 8 shaped in accordance with FIG. 8 is applied in FIG. 9; A first contact 80 shaped in accordance with FIG. 10 is applied in FIG. 11. The design of the first contact 80 accordingly FIGS . 10 and 11 has the advantage that the area extending outside the area of the mesa extends to part of this first contact 80 beyond the pn junction and thus a flat surface of a conductor, in which the E field disappears to further reduce the E field at the edge of the pn junction.

The electrical properties of the avalanche photodiode according to the invention with applied operating voltage have the following advantages over the known embodiments: The space charge zone, in which there is a high electric field strength, in contrast to the known mesa structure according to FIGS . 2 and 3, only in the InP to the surface. There are therefore no passivation problems. The heterojunctions occur only on the gap surfaces of the finished chip, which lie on the surface outside the actual functional element. As a result, the passivation problems can be solved in the same way as with fully planar SAM-APD designs.

In the active area of the avalanche photodiode according to the invention there are high field strengths, since there is a relatively high n-doed (in the described embodiment 5 * 10¹⁶ cm ^-3 ) multiplication layer 57 with the p-doped cover layer 67 forms the pn junction. The inner edge of the protective ring 1 , together with the cover layer 67, forms a negatively curved pn junction with a low electrical field strength. The outer edge of the protective ring 1 has low electrical field strengths, since it is only in contact with low-doped n-material (intermediate layer 47 ).

The following is a description of a manufacturing process for this avalanche photodiode according to the invention. This manufacturing process is shown in FIGS. 12 to 17 corresponding to the individual manufacturing steps.

In a first process step, the semiconductor layers required for the photodiode according to the invention are deposited on the substrate 17 by means of an epitaxial process. In Fig. 12, the substrate 17 and the one after the other over the whole area grown buffer layer 7, absorption layer 27, transition layer 37, intermediate layer 47 of InP multiplication layer 57 and cover layer 67 illustrated. The absorption layer is InGaAs, the transition layer is InGaAsP. The remaining layers and the substrate are InP. The substrate 17 and all grown layers with the exception of the cover layer 67 are n-doped with the above-mentioned doping concentrations. The cover layer 67 is p-doped with a doping concentration of at least 2 * 10¹⁸ cm ^-3 . The multiplication layer 57 and the cover layer 67 can also be formed in an appropriately thicker intermediate layer 47 instead of by epitaxial growth after the epitaxy by implantation or diffusion of the corresponding dopants. In this case, this intermediate layer 47 is grown to a thickness during production which corresponds to the sum of the thicknesses of the intermediate layer 47 , the multiplication layer 57 and the cover layer 67 . This (thicker) layer is doped in accordance with the doping level provided for the intermediate layer 47 .

In a second step, the protective ring is manufactured. For this purpose, the free surface of the cover layer 67 is covered with a suitable structured mask (for example SiN _x ) with an opening in the region of the protective ring to be produced and a p-type dopant (for example Zn) is diffused through this opening ( FIG. 13). Instead, a local ion implantation can also be used for the p-doping 15 . This doping 15 should extend as straight as possible through the boundary layer 57 through to the intermediate layer 47 , but should extend as little as possible into this intermediate layer 47 , since otherwise at the transition between the absorption layer 27 and the transition layer 37 or between the transition layer 37 and the Intermediate layer 47 such high electric field strengths can occur that tunnel currents can flow there. The doping 15 should be as low as possible and / or have a flat doping gradient into the n-doped material of the intermediate layer 47 .

In a third step, the mesa is etched ( Fig. 14). This etching step can take place by means of dry etching processes and subsequent wet chemical overetching or only wet chemical. Dry etching has the advantage of good reproducibility. The damaged semiconductor surface must then be removed in a short wet chemical etching step (overetching). During the etching, at least the cover layer 67 and the multiplication layer 57 should be removed outside the area provided for the mesa 16 . The etching should attack the intermediate layer 47 as little as possible and in particular must not reach the transition layer, since otherwise the heterojunction between the intermediate layer 47 and the transition layer 37 , which has high electrical field strengths during operation, is exposed.

In a fourth method step (see FIG. 15), the entire surface of the semiconductor surface is coated with a passivation layer 77 made of a dielectric (for example SiN _x ).

This passivation layer 77 serves to passivate the pn junction on the flank of the mesa 16 and as an antireflection layer in the region of the cover layer 67 , which is provided for the entry of light. In this passivation layer 77 , an annular opening for contacting is produced around this active area provided for the entry of light. At the same time, tracks or trenches, which expose the semiconductor surface, are produced around the mesa 16 , in order to enable better scratching of the semiconductor material before the components (chips) are separated by breaking.

In a fifth process step, the metallization of the first contact 87 ( FIG. 16) is applied using the lifting technique. The contact 87 has a hole in the active region, ie in the region of the surface of the cover layer 67 intended for the entry of light, through which the light to be detected can be incident. The portion of the passivation layer 77 located in this hole acts as an anti-reflective layer. This first contact 87 , 88 can be applied in the various embodiments corresponding to FIGS. 8 and 10, ie without or with a large area outside the area of the mesa 16 (see FIG. 17).

In a sixth method step, the substrate 17 is made thinner from the back, ie from the main side which has not been overgrown, by removing semiconductor material in order to simplify the separation of the components by scratching and breaking.

In a seventh method step, the entire rear surface of the thinned substrate 17 is vapor-deposited with the metallization for the ohmic second contact 97 (n-contact).

In a departure from the production method just described, the procedure can be such that the cover layer 67 is initially grown in a nominally undoped manner. Then the cover layer 67 is p-doped by diffusion or implantation between the second and third method step, ie after bringing in the doping 15 for the protective ring and before etching the mesa 16 . This full-surface doping of the cover layer 67 thus takes place after the protective ring region has been produced.

This has the advantage that the p-dopant of this cover layer 67 cannot diffuse out into the multiplication layer 57 during the diffusion of the doping 15 for the protective ring or during the healing of the implantation damage of this doping 15 .

In the figures, the letters p⁺ each signify a p-doping above and p each a p-doping below 10 ¹⁸ cm ^-3 , n⁻ an n-doping below and n an n-doping above 10 ¹⁶ cm ^-3 .

Claims (11)

1. Avalanche photodiode on a substrate ( 17 ) made of III-V semiconductor material

• with an absorption layer ( 23 , 27 ) and with an intermediate layer ( 43 , 47 ), each of which is low doped for electrical conduction of a first conduction type,
• with a cover layer ( 63 , 67 ) which is highly doped for electrical conduction of a second, opposite conduction type, as the top grown semiconductor layer,
• with a multiplication layer ( 53 , 57 ) doped higher than the intermediate layer ( 43 , 47 ) for the first conductivity type between the intermediate layer ( 43 , 47 ) and this cover layer ( 63 , 67 ),
• - With a protective ring ( 1 ) which is doped for electrical conduction of the second conduction type,
• - With a first contact ( 83 , 87 ), which has an opening for the entry of light, on the cover layer ( 63 , 67 ) and
• with a second contact ( 93 , 97 ) which is applied to a portion of the semiconductor material doped for the first conductivity type,

characterized,

• - That at least the multiplication layer ( 57 ) and the cover layer ( 67 ) are grown one above the other and are designed as a mesa,
• - That the protective ring ( 1 ) is low doped for electrical conduction of the second conduction type,
• - That the protective ring ( 1 ) is annular in this mesa,
• - That the protective ring ( 1 ) from the multiplication layer ( 57 ) opposite surface of the cover layer ( 67 ) extends up to at least the intermediate layer ( 47 ) and accordingly
• - That the part of the cover layer ( 67 ) located inside this protective ring ( 1 ) is provided for the entry of light.

2. Avalanche photodiode according to claim 1, characterized in that the substrate ( 17 ) opposite surface of the grown semiconductor material with the exception of the first contact ( 87 ) provided portion of the cover layer ( 67 ) with a passivation layer ( 77 ) made of a dielectric is covered. 3. Avalanche photodiode according to claim 2, characterized in that the first contact ( 80 ) extends so far on the passivation layer ( 9 ) and is dimensioned such that it covers an area outside the area occupied by the mesa. 4. Avalanche photodiode according to one of claims 1 to 3, characterized in that the protective ring ( 10 ) in the intermediate layer ( 45 ) extends into an area outside the mesa. 5. Avalanche photodiode according to one of claims 1 to 4, characterized in that the absorption layer ( 27 ), at least one low doped for electrical conductivity of the first conductivity type transition layer ( 37 ), the intermediate layer ( 47 ), the multiplication layer ( 57 ) and the cover layer ( 67 ) has been grown one above the other over the substrate ( 17 ) in this order. 6. avalanche photodiode according to one of claims 1 to 5, characterized, that the first line type n line and the second line type p-line is. 7. avalanche photodiode according to one of claims 1 to 5, characterized, that the first line type p-line and the second line type n line is.   8. A method for producing an avalanche photodiode according to claim 2, in which in a first step the semiconductor layers are deposited on the substrate ( 17 ) by means of an epitaxial method, characterized in that

• - that in a second step the doping ( 15 ) is carried out in the area of the protective ring by means of mask technology,
• - That in a third step the mesa ( 16 ) is etched, where in the area occupied by the mesa ( 16 ) the cover layer ( 67 ) and the multiplication layer ( 57 ) are completely removed and the protective ring ( 1 ) as the edge of the mesa ( 16 ) is formed,
• - that in a fourth step the passivation layer ( 77 ) is applied to the surface of the grown semiconductor layers facing away from the substrate ( 17 ) and is provided with an annular opening,
• - That in a fifth step by means of lifting technology, the first contact ( 87 , 88 ) is applied at least in the region of this annular opening of the passivation layer ( 77 ) and
• - That the second contact is applied in a sixth step.

9. The method according to claim 8, wherein the intermediate layer ( 47 ), the multiplication layer ( 57 ) and the cover layer ( 67 ) are first grown as a uniform layer with the same doping as is provided for the intermediate layer ( 47 ), and then the doping of the multiplication layer ( 57 ) and the cover layer ( 67 ) are introduced as intended into this epitaxy. 10. The method according to claim 8, in which the cover layer ( 67 ) is grown nominally undoped and after the introduction of the doping ( 15 ) provided for the protective ring (second step) before the etching of the mesa ( 16 ) (third step) over the entire area the doping provided for the cover layer ( 67 ) is introduced.