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DE3688172D1 - Methode zur herstellung einer logischen matrix mit polysilizium-emitterkontakt und dadurch hergstelltes bauelement. - Google Patents

Methode zur herstellung einer logischen matrix mit polysilizium-emitterkontakt und dadurch hergstelltes bauelement.

Info

Publication number
DE3688172D1
DE3688172D1 DE8686307940T DE3688172T DE3688172D1 DE 3688172 D1 DE3688172 D1 DE 3688172D1 DE 8686307940 T DE8686307940 T DE 8686307940T DE 3688172 T DE3688172 T DE 3688172T DE 3688172 D1 DE3688172 D1 DE 3688172D1
Authority
DE
Germany
Prior art keywords
polysilizium
producing
emitter contact
component produced
logical matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686307940T
Other languages
English (en)
Other versions
DE3688172T2 (de
Inventor
Francis J Morris
Stephen A Evans
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE3688172D1 publication Critical patent/DE3688172D1/de
Publication of DE3688172T2 publication Critical patent/DE3688172T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D64/0113—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/901—Masterslice integrated circuits comprising bipolar technology
    • H10W20/4451—
DE86307940T 1985-10-16 1986-10-14 Methode zur Herstellung einer logischen Matrix mit Polysilizium-Emitterkontakt und dadurch hergstelltes Bauelement. Expired - Fee Related DE3688172T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/787,872 US4898838A (en) 1985-10-16 1985-10-16 Method for fabricating a poly emitter logic array

Publications (2)

Publication Number Publication Date
DE3688172D1 true DE3688172D1 (de) 1993-05-06
DE3688172T2 DE3688172T2 (de) 1993-10-14

Family

ID=25142780

Family Applications (1)

Application Number Title Priority Date Filing Date
DE86307940T Expired - Fee Related DE3688172T2 (de) 1985-10-16 1986-10-14 Methode zur Herstellung einer logischen Matrix mit Polysilizium-Emitterkontakt und dadurch hergstelltes Bauelement.

Country Status (4)

Country Link
US (2) US4898838A (de)
EP (1) EP0219346B1 (de)
JP (1) JPH0821590B2 (de)
DE (1) DE3688172T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0316104A3 (de) * 1987-11-03 1991-01-30 Stc Plc Integrierte Schaltungen mit Widerständen und Bipolartransistoren
US4975386A (en) * 1989-12-22 1990-12-04 Micro Power Systems, Inc. Process enhancement using molybdenum plugs in fabricating integrated circuits
US5212102A (en) * 1990-08-22 1993-05-18 National Semiconductor Corporation Method of making polysilicon Schottky clamped transistor and vertical fuse devices
US5144404A (en) * 1990-08-22 1992-09-01 National Semiconductor Corporation Polysilicon Schottky clamped transistor and vertical fuse devices
EP0490236A3 (en) * 1990-12-13 1992-08-12 National Semiconductor Corporation Fabrication process for schottky barrier diodes on a substrate
US5500387A (en) * 1994-02-16 1996-03-19 Texas Instruments Incorporated Method of making high performance capacitors and/or resistors for integrated circuits
KR0170285B1 (ko) * 1995-05-12 1999-03-30 김광호 반도체 장치의 소자 분리 방법
US5885873A (en) * 1998-04-20 1999-03-23 Texas Instruments--Acer Incorporated Double coding processes for mask read only memory (ROM) devices
US6933751B2 (en) * 2003-09-18 2005-08-23 Micrel, Inc. Integrated Schottky transistor logic configuration
JP2006339606A (ja) * 2005-06-06 2006-12-14 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US20080246082A1 (en) * 2007-04-04 2008-10-09 Force-Mos Technology Corporation Trenched mosfets with embedded schottky in the same cell

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3717514A (en) * 1970-10-06 1973-02-20 Motorola Inc Single crystal silicon contact for integrated circuits and method for making same
US3906540A (en) * 1973-04-02 1975-09-16 Nat Semiconductor Corp Metal-silicide Schottky diode employing an aluminum connector
US4127931A (en) * 1974-10-04 1978-12-05 Nippon Electric Co., Ltd. Semiconductor device
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS539469A (en) * 1976-07-15 1978-01-27 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device having electrode of stepped structure and its production
US4157269A (en) * 1978-06-06 1979-06-05 International Business Machines Corporation Utilizing polysilicon diffusion sources and special masking techniques
US4214256A (en) * 1978-09-08 1980-07-22 International Business Machines Corporation Tantalum semiconductor contacts and method for fabricating same
JPS5539677A (en) * 1978-09-14 1980-03-19 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device and its manufacturing
JPS5563821A (en) * 1978-11-06 1980-05-14 Nec Corp Semiconductor device
US4475964A (en) * 1979-02-20 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
JPS5826177B2 (ja) * 1979-06-27 1983-06-01 株式会社東芝 半導体装置の製造方法
JPS55111155A (en) * 1979-02-20 1980-08-27 Toshiba Corp Semiconductor device and manufacturing method thereof
JPS55113372A (en) * 1979-02-23 1980-09-01 Hitachi Ltd Semiconductor device and its manufacture
JPS577948A (en) * 1980-06-19 1982-01-16 Toshiba Corp Semiconductor device and its manufacture
US4425379A (en) * 1981-02-11 1984-01-10 Fairchild Camera & Instrument Corporation Polycrystalline silicon Schottky diode array
US4424579A (en) * 1981-02-23 1984-01-03 Burroughs Corporation Mask programmable read-only memory stacked above a semiconductor substrate
JPS5741826A (en) * 1981-04-21 1982-03-09 Amada Co Ltd Bending device for bending machine
US4516223A (en) * 1981-08-03 1985-05-07 Texas Instruments Incorporated High density bipolar ROM having a lateral PN diode as a matrix element and method of fabrication
JPS5933833A (ja) * 1982-08-19 1984-02-23 Toshiba Corp 半導体装置の製造方法
JPS59112655A (ja) * 1982-12-18 1984-06-29 Mitsubishi Electric Corp 半導体装置の製造方法
US4579600A (en) * 1983-06-17 1986-04-01 Texas Instruments Incorporated Method of making zero temperature coefficient of resistance resistors
US4451326A (en) * 1983-09-07 1984-05-29 Advanced Micro Devices, Inc. Method for interconnecting metallic layers
JPS6057952A (ja) * 1983-09-09 1985-04-03 Toshiba Corp 半導体装置の製造方法
JPS60214563A (ja) * 1984-04-09 1985-10-26 Mitsubishi Electric Corp バイポ−ラトランジスタの製造方法
US4782030A (en) * 1986-07-09 1988-11-01 Kabushiki Kaisha Toshiba Method of manufacturing bipolar semiconductor device
JPH05113372A (ja) * 1991-10-21 1993-05-07 Kawasaki Steel Corp 連続プロセス炉における板材温度計測方法
JPH0674466A (ja) * 1992-08-31 1994-03-15 Matsushita Electric Ind Co Ltd パネルヒータ

Also Published As

Publication number Publication date
EP0219346A2 (de) 1987-04-22
DE3688172T2 (de) 1993-10-14
US5244832A (en) 1993-09-14
EP0219346A3 (en) 1988-09-21
US4898838A (en) 1990-02-06
JPH0821590B2 (ja) 1996-03-04
JPS62113470A (ja) 1987-05-25
EP0219346B1 (de) 1993-03-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee