DE3118542C2 - - Google Patents

Description

The invention relates to an electrostatic gas cleaning device according to the preamble of the claim 1.

Similar devices are from US patents 41 60 202, 39 59 715 and 41 38 232 known.

With an electrostatic exhaust gas cleaner there is a high voltage for ionizing and deflecting contaminant particles used from exhaust gases. Known electrostatic gas cleaning devices control the magnitude of the high voltage by it adjust them so that sparks with a predetermined repetition frequency be generated. Since sparks are easy to detect, this spark repetition frequency control can be carried out easily, however only with high performance losses and less Reliability. By causing repeated sparking these devices place a significant burden on the power supply device and their transformer-rectifier arrangement. In addition, the collector plates and emission wires the gas cleaning device is constantly eroded.

Known electrostatic gas cleaning devices effect depending on excessive sparking or Arcing that is irregular during typical operation occurs, a rapid shutdown and subsequent gradual re-control of the high voltage. This gradual or also avoids "slow" or "soft" up control too high initial currents and voltages. This too high Initial loads are the result of a strong spark or Arcing, the magnetic devices in the high voltage supply device drive to saturation.

When the core of a high voltage transformer is saturated, can re-apply the operating voltage without regard to take on their polarity, further saturation and thus lead to a very low-resistance load circuit,  which loads the network with excessive current. On the other hand can also be one in the primary circuit of the high-voltage transformer horizontal choke coil driven into saturation will. This saturated choke coil then does not have a sufficient effect Current limitation more so that the transformer overloads is and gives too high a voltage on the secondary side. This can lead to a self-destructive runaway, at which a spark creates a high voltage jump, which in turn caused a spark. The mentioned devices with "slower" up control take this behavior into account by gradually increasing the level of the magnetic Circles so that their magnetic cores can desaturate again and on a medium, symmetrical hysteresis loop operate.

This delayed restoration of the full performance of the However, high-voltage supply device has the disadvantage that the charge inside the gas cleaning device decreases. On the other hand, sparking means high energy losses, but initially it is local. Neighbors Gas cleaner parts can therefore initially charge maintain because of the effective series resistance and inductance not negligible between the gas cleaner parts is. Rather, these impedances prevail when there is a spark forms a localized low-impedance current path. Therefore joins sparks, the duration of which is generally short (one to four milliseconds), a period of time in which can redistribute the charge in an advantageous manner. At A localized discharge can therefore occur again immediately add a load and at a lower height. However, since in known devices the operating voltage is longer when the mentioned time period is switched off, the Residual charge disappear completely.  

If you let the gas cleaning device unload so far, it is no longer able to hold the accumulated dust. Rather, it is rejected. The repulsed Dust then increases the likelihood of another Spark occurs, which in turn can lead to runaway. If the gas cleaning device discharges once has the limited rated current of the device that Capacity of the gas cleaner and the inductance of the series lying choke coil impossible to use the gas cleaner immediately charge. These known devices therefore require unnecessarily much time to recharge unnecessarily discharged gas cleaners. This unproductive delay time is an effective one Voltage regulation counter. In contrast, a rapid restoration of operational performance, as invented is possible, rather the theoretically maximum possible Achievement achieved.

The destructive effect of an increase process can be done illustrate that one assumes that one Spark connects to a period of time in which the performance (Tension) is removed. Then it is assumed that the Charge current increases linearly during the time DTb and then one constant maximum value Im maintained. (The bill below can be easily transferred to the other stimulating functions, like a sectionally linear rise curve with a initially high and then low.) Since the emitted energy multiplied by the effective resistance R. with the time integral of the square of the current for the total energy:

where t = 0 is chosen as the point in time at which the charging current begins.  

By solving for t = Tf - DTa, where Tf is the period after which the process is repeated, you get as energy per period:

The energy maximum is then DTa = DTb = 0 Theoretically, the maximum output that can be given: Im²R. If ignore the rise time corresponding to the time DTb a rectangular wave results as the charging current curve, so that the output then equal to the maximum theoretical Power multiplied by the duty cycle DTa / Tf would. This duty cycle or work cycle can be yours Approach maximum value one if the time between sparks is arbitrary long or the time after a spark during which the Power is reduced, is chosen as short as desired. By alternately unloading and charging the gas cleaner in the known devices, fine electrical changes, which are required for the regulation of the high voltage covered. Because those caused by the sparking Jumps and the input currents due to recharge are so large, these known control devices are designed so that they respond to an easily detectable event: the sparking itself. Although it would be possible the control signal of a high voltage supply device only gradually increase to detect subtle electrical changes this would have the consequence that the high voltage on decreases too low.

In the known generic gas cleaning devices the actuation of the actuator is released after a not exactly defined number of half-waves of the operating AC voltage. Therefore, if the core of the high voltage transformer is saturated due to an overload, the case may occur that the operating voltage again with the same Polarity is applied, which leads to the saturation of the core Has. This would lead to further saturation and therefore to one  very low-resistance load circuit that lead to the network burdened with excessive current.

The invention has for its object a gas cleaning device of the generic type to specify in the simple Way with low power dissipation stable operation is achieved with a long service life.

According to the invention, this object is achieved in that the control signal from the control device the voltage regulator only during a half-wave of the operating alternating voltage with opposite Polarity to that at the beginning of the limit interval again releases.  

Further training is characterized in subclaims.

With this training, the performance preferably reduced as much as possible. After that the Performance again very quickly up to the vicinity of a spark the previous value. Preferably the power up control timed so that when a spark to saturate a magnetic device of the high-voltage supply device, this component immediately counteracted again and thus is desaturated.

In addition, the current one Value of the control signal supplied to the high-voltage converter device compared to a previous value. To this In this way, electrical disturbances are detected, such as sparking go ahead. The device can therefore itself Before sparking, adjust so that it is avoided becomes. A device according to the invention is therefore designed that little or no sparks occur during operation. Preferably are the adjustments made to avoid sparking relatively small, so they are stationary Essentially not affect condition. This stability facilitates the constant monitoring of the upcoming one Sparks. With this method, the high voltage can be continuous Controlled up to a sufficiently high value without the risk of sparking. The Active power available in the gas cleaner can be up to 200% be increased.

In a preferred embodiment, the current flow angle controllable silicon rectifier connected in anti-parallel increased at a predetermined rate that a quick but controlled rise in output voltage of the high voltage transformer. The speed the increase in the current flow angle can be achieved by feedback  a measurement signal to the control device are influenced, the voltage drop across a linear inductive current limiting resistor in the primary circuit. This signal represents the speed of power consumption by the Gas cleaner itself. The control device can also in each operating half-wave depending on measured variables, such as the voltages and currents on the transformer primary or secondary side (that is, in the gas cleaner) occur intervention. Here, the device can also be a device to store these measured variables to match them with the measured variables to compare from the next or a later half wave. This way there is a spark always the latest measured values of all measurable electrical parameters available for evaluation.

The device according to the invention can be used in each case make a very quick comparison, e.g. B. between the measured value the secondary voltage and / or the secondary current at which the spark occurred and the thyristor current flow angle required is to cause this measurement. Additional Information, Examples that can be saved are: Whether the current flow angle of the controllable rectifier or Thyristor enlarged or shortly before the appearance of the spark has been reduced, the current flow angle itself, the secondary voltage and / or the secondary current, the voltage drop on linear measuring resistor or any other to be considered characteristic size just before sparking is available. That is, it can be a new "local temporal Average "are formed before the control device intervenes again. Since according to the inventive method Another increase in power follows, the control device set a new thyristor current flow angle so that now immediately (within one or two half-waves) secondary voltages and / or currents can be set immediately are among those where the first spark occurred. If a spark is generated again, a new local one  Averaged and the process repeated. In this way, the secondary voltage and / or the secondary current reduced until at or shortly after the new one Up control (or switching on again) no spark occurs anymore. By reducing the thyristor current flow angle by small Amounts (which are less than one electrical degree) are possible to operate over a long period of time (several dozen Half-waves) immediately below the voltage and / or current values that have sparked so far. More importantly, however, the device is so quick Stable operation that can easily create sparking conditions can be determined.

If there is no sign of impending sparking from monitoring over several half-waves the thyristor current flow angle can be increased, but again only by a small amount and in one Step so that the steady state as little as possible is disturbed. The control device continues with the formation of local Mean values continue, and at a certain current flow angle can then indicate the impending sparking Faults are found. At this point it is in the At the discretion of the designer how the control device intervenes should. Operation during several half-waves indicates that a continuation of operation with the current voltage and / or current values would lead to spark formation, so the obvious intervention would be the thyristor current flow angle to decrease an amount that depends on the amplitude (or distribution) depends on the upcoming fault. After that In turn, data is collected to check whether and if necessary how the disturbance was affected, and then another one Decision made. So the operation continues and the thyristor current flow angle normally through the controller, whenever possible, increased to the maximum field voltage and set the maximum ionization current in a way the through the continuously collected (measured) data  is changed so that the performance quickly by a very small Value is reduced when an impending sparking indicating condition occurs.

The mentioned comparison measurement is preferably periodic performed to eliminate periodic influences caused by an operating current changing its direction (an operating alternating current) caused.

Furthermore, the point in time at which a measurement is carried out be chosen so that it falls in the time when the probability the greatest is that the change of a current represents the impending sparking. So is the probability sparking in a predetermined time interval after intervention by the voltage regulator or - at AC - greatest at a predetermined phase angle.

Then the control signal, which is the modulation of the high voltage converter determined, repeatedly increased in stages. This process can be reversed when the high voltage drops when inserting a back corona discharge.

The invention and its developments are described below the drawing of preferred embodiments described in more detail. It shows

Fig. 1 is a block diagram of a gas cleaning device having an inventive high voltage device,

FIG. 2 shows a circuit diagram of an absolute value separation stage of the device according to FIG. 1, FIG.

Fig. 3 shows a part of a circuit diagram used in the apparatus of FIG. 1 of a voltage controller,

Fig. 4 is a block diagram which is used in the apparatus of FIG. 1, a releasable (triggered) monitoring means,

Fig. 5 is a block diagram which is used in the apparatus of FIG. 1, a microcomputer,

Fig. 6 is a block diagram of operating means and display means associated with the apparatus of Fig. 1,

Fig. 7 is a block diagram of the control device and interface means between the power actuator and control means used in the apparatus of Fig. 1,

Fig. 8 waveforms of signals that occur in the devices of FIGS. 1 to 7 and

Fig. 9 is a flowchart for explaining the operation of the devices according to Figs. 1 to 7.

FIG. 1 is located between an input line and an output line P 2 P 4, a voltage controller 10 degrees. This has two thyristors Q 1 and Q 2 connected in anti-parallel between the lines P 2 and P 4 , so that it can carry alternating current. By controlling the ignition timing or ignition angle of the thyristors Q 1 and Q 2 , their current flow can be controlled accordingly. Although a thyristor actuator is shown, another actuator can also be used, e.g. B. a saturable inductor (transducer).

The actuator 10 acts on a high-voltage converter device in the form of a transformer-rectifier arrangement T 1 , 18 . Between input terminals 12 for the primary operating alternating voltage are a conductive element 16 in the form of a current limiting choke coil, the actuator 10 and the primary winding 14 of the high voltage transformer T 1 in series. The transformer T 1 and a two-way bridge rectifier 18 with diodes CR 1 , CR 2 , CR 3 and CR 4 form the high-voltage converter. The anode of the diode CR 1 and the cathode of the diode CR 2 are connected to one terminal of the secondary winding 20 , the other terminal of which is connected to the cathode of the diode CR 3 and the anode of the diode CR 4 . The cathodes of the diodes CR 1 and CR 4 are each connected to ground via ohmic resistors R 4 and R 6 . The anodes of the diodes CR 2 and CR 3 are connected to the connection point of surge limiting inductors L 2 and L 4 . The transformer T 1 has a high transmission ratio and generates a negative, high DC voltage at the connection point of the choke coils L 2 and L 4 .

Although a choke coil is shown as conductive element 16 , another component, e.g. B. an ohmic resistor can be used. However, the use of an inductive element has the advantage that it responds to abrupt changes or impulses which indicate that an ignition spark is imminent. However, high sensitivity to sudden transitions can also be achieved by using a series-connected ohmic resistor, the voltage drop of which is differentiated. Although the element 16 is shown connected in series with the primary winding 14 of the transformer T 1 , it can also be connected at other points, depending on the modulation of the transformer T 1 and the diodes CR 1 , CR 2 , CR 3 and CR 4 Make it conductive or live. A voltage divider could also be connected between the connection point of the diodes CR 2 and CR 3 on the one hand and ground on the other hand, in order to measure the modulation of the high-voltage converter.

The connections of the choke coils L 2 and L 4 which are not directly connected to one another are each separately connected to high-voltage electrodes 22 and 24 of electrostatic gas cleaners 26 and 28 . The gas cleaners 26 and 28 are designed in a manner known per se and are located in the exhaust duct of a machine or a process. The particles in the exhaust gas are ionized and separated by correspondingly high electric fields in the gas cleaners 26 and 28 , so that it is cleaned.

The primary winding 30 of a transformer T 2 , the secondary winding 32 of which lies between ground and the input of an absolute value-forming isolating stage ABS 1, is located on the element 16 . The absolute value formation isolator ABS 1 (the structure of which will be described in detail below) generates a single-pole signal with an amount that is proportional to the absolute value of its input signal.

A current transformer T 3 which is inductively coupled to the line between the input 12 and the element 16 generates a signal which is proportional to the primary current of the transformer T 1 . The current transformer T 3 is located on the secondary side via an isolating transformer T 4 at the input of an absolute value-forming isolating stage ABS 2 . The absolute value formation separation stage ABS 2 has the same structure as the separation stage ABS 1 . The primary windings of the transformers T 1 and T 5 are in parallel. The secondary winding of the transformer T 4 is connected to the input of an absolute value separation stage ABS 3 , the structure of which is identical to that of the ABS 1 stage . The isolators ABS 2 and ABS 3 are controlled by voltages that are proportional to the primary current and the primary voltage of the high-voltage transformer T 1 , respectively. The secondary current of the transformer T 1 flows in one half-wave via the resistor R 4 and in the following via the resistor R 6 . This secondary current signal is transmitted through non-inverting isolating amplifiers 34 and 36 , each of which is connected to the ungrounded (grounded) terminals of resistors R 4 and R 6 .

Two voltage dividers are provided as the high-voltage measuring device, although a Hall generator or another device can also be used instead. One voltage divider lies between the high-voltage electrode 22 and ground and consists of two ohmic resistors R 8 and R 10 connected in series. The second voltage divider also consists of two series-connected ohmic resistors R 12 and R 14 , which lie between the high-voltage electrode 24 and ground. The connection point of the resistors R 8 and R 10 is connected to the input of an inverting isolating amplifier 38 , so that a voltage proportional to the operating voltage of the gas cleaner 26 is fed to it. In a similar manner, an inverting isolating amplifier 40 is connected to the connection point of the resistors R 12 and R 14 , so that a voltage proportional to the operating voltage of the gas cleaner 28 is supplied to it.

In many applications it is favorable to arrange the device according to FIG. 1 just described in the vicinity of the gas cleaners 26 and 28 . Such a facility is often conveniently located near one or more chimneys. Since the other accessories of the device can be arranged at a location that is easily accessible to an operator, the corresponding separation point is represented by a broken line RF.

The outputs of the isolators ABS 2 , ABS 3 , 34, 36, 38 and 40 are each connected to interface inputs IN 2 , IN 3 , IN 4 , IN 5 , IN 6 and IN 7 of a secondary device 42 . The output of the isolating stage ABS 1 is connected to a signal conditioning circuit 43 , the output of which is connected to the input IN 1 of the secondary device 42 . Circuit 43 is preferably a low-pass filter. However, an integrator can also be used instead. Because the secondary device 42 is supplied with seven different input signals in this way, it receives detailed information about the operating behavior of the gas cleaner, but a different number of input signals can also be provided in other embodiments. The secondary device 42 forms part of a control device with a triggerable or triggered (described in more detail below) monitoring device, which is acted upon via the input IN 1 . The control device also contains a microcomputer COM, the circuit details of which are described below. The connection between the secondary device 42 and the microcomputer COM is shown as a broad arrow to indicate more than one data transmission line and the direction of information flow. The microcomputer COM repeatedly scans the inputs IN 1 to IN 7 , so that they are connected to it in time division multiplexing (one after the other). Furthermore, the microcomputer COM supplies a control signal to an auxiliary device 44 . The secondary device 44 (described below) converts the control signal generated by the microcomputer COM into two clock signals which are fed to the actuator 10 via lines 46 in order to control its current flow angle. The secondary device 44 forms a suitable interface between the actuator 10 and the control device 42 . The secondary device 44 would therefore be designed differently if the actuator 10 contained a transducer or another device instead of thyristors. Using operating switches in an operating device CNL (which will be described below), an operator can make an entry into the microcomputer COM. The microcomputer COM can display information to the operator by means of a display device DISP (which will be described later).

The microcomputer COM effects overall control of the device, including clock and time control, and can be designed in various ways. A microcomputer COM with a commercially available microprocessor is preferred. Other embodiments are also possible. An analog circuit arrangement can thus be used instead of a digital one. For example, selectable storage capacitors can be charged to voltages that represent the signals at the inputs IN 1 to IN 7 at different times. These charging voltages can be selectively fed to a summing network in order to generate a control signal.

The microcomputer COM determines the repetition frequency and sequence in which the respective input signals are fed to the control device via the inputs IN 1 to IN 7 . In this exemplary embodiment, this repetition frequency is normally twice as high as the mains frequency, but it is chosen to be considerably higher in certain circumstances. Other repetition frequencies can also be selected which are adapted to the respective properties and operating behavior of the respective voltage regulator and gas cleaner.

The operation of the apparatus of Fig. 1 will now be described in the event that sparking is imminent, sparking has occurred, and counter corona discharge is present.

It is assumed that the device according to FIG. 1 has just been switched on and forms a relatively low voltage at the electrodes 22 and 24 . The microcomputer COM addresses the inputs IN 6 and IN 7 in each half-wave of the operating voltage at input 12 and records the pending data. This data, including the voltages at electrodes 22 and 24 , is obtained after approximately 75% of a half wave has elapsed. This time allows the microcomputer COM to reliably estimate the conditions that are currently present during the respective half-wave and to set the control signal on line 46 accordingly before the next half-wave. The control signal is periodically phase-shifted for a period of time in each half-wave in order to increase the voltage at the electrodes 22 and 24 . In some embodiments, the incremental increase in the control signal on line 46 may be slowed down as the voltages of electrodes 22 and 24 approach their target values. For example, assume that the voltage is sufficient to create a state in which sparking is imminent. It is further assumed that the corona discharge in gas cleaners 26 and 28 will expand and form protrusions or "fingers" during the next half wave. This expansion is the precursor to sparking and has resulted in a significant increase in the flow of gas cleaner. This increase in gas cleaner flow causes an increase in the voltage drop across element 16 . Since the current disturbance caused by this corona discharge expansion has strong high-frequency components, the element 16 is particularly sensitive to it. Furthermore, since the corona discharge expansion is highly likely to occur in the last part of a half-wave of the AC operating voltage at input 12 , the fact that the microcomputer COM takes the measured values during this time makes it particularly sensitive to this phenomenon.

After recording a measured value via input IN 1 after approximately 75% of the current half-wave has elapsed, the microcomputer COM compares the last measured value with a threshold value (for example 2 volts). This flow is shown in the form of several branches in the flowchart according to FIG. 9. At branch 200 , the device waits for the appearance of a phase signal at port 72 (which will be described in more detail below) which indicates the expiration of 75% of the half-wave. The signal supplied via input IN 1 is stored at branch 202 , and the threshold value comparison is carried out at branch 204 . If the threshold is exceeded, the control signal is decremented or decreased as indicated in branch 206 by a factor of approximately 1%. This decrement is chosen so that it is adapted to the characteristic and response time of the controlled gas cleaner.

After this operation (or assuming that branch 206 was skipped because the threshold of branch 204 was not exceeded), the value previously measured at input IN 1 is subtracted from the value previously supplied via input IN 1 , as in FIG branch 208 is shown. This difference is compared to a preset threshold (e.g., 10%) as shown in branch 210 , and if the threshold is exceeded, the control signal is decremented (decreased) or otherwise incremented (increased). This decrease and increase is shown in branches 212 and 214 , respectively. The amount of the reduction is chosen so that it is adapted to the characteristic and response time of the gas cleaner. The amount of increase in branch 210 is less than the decrement in branch 206 . This relationship ensures that when a decrease occurs, its impact is not offset by the increase in branch 214 .

The consequence of the steps mentioned is that when element 16 ( FIG. 1) indicates the impending sparking, the control signal (line 46 in FIG. 1) is reduced and otherwise increased. The high voltage supplied to the gas cleaners 26 and 28 therefore has a relatively high value, which is immediately below the value at which the sparking occurs. In this exemplary embodiment, the control signal is changed by a fixed amount, but in other exemplary embodiments the change amount can also be selected on the basis of a table of a formula or according to other measured variables.

As can be seen, the microcomputer COM ( FIG. 1) can respond very quickly to the impending sparking and immediately try to reduce the current flow angle of the actuator 10 before the sparks occur. In this exemplary embodiment, the actuator contains 10 thyristors, which are only blocked at the end of a half-wave of the operating AC voltage at the input 12 . Therefore, the microcomputer COM need not address before this time. However, if high-speed switches or a saturable inductor (transducer) are used, the actuator can be locked immediately to avoid sparking.

Above was described how to avoid sparking becomes. The following describes how the device works, if sparks still occur due to very strong interference should.

It is assumed that the spark formation in the gas cleaner 26 begins in the middle of a half-wave of the operating voltage present at the input 12 ( FIG. 1). As a result, the voltage at the high voltage electrode 22 drops suddenly. The relatively small voltage which consequently occurs at input IN 6 is detected by the microcomputer COM shortly thereafter. The last value at IN 1 is compared to the value determined one half-wave earlier, and if it exceeds a predetermined limit (e.g. 25%), the control device responds to this emergency by lowering the control signal on line 46 to a minimum value at. This feature is also shown in the flowchart of FIG. 9, which shows that immediately after the operation of branch 212 or 214 described above, the latest high voltage values recorded via inputs IN 6 and IN 7 are stored in memory will. The corresponding high voltage value stored in the previous half-wave is subtracted from these latest values. If the differences are greater than or equal to zero, the control signal is not further adjusted and the process is repeated in the manner described below. If both differences are negative, indicating a drop in high voltage, a comparison is made to a preset sparking threshold to determine if sparks have occurred. If the limit has been exceeded, the following occurs as indicated in branches 220, 222, 224 and 226 of the flow diagram ( Fig. 9):

The control signal is reset to zero in order to lock the actuator 10 ( FIG. 1). However, if the thyristors of the actuator 10 are already conductive, they remain conductive until the end of the relevant half-wave of the operating AC voltage at the input 12 , as has already been mentioned. Since a spark appears to have started, the microcomputer COM begins to request data from the IN 6 and IN 7 inputs with a relatively high repetition frequency. This higher repetition frequency is important because the actuator 10 must remain locked as long as the sparks occur. Furthermore, since the voltage required to ignite a spark is significantly higher than the voltage required to maintain the spark, the spark does not go out until the electrode voltage has decreased significantly. The voltages at the inputs IN 6 and IN 7 are therefore monitored in "real time operation" until they have fallen below an extinguishing value at which the spark solution is ensured ( FIG. 8C).

The time required to extinguish a spark can vary for each spark. Although the voltage across electrodes 22 and 24 typically decreases in the last half of each half cycle of the AC operating voltage at input 12 , this decrease may be insufficient. Furthermore, the capacity of the gas cleaners 26 and 28 can be so large that the voltage decreases only very slowly. For these reasons, the microcomputer COM blocks the actuator 10 as long as the voltage at the electrode 22 or 24 is too high. As soon as it is no longer too high, the control signal is switched on again, but with a somewhat smaller value (for example by 0 to 4% lower) than that which it had in the half-wave in which a spark occurred. This reduces the likelihood that the sparks will reappear.

If the high voltages drop below the erasure value shortly after the beginning of a subsequent half-wave of the operating AC voltage at input 12 , the operation specified in branch 228 ( FIG. 9) takes place. Here, the re-enabled control signal is transmitted and then returned to the beginning of the sequence of operations as indicated in branch 234 . By switching the control signal on again, one of the thyristors of the actuator 10 ( FIG. 1) becomes conductive again at a point in time (phase angle) which is determined by the control signal.

The sequence of operations described above with reference to FIG. 9 represents a program cycle of the microcomputer. The microcomputer therefore expects the next occurrence of a phase signal after 75% of the instantaneous half-wave of the operating AC voltage at input 12 , as indicated by branch 200 .

The order mentioned included an operating AC voltage period in which sparking occurred and in which branch 222 ( FIG. 9) was executed in place of branch 230 . The mode of operation in the event that no sparks occurred and instead a back-corona discharge effect occurred in the last 25% of the relevant half-wave of the AC operating voltage at input 12 will be described below. The back corona discharge effect occurs during operation with a relatively high voltage in a region in which a gas cleaner has a negative resistance (a negative slope in the voltage-current characteristic curve). Operation in such an area is inefficient and should be avoided.

After the microcomputer COM ( FIG. 1) determines that the decrease (decrement) in the high voltage reading at inputs IN 6 and IN 7 does not indicate sparking, the operation represented by branch 230 ( FIG. 9) begins. This operation consists in checking whether this moderate decrease in high voltage exceeds a threshold value (e.g. 5%), which indicates a back corona discharge effect. If this corona discharge limit is exceeded, the control signal is decremented by a predetermined amount (e.g., 1%), as indicated in branch 232 . This decrement is greater than the increment that can be effected by the branch 214 operation. Although the change in the signal just described is a fixed decrement, embodiments are also possible in which a table, a formula or the value of the measured input signals at the inputs IN 1 to IN 5 can be used to change the To determine control signal during the occurrence of a reverse corona discharge effect.

In the above solution, the voltages on the electrodes 22 and 24 are increased periodically until the back corona discharge occurs. When the back corona discharge occurs, the current flow angle of the actuator 10 is reduced. In this way, the electrode voltage is kept approximately at a peak value, which corresponds to a relatively high efficiency. If there was no back corona discharge and the voltage-current characteristics of the gas cleaners 26 and 28 were monotonous, then the gas cleaner voltage would increase until sparking was imminent.

FIG. 2 shows a schematic circuit diagram of a typical embodiment of the absolute value formation isolating stages ABS 1 , ABS 2 and ABS 3 according to FIG. 1. It contains two operational amplifiers 48 and 50 (also called computing amplifiers) connected in parallel. A diode CR 5 and the series connection of an ohmic resistor R 20 and a diode CR 6 are connected in parallel between the output and the inverting input of the amplifier 48 . The cathode of diode CR 5 and the anode of diode CR 6 are connected to the output of amplifier 48 , while its non-inverting input is grounded. With the ohmic resistor R 22 lying between the input P 5 and the inverting input of the amplifier 48 , the amplifier at the output connection point P 6 of the ohmic resistor R 20 and the diode CR 6 ensures a limitation (clipping) of the output signal, which is positive, unipolar and is reversed.

The amplifier 50 produces a limited (trimmed) and non-reverse reproduction of the input signal at the terminal P 5 at the output P 6 . A diode CR 7 and the series connection of a diode CR 8 and an ohmic resistor R 24 are connected in parallel between the inverting input and the output of the amplifier 50 . The cathode of diode CR 7 and the anode of diode CR 8 are connected to the output of amplifier 50 , while the non-inverting input is connected to terminal P 5 . The connection point of resistor R 24 and diode CR 8 is connected to the output terminal P 6 , which is connected to ground via an ohmic resistor R 26 .

The arrangement described transmits positive and negative input signals via amplifiers 50 and 48, which have a gain factor of one. Since only amplifier 48 causes a reversal, the output signal at terminal P 6 represents the absolute value of the input signal at terminal P 5. Other arrangements, eg. B. a conventional two-way bridge rectifier can be used for this.

FIG. 3 shows a more detailed circuit diagram of the actuator 10 according to FIG. 1. The main connections of the anti-parallel connected thyristors Q 1 and Q 2 are each connected to the AC operating connection P 2 and the output connection P 4 . An ohmic resistor R 28 and the secondary winding 52 of a transformer T 8 are connected in parallel between the control connection and the cathode of the thyristor Q 1 . An ohmic resistor R 30 and the secondary winding 54 of a transformer T 9 are connected in parallel between the control connection and the cathode of the thyristor Q 2 . The primary windings 56 and 58 of the transformers T 8 and T 9 are connected in series between control connections P 10 and P 12 , their connection point being connected to the positive pole of a voltage source. The winding direction of the transformers T 8 and T 9 is selected so that when the connection P 10 or P 12 is briefly grounded or connected to ground potential, the thyristor Q 1 or Q 2 is controlled in the conductive state. If the thyristor Q 2 is controlled via the terminal P 12 in the conductive state, a positive current flows from the terminal P 2 to the terminal P 4 , while a negative current from P 4 to P 2 can be triggered via the terminal P 10 . As soon as they are controlled or ignited once in the conductive state, the thyristors Q 1 and Q 2 remain conductive until the voltage drop between their main connections (between the anode and cathode) has dropped to almost zero volts. Actuators according to FIG. 3 are commercially available and in practice are somewhat more complicated than is shown here.

FIG. 4 shows a triggered or triggerable monitoring device in the form of an analog / digital converter AD which loads (loads) an output buffer L 1 , although other arrangements are also possible. If, for example, an analog device is used instead of the digital device, the device shown can be replaced by a sample and hold circuit known per se. The converter AD is a commercially available integrated circuit which converts an analog signal fed to the input INP into parallel 8-bit data. These eight bits are transferred to the buffer L 1 via the eight lines shown. The operation of the converter AD is triggered by a pulse being supplied to its start input SC. The conversion speed or clock frequency is determined by an external clock generator REF, which operates at 1.0 MHz and is connected to the clock input CL of the converter AD. The end of a conversion is signaled by a positive pulse at the connection EC of the converter AD. The start pulses are generated by a divider 61 (pulse frequency divider), which has its input at the terminal CL and its output at the terminal SC of the converter AD. With this connection, the divider 61 can trigger the conversion periodically with a repetition frequency that corresponds to the operating speed of the converter AD, e.g. B. 18 kHz. The latch L 1 , which is also called the latch circuit, consists of two commercially available integrated circuits which store the data generated by the converter AD in eight internal flip-flops. The data are stored with the leading edge or rising edge of each clock pulse at the input CL of the buffer L 1 , provided that its 0 input signal (a low signal of zero volts) is supplied to its input blocking terminal DI. The data are output from the buffer L 1 via a multiple line DA, provided the output blocking connection DO is supplied with a 0 signal. A 1 signal (+5 volts) at the reset input R of the latch L 1 causes all flip-flops to be forcibly reset to the 0 state regardless of the signals at their other inputs, so that the latch is cleared. The output EC of the converter AD is connected to the reset inputs R of two D flip-flops FF 1 and FF 2 , the data inputs D of which are connected to a common 1-signal source (+). The outputs Q of the flip-flops FF 1 and FF 2 are each separately connected to the reset input R and the clock input CL of the latch L 1 . The clock inputs C of the flip-flops FF 1 and FF 2 are each separately connected to connections SEL 1 and FCL. The connection SEL 1 is acted upon by the microcomputer COM ( FIG. 1) and is also connected to the input DO of the buffer store L 1 and the input of an inverter 62 (also called a non-gate), the output of which is connected to the input of an isolation amplifier 64 and the input DI of the buffer L 1 is connected. The output terminal 66 of the isolation amplifier 64 is connected to all outputs of corresponding isolation amplifiers in other converters. Similarly, the outputs of the clock generator REF, the divider 61 and the clock signal connection FCL are each connected to corresponding inputs of other analog / digital converters. These other converters are used to process the signals which are fed to the inputs IN 2 to IN 7 ( FIG. 1). The connection FCL receives a synchronization signal, which is used by a microprocessor (described below) in the microcomputer COM ( FIG. 1).

A trigger or trigger signal is fed to the connection SEL 1 from the control device in order to connect the flip-flops of the buffer store L 1 to the multiple line DA for the purpose of data output. If this trigger signal does not occur, a high signal or a 1 signal is present at connection SEL 1 , so that the device according to FIG. 4 converts the signal occurring at input INP of converter AD as follows:

The output of a pulse by the divider 61 triggers the operation of the converter AD which, after approximately 42 microseconds, generates a parallel 8-bit data word which represents the voltage occurring at its input INP. After this conversion, a pulse is transmitted from the output EC of the converter AD to the reset inputs R of the flip-flops FF 1 and FF 2 , so that their outputs Q supply the R and CL inputs of the latch L 1 0 signals. The next synchronization pulse at the connection FCL has the effect that a 1 signal occurs at the output Q of the flip-flop FF 2 and the clock input CL of the buffer store L 1 is triggered. Since a 1 signal occurs at connection SEL 1 , so that an inverse, ie, a 0 signal occurs at input inhibit input DI, the 8-bit data word is stored in the flip-flops of buffer store L 1 by converter AD. The next start pulse of the divider 61 then causes the aforementioned sequence of operations to be repeated.

It is now assumed that a trigger signal is fed to the terminal SEL 1 , so that a 0 signal at the input C of the flip-flop FF 1 and at the input DO of the buffer store L 1 , whereas an inverted 1 signal at the input DI of the buffer store L 1 occurs. In this case, the latch L 1 connects its inner flip-flops to the multiple line DA as long as the 0 signal is present at the SEL 1 terminal. In this way, the data are therefore transmitted to the multiple line DA. However, it should be pointed out that the buffer memory does not respond to clock signals at its clock input CL because of the 1 signal at its DI input. As soon as the output has been triggered, no attempt is made to change the data. If, on the other hand, a 1 signal occurs at connection SEL 1 , flip-flop FF 1 is flipped over its clock input C. Therefore, the buffer is L 1, a 1 signal supplied to the reset input R of the flip-flop output Q of the FF 1, the flip-flops whose reset (set to "0" asserted). This 0 state means that the elapsed time was not sufficient to enable the converter AD to store a new data word in the buffer L 1 . When the converter AD has completed a further conversion cycle, it outputs a pulse via its output EC to the reset inputs R of the flip-flops FF 1 and FF 2 . Then, these flip-flops lead to the inputs R and CL of the latch L 1 0 signals to. In this state, the buffer L 1 can receive a new data word from the converter AD when the next synchronization pulse occurs at the connection FCL. This re-storage is repeated in the manner described as long as a 1 signal is present at connection SEL 1 .

The signal supplied to the connector INP of the converter AD is taken from the connector IN 1 , which corresponds to the input designated in the same way in FIG. 1. The input filter shown is a low-pass filter with an ohmic resistor R 31 and a capacitor C 1 , the connection point of which is connected to the input INP of the converter AD. The other terminal of capacitor C 1 is grounded, while the other terminal of resistor R 31 is connected to the output of isolation amplifier 68 , the output of which is at terminal IN 1 . Curves that represent the signal at terminal IN 1 are shown in time diagram 8 B of FIG. 8. The course of the voltage on the high-voltage transformer T 1 ( FIG. 1) and on the gas cleaner 26 ( FIG. 1) are each shown in the time diagrams 8 A and 8 C in FIG. 8. As diagram 8 B ( FIG. 8) shows, the signal at input IN 1 has the form of a ramp or sawtooth signal with occasional high-frequency pulses which occur during the oblique signal curve. These high frequency pulses indicate the impending or the appearance of sparks.

The circuit between the IN 1 and INP terminals is an input filter designed to increase the sensitivity to sparking impending. Although this circuit is preferably a low-pass filter, it can also be designed differently. For example, it can have an integrator device or a bandpass filter or another processing circuit. The particular circuit used depends on the sensitivity desired and the waveform expected. The integrator device mentioned can have an integrator known per se with a computing amplifier with negative capacitive feedback (negative feedback).

FIG. 5 shows the microcomputer COM of FIG. 1 in a more detailed block diagram. Although the microcomputer shown has two microprocessors PRC 1 and PRC 2 , as already mentioned, an analog circuit can also be used instead. The processors PRC 1 and PRC 2 are connected to common multiple lines ADR and DA. The lines ADR are multi-bit lines to which the processors PRC 1 and PRC 2 supply encrypted address information. These addresses determine a specific memory location in the memory MEM and cause the latter to output the information stored under this address via the multi-bit data lines DA. The processors PRC 1 and PRC 2 and the memory MEM are commercially available integrated circuits.

Connections 66, 72 and FCL are connected to both processors PRC 1 and PRC 2 . A synchronizing clock signal, which controls the operational sequence of the processors PRC 1 and PRC 2 , is transmitted via the connection FCL already mentioned in connection with FIG. 4 by a clock generator (not shown). After a 75% half-wave of the AC operating voltage has elapsed, the connection 72 is supplied with a measurement signal at the input 12 ( FIG. 1). The circuit generating this measurement signal will be described below. An actuation signal is supplied via connection 66 , which has already been mentioned in connection with FIG. 4, which confirms that an analog / digital converter has been triggered by the processor PRC 1 or PRC 2 .

A timer device is shown as decoder MX. The decoder MX triggers each individual analog / digital converter under normal operating conditions once in every half-wave of the operating AC voltage present at the input 12 ( FIG. 1). The decoder MX responds to address words which are supplied to it via the address lines ADR. The signals on these lines represent various of the numerous analog to digital converters that are included in slave device 42 ( FIG. 1). One of these converters is the converter AD according to FIG. 4. The decoder MX has a trigger line for each of the analog / digital converters which it can trigger or trigger. The lines SELN ( FIG. 5) therefore comprise at least seven lines for triggering the seven converters connected to the seven inputs IN 1 to IN 7 ( FIG. 1). One of these trigger lines is the trigger line SEL 1 in Fig. 4. The decoder MX also has a line for each of the input and output devices described below.

The measured values supplied to the processors PRC 1 and PRC 2 are stored in a memory device, which is shown here as memory MEM and has eight read-only memories ROM in the form of integrated circuits and twenty random access memories RAM in the form of integrated circuits. Other commercially available memories can also be used. These storage devices also store the computer program, which is mainly stored in the integrated read-only memories ROM. The program controls the operations described in connection with the microprocessor COM ( Fig. 1) and the diagram of Fig. 9. Essentially, the program periodically triggers the analog to digital converters of slave device 42 ( FIG. 1) to measure the condition of the gas cleaners. As has already been mentioned, the amounts and changes in these parameters are compared with certain target values which are stored in the memory in order to determine whether the actuator 10 ( FIG. 1) has to be readjusted. In this way, the program sets the gas cleaner voltage to the highest value that does not cause unnecessary sparking or back corona discharge effects. The program instructions required to carry out the special operations described in connection with FIG. 1 are clear to the person skilled in the art. Furthermore, the person skilled in the art is able to choose the sequence of the program commands differently. In this way, all measurements can be carried out in sequence before any logical program command is executed. Instead, the measurements can also be carried out immediately before the time at which they are required for a special calculation or logical decision. Furthermore, the previously described response to impending sparking or back corona discharge effects can be contained in two separate subroutine routines that can run in any order. In addition, at certain time intervals, data can be recorded so often and logical decisions made so immediately that the program can be regarded as running in real time. Such a real time interval is a time interval in which sparking occurs, as has already been mentioned.

Since changing the program is relatively easy, you can such changes from time to time by the operator be made. For example, the operator can certain operating setpoints change when the gas purifier be used for an unusually polluted exhaust gas should or if the ambient temperature or humidity is unusual is.

It should also be pointed out that the block diagram according to FIG. 5 is simplified, but the structural details, which are not shown, are within the scope of expert knowledge. Then the capacity of the processors PRC 1 and PRC 2 is chosen so large that they can work with accessories such as knockers according to US-PS 40 86 647.

FIG. 6 shows peripheral input and output devices which cooperate with the processors PRC 1 and PRC 2 ( FIG. 5) in the form of a block diagram. In practice, the embodiment shown in FIG. 6 is more complicated, but the simplified one is sufficient Representation to explain the basic mode of operation.

Two seven-segment display devices 76 and 77 are acted upon by an interface circuit 78 . Circuit 78 includes latches (latches or latches) which store the information encrypted over data lines DA in response to a trip input pulse on line SEL 3 . After being stored, decoder drivers in circuit 78 drive numerical displays 76 and 77 to display to the operator the information generated by processors PRC 1 and PRC 2 ( Fig. 5). The lines SEL 3 and SEL 4 form part of the lines SELN ( FIG. 5), while the lines DA are the previously mentioned multiple lines.

The operator can enter information via manually operated switches SW 1 and SW 2 . These switches load buffers in circuit 79 , the content of which can be output by a trigger pulse on line SEL 4 via lines DA. The switches SW 1 and SW 2 can be a large part of a keyboard for entering alphanumeric information via the lines DA. The special design of the integrated circuits in the circuits 78 and 79 is well known, so that a further explanation of the device according to FIG. 6 is not necessary.

FIG. 7 shows some details of the circuit contained in the secondary device 44 ( FIG. 1). As you can see, this drawing shows a block diagram with logic components. In practice, however, this circuit can have additional or different logic gates and inversion stages (NOT gates). The data lines DA already mentioned transmit an 8-bit control signal and are connected to data inputs of a buffer memory L 4 , the data outputs of which are connected to data inputs of a buffer memory L 6 . The data outputs of the buffer memory L 6 are connected to preset inputs of a counter in the form of a preset down counter 80 . The latches L 4 and L 6 are integrated circuits with eight flip-flops each. The storage of data is brought about by the fact that a high signal or 1 signal is supplied to their clock inputs CL. The clock inputs CL of the latches L 4 and L 6 are connected to connections SEL and 120 , respectively. An input disable input DI of the latch L 6 is controlled by an inverter 82 , the input of which is connected to the SEL terminal. Applying a 1 signal to the input lock input DI of the buffer L 6 causes it to be deleted or to be reset to 0 in all places. The SEL connection is connected to one of the SELN lines ( FIG. 5). The SEL terminal is turned negative when a new control signal is generated.

The connection 120 is acted upon by a local frequency control loop, which has a pulse shaper 84 , a phase comparator PC, a voltage-controlled oscillator VCO and a frequency divider DIV. The pulse shaper 84 contains a decoupled comparator which generates a square wave with the same frequency as that of the operating AC voltage at the input 12 (see also FIG. 1). The voltage-controlled oscillator VCO, whose output signal has a nominal frequency of 122.88 kHz, acts on the frequency divider DIV, which generates five output signals whose frequencies are equal to the frequency of the oscillator VCO divided by 2 ⁿ . At the input frequency of 122.88 kHz, the frequency of the signals at the outputs 30 720, 480, 240, 120 and 60 is 30 720, 480, 240, 120 and 60 Hz. The phase of the 60 Hz signal at the connection 60 is compared in the comparator PC with the AC-synchronous output signal of the pulse shaper 84 . The output voltage of the comparator PC controls the oscillator VCO so that its phase position is rigidly synchronized with that of the operating AC voltage at the input 12 in a manner known per se. The components of this frequency control loop consist of integrated circuits that are commercially available. A NOR logic element 92 here forms a logic logic device. NOR gate 92 has eight inputs connected to the data lines between latches L 4 and L 6 and generates a 1 signal when there is a 0 signal on all data lines.

The signal appearing at terminal 120 is fed to the trip input of a monostable multivibrator 86 which generates a pulse lasting approximately 65 microseconds. The output signal of the monostable multivibrator 86 is fed to the inverting clock input C of a D flip-flop FF 4 , the terminals D, S and Q of which are each connected to ground or earth, the output of the inverting stage 82 and the one input of a NOR logic element 88 . The other input of the NOR gate 88 is connected to the output of the monostable multivibrator 86 and the one input of an OR gate 90 , the other input of this OR gate 90 being connected to the output of a NOR gate 92 . The output of NOR gate 88 is connected to reset inputs R of latches L 4 and L 6 . The output of the OR gate 90 is connected to the preset enable input PE of the down counter 80 , the clock input CL of which is connected to the output of an AND gate 94 . The aforementioned output 30 720 is connected to a non-inverting input of the AND gate 94 , the inverting input of which is connected to the carry output CO of the counter 80 . The carry output CO acts on a trigger device, which is shown here as a flip-flop FF 5 . A blocking device 96 is connected to this, which is shown as a phase comparator and has a first logic element 100 , a second logic element 102 and a third logic element 98 acted upon by it. Although gates 98, 100, 102 are each shown as NAND, OR, and NAND gates, of which NAND gate 98 is acted upon separately by OR gate 100 and NAND gate 102 , other arrangements of FIG Links possible. The output of the NAND gate 98 is connected to the input D of the flip-flop FF 5 . A polarity display device is shown here as a control device in the form of the flip-flop FF 6 .

In each case one input of the logic elements 100 and 102 is connected to the connection 60 , while the other two inputs are connected to the output (line VA) of the D flip-flop FF 6 . As can be seen, circuit 96 generates a 1 signal on line VC when the signal at terminal 60 is in phase with that at the output of flip-flop FF 6 , ie both are the same (1- or 0-signals).

The inputs D and C of the flip-flop FF 6 are each connected to the connection 60 and the output Q of the flip-flop FF 5 . The input C of the flip-flop FF 5 is connected to the output of an AND gate 104 , the inputs of which are each connected to the transmission output CO of the counter 80 and the output of a limiting device 106 . Means 106 is controlled by the signals at terminals 120 and 30 720 so that it generates a positive pulse, the duty cycle of which is manually adjustable. The trailing edge of this pulse is synchronized by the signal at terminal 120 . The construction of the device 106 is similar to the construction of the device which is connected to the counter 80 . The reset input R of the flip-flop FF 5 is connected to the output of an OR logic element 108 , the inputs of which are each connected to a connection SYSRS and the output of the OR logic element 90 . A manually adjustable overload signal is fed to the SYSRS connection. If the SYSRS connection is supplied with a 1 signal, the actuator 10 ( FIG. 1) is blocked.

An ohmic resistor R 32 lies between the base of an NPN transistor Q 4 and the output of an AND gate 110 . An ohmic resistor R 34 is located between the base of a transistor Q 6 and the output of a NOR gate 112 . The outputs Q and the flip-flop FF 5 are each connected to one of the inputs of the logic elements 110 and 112 . The other two inputs of these logic elements are connected together to the connection 60 . The connections P 10 and P 12 (see also FIG. 3) are each connected to the collectors of the transistors Q 6 and Q 4 , whose emitters are grounded. The output Q of the flip-flop FF 5 is connected to the input C of the flip-flop FF 6 via a line VB.

The operation of the circuit of FIG. 7 will first be described under normal conditions and then in the event of sparking. For ease of understanding 8 D is taken to 8 H respect to time charts showing the timing relationships between the signals on lines 60, 120, represent VA, VB and VC.

The transmission of a control signal is represented by a negative pulse at the SEL connection ( FIG. 7). It is assumed that this transmission occurs shortly before the end of a half wave of the AC operating voltage at input 12 , in anticipation of the regulation desired for a subsequent half wave. This negative trigger pulse at the connection SEL is reversed by the inverting stage 82 , which drives the set input S of the flip-flop FF 4 , so that a 1 signal occurs at its output Q. This 1 signal is fed to the NOR logic element 88 , so that this logic element supplies the reset lines R of the latches L 4 and L 6 with a 0 signal. The trailing edge of the negative pulse at the connection SEL triggers the clock input CL of the buffer L 4 , so that it stores the data present on the lines DA.

The connection 120 synchronized with the phase at the input 12 at the input 12 generates a positive transition at the end of the current half-wave of the operating voltage at the input 12 . The connection 120 therefore controls the clock input CL of the buffer L 6 and causes it to take over the data from the buffer L 4 at the end of this and every subsequent half-wave of the operating AC voltage. The signal at terminal 120 also triggers the monostable multivibrator 86 , which supplies the preset enable input PE of the down counter 80 via the OR logic element 90 with a positive pulse. This causes the counter 80 to be preset. The counter 80's default inputs are shown as inverting or complementing inputs. Accordingly, the binary complement or 255 minus the numerical output of the buffer L 6 is fed to the counter 80 for presetting. Provided that the binary number output from the latch L 6 was not zero, a 0 signal appears at the carry output CO of the counter 80 , which causes the AND gate 94 to transmit the 30.72 kHz signal from the connection 30 720 to the clock input CL of the counter 80 allowed. As soon as the output signals of the monostable multivibrator 86 and the OR gate 90 decrease to zero, the AND gate 94 causes the counter 80 to count down from the preset, complemented input value at a frequency of 30.72 kHz. This will be explained in more detail using a numerical example: When the buffer L 6 outputs the number 100, the counter 80 is preset to 155, so that it has counted down to zero in about five milliseconds. The number output by the buffer L 6 is proportional to the current flow angle of the actuator 10 ( FIGS. 1 and 2). As soon as the counter 80 has reached the count value zero, it generates a 1 signal at the transmission output CO, which blocks the further supply of clock signals to the counter 80 via the AND logic element 94 .

As can be seen, a 0 signal appears at the output CO of the counter 80 when the triggering pulse is fed to the terminal 120 . This transition to the 0 state takes place periodically and once in every half-wave of the operating AC voltage at input 12 . The duration of the 0 signal at the transmission output CO is proportional to the binary complement of the data stored in the buffer memory 6 . Since the signal at the carry output CO is periodic, it can also be regarded as a positive pulse, the duration of which corresponds proportionally to the non-complemented data that are read out from the buffer L 6 .

Since normal conditions have been assumed, it is now assumed that the signals supplied via the connection SYSRS and the output signal of the device 106 are 1 signals and the output signal of the NOR gate 92 is a 0 signal, in all relevant time periods. It is also assumed that the flip-flop FF 6 is reset.

Under this condition, the next positive transition of the signal at terminal 60 corresponds to the beginning of a positive half-wave of the operating AC voltage at input 12 . Simultaneously with this, there is a positive transition in the signal at terminal 120 , while a negative transition then occurs in the signal at carry output CO of counter 80 . Since the signals at terminal 60 and at the output of flip-flop FF 6 are now in phase, circuit 96 supplies the D input of flip-flop FF 5 with a positive signal. The positive transition of the signal at terminal 120 causes a short pulse to be transmitted via components 86, 90 and 108 to reset input R of flip-flop FF 5 , so that outputs Q and 0 and 1 signals each occur. As a result, logic gates 110 and 112 supply 0 signals to the bases of transistors Q 1 and Q 2 , so that they are blocked without further action.

After a time determined by the counter 80 , a positive transition occurs in its carry output signal in the manner described above. This signal rise is fed via the AND gate 104 to the clock input C of the flip-flop FF 5 . Since a 1 signal is present at the input D of the flip-flop FF 5 , as already mentioned, the transition at its input C causes it to change its state. As a result of this change, a 1 signal is fed to one input of the AND gate 110 and the other input of the AND gate 110 receives the 1 signal from the terminal 60 , the AND gate 110 now controls the transistor Q 4 . Turning transistor Q 4 on ignites thyristor Q 2 ( FIG. 3) via pulse transformer T 9 . In this way, a positive current flows through the actuator 10 ( Fig. 1) during the remainder of the current half-wave.

The aforementioned change in the state of the flip-flop FF 5 causes a positive transition at the clock input C of the flip-flop FF 6 . Since a 1 signal is still present at its input D, the flip-flop FF 6 also changes its state, so that it outputs a 0 signal at its output. Since this output signal is now out of phase with the signal at terminal 60 , circuit 96 supplies a 0 signal to input D of flip-flop FF 5 without this having any further effect.

At the beginning of the next half-wave of the operating AC voltage at input 12 , a negative or positive transition appears in the signals at connections 60 and 120 . Similar to the previous half-wave, the flip-flop FF 5 is reset again. After this change, the signal at terminal 60 is again in phase with the signal at the output of flip-flop FF 6 , so that circuit 96 supplies a 1-signal to input D of flip-flop FF 5 . In a similar way as before, the counter 80 generates a 0 signal at its carry output CO for a time corresponding to the number preset by the buffer L 6 . When this signal at the carry output CO finally carries out a positive transition again, this is fed via the AND gate 104 to the clock input C of the flip-flop FF 5 . Since its input D is now supplied with a 1 signal, the flip-flop FF 5 changes its state so that it supplies a 0 signal to one input of the NOR logic element 112 , the 0- input of this NOR logic element 112 likewise having a 0- Signal is supplied from terminal 60 . As a result, the logic element 112 controls the transistor Q 6 and this in turn controls the thyristor Q 1 ( FIG. 3). A negative current now flows through the controlled thyristor Q 1 during the remainder of the current half-wave. The just mentioned change of state of the flip-flop FF 5 also causes the signal at its output Q to trigger the clock input C of the flip-flop FF 6 , so that the flip-flop FF 6 also toggles or changes its state. Since the signal at the output Q of the flip-flop FF 6 thereby comes out of phase with the signal at the terminal 60 , the circuit 96 supplies the input D of the flip-flop FF 5 with a 0 signal without this having any effect. In this state, the device is prepared so that it can go through another cycle in the manner described. Thus, at the beginning of the next half-wave, the signal at terminal 60 comes back in phase with the signal at the output of flip-flop FF 6 .

It is now assumed that instead of continuing normal operation, sparking occurs before and during the following half wave. As a result, the transformer T 1 ( FIG. 1) is overloaded and driven into saturation. A binary 0 signal is then fed to lines DA ( FIG. 7). This 0 signal is transferred to the latches L 4 and L 6 shortly before the beginning of this next half-wave. As a result, the input signals to NOR gate 92 are all zero so that it produces a 1 signal. Regardless of whether the counter 80 is currently counting, this 1-output signal of the logic element 92 is transmitted via the logic element 90 , so that the counter 80 is set to its maximum count value before this next half-wave. Since it was further assumed that the sparks persist before and during this next half-wave, the 1 output signal of the NOR gate 92 also remains. As a result, the output signal at the carry output CO of the counter 80 also remains zero during this entire half-wave.

Since the flip-flop FF 5 is not triggered in this next half-wave, neither this nor the flip-flop FF 6 changes its state. After this half-wave has elapsed, the signal at terminal 60 and the signal at the output of flip-flop FF 6 therefore become out of phase. Then the circuit 96 supplies the input D of the flip-flop FF 5 with a 0 signal. As long as this signal lasts at input D, the flip-flop FF 5 cannot flip, so that the transistors Q 4 and Q 6 remain blocked and the actuator 10 ( FIGS. 1 and 3) keep blocked. Therefore, when the link 92 ( FIG. 7) blocks the actuator 10 ( FIG. 1) for one half-wave, the operating power or power supply is not switched on again in the next half-wave. Therefore, normal operation is prevented before the phase equality between the signals at the connection 60 and the output of the flip-flop FF 6 is restored. In this way, the phase comparison just described ensures that when the power supply is switched on again, this is timed so that the current flows after the power supply is switched on in the opposite direction to that before the power supply interruption.

This feature ensures that the magnetization in the transformer T 1 ( Fig. 1) after switching on is opposite to that during the sparking. Therefore, the transformer is desaturated and not saturated.

Similarly, an operator can apply a 1 signal to the reset input R of the flip-flop FF 5 via the connection SYSRS and the logic element 108 . Since the flip-flop FF 5 is forcibly reset, the transistors Q 4 and Q 6 can not carry any current, so that the actuator 10 ( FIG. 1) is blocked again.

It should also be pointed out that the device 106 supplies a 0 signal to the one input of the AND logic element 104 during a manually adjustable time interval which begins with every half-wave of the operating AC voltage at the input 12 . The device 106 therefore ensures that the flip-flop FF 5 can be triggered at the earliest possible time. The device 106 therefore determines the maximum current flow angle of the actuator 10 ( FIG. 1).

As already mentioned, the one described with reference to the nine figures Device in a variety of ways, either be digital or analog. Furthermore, the most varied Microprocessor programs are used. Also the Sensitivity of the device to the measured quantities can can be set so that the respective gas cleaner, the should be regulated, is adjusted. In addition, there are others Embodiments possible in which circuit components with different  Tolerances and nominal data to achieve the desired Accuracy, performance, speed, etc. can be used.

Claims (20)

1. Electrostatic gas cleaning device with a high-voltage converter device, the high-voltage transformer (T₁) is fed via a voltage regulator ( 10 ) and provides a variable high voltage depending on a control signal supplied to the voltage regulator via a control device, the control signal at the control device the voltage regulator ( 10 ) in Dependency on the load on the high-voltage converter device blocks when a predetermined limit value is exceeded during a predetermined limit interval and is released again after this limit interval, characterized in that the control signal from the control device only adjusts the voltage regulator ( 10 ) during a half-wave of the operating alternating voltage with an opposite one Polarity at which releases at the beginning of the limit interval. 2. Device according to claim 1, characterized in that a conductive element ( 16 ) with the high-voltage converter device (T 1, 18 ) is connected and is dependent on changes in the modulation of the high-voltage converter device for generating a high voltage, the control signal being dependent on the voltage the conductive element ( 16 ) is dependent. 3. Device according to claim 2, characterized in that the control device ( 42-44 , COM) comprises:
a memory device (L 1 ) for generating a reference signal in dependence on at least one previous value of the voltage on the conductive element ( 16 ), and that the control device generates the control signal with a magnitude that is in a predetermined relationship to the reference signal and the current value of the voltage on the conductive member ( 16 ), the gas cleaning device being responsive to parameters indicative of impending high voltage sparking. 4. The device according to claim 3, characterized in that the conductive element ( 16 ) is predominantly inductive and that the control device ( 42-44 , COM) the control signal in the direction of a reduction in the output current of the actuator ( 10 ) depending on a predetermined amount exceeding increase in voltage across the conductive member ( 16 ) changes. 5. The device according to claim 4, characterized in that the conductive element ( 16 ) has a linear choke coil connected in series with the transformer (T 1 ). 6. Device according to one of claims 1 to 5, characterized in that the control device ( 42-44 , COM) comprises:
a triggerable monitoring device (AD) for repeatedly generating a signal as a function of the voltage on the conductive element ( 16 ) when the monitoring device (AD) is triggered. 7. The device according to claim 6, characterized in that the control device ( 42-44 , COM) responds to a change between two successive signals and that the first of the two successive signals is stored in the memory device (L 1 ). 8. The device according to claim 2, characterized in that the control device ( 42-44 , COM) has an integrator device connected to the conductive element ( 16 ) for generating a signal representing the time interval of the voltage on the conductive element. 9. The device according to claim 2, characterized in that the control device has an input filter device ( 43 ) connected to the conductive element ( 16 ) for suppressing frequency components with a predetermined spectrum. 10. The device according to one of claims 1 to 5, characterized by a high-voltage measuring device (R 8 -R 14 ) for transmitting a signal to the control device ( 42-44 , COM), the size of the high-voltage converter device (T 1, 18 ) represents generated voltage, and that the control signal is gradually advanced depending on a concurrent increase in the voltage generated by the high-voltage converter device (T 1, 18 ). 11. The device according to one of claims 1 to 10, characterized in that the control device ( 42-44 , COM) reverses the direction of the change in the control signal as a function of a predetermined decrease in the voltage generated by the high-voltage converter device (T 1, 18 ). 12. Device according to one of claims 1 to 11, characterized by a logic device blocking the actuator ( 10 ) as a function of a predetermined value of the control signal, and in that the predetermined value as a function of such a decrease in the voltage conversion device (T 1, 18 ) generated voltage that corresponds to sparking. 13. The apparatus according to claim 6, characterized in that the control device ( 42-44 , COM) has a timer device (MX) for triggering the monitoring device (AD) with a frequency which is proportional to the frequency of the AC operating voltage. 14. The apparatus according to claim 13, characterized, that the timer device (MX) the monitoring device (AD) in the last half of each half cycle of the AC operating voltage triggers. 15. The apparatus according to claim 1, characterized in that the control device ( 42-44 , COM) comprises:
a polarity indicator (FF 6 ) for generating a polarity signal indicating the polarity of the current most recently passed through the actuator ( 10 ), and a blocking device ( 96 ) which blocks the actuator ( 10 ) until the alternating current has its polarity with respect to the polarity signal is reversed and that after a power cut by the control signal, the power supply continues with a polarity opposite to that which existed prior to the power cut. 16. The apparatus according to claim 15, characterized in that the polarity display device (FF 6 ) has:
a control device with a first and a second state, the control device being operable in such a way that it assumes the first and second state during the positive and negative half-waves, depending on the current flow through the actuator ( 10 ), the locking device ( 96 ) has:
a phase comparator for preventing the current flow from being triggered by the actuator ( 10 ) when the first and second states coincide with the positive and negative half-waves of the alternating current. 17. The apparatus according to claim 16, characterized in that the phase comparator ( 96 ) has:
a first logic element ( 100 ) for generating a first signal depending on the occurrence of the second state during the positive half-wave of the alternating current;
a second logic element ( 102 ) for generating a second signal depending on the occurrence of the first state during the negative half-wave of the alternating current and
a third link ( 98 ) for preventing the current flow from being triggered by the actuator ( 10 ) as a function of the first and second signals 18. The apparatus according to claim 17, characterized in that the control device ( 42-44 , COM) has:
a counter ( 80 ) which, at the beginning of each half-wave of the alternating current with a predetermined clock frequency, counts a number which corresponds to the size of the control signal, and
a tripping device with a tripping state and a stopping state which, in the absence of the first and second input signals of the third logic element ( 98 ), changes to the tripping state at the end of the counting of the counting device ( 80 ) and returns to the stopping state at the end of each half-wave of the alternating current. 19. The apparatus according to claim 18, characterized, that the trigger device in dependence on a predetermined Decrease in the size of the changeable high voltage is reversed into its stop state. 20. The apparatus according to claim 19, characterized in that the control signal is a digital multi-bit signal and the control device ( 42-44 , COM) has a logic logic device which controls the triggering device in its stopping state when the control signal represents a predetermined digital character that corresponds to sparking in the gas cleaner.