DE3110075C2 - Current limiter for a flyback converter - Google Patents

Abstract

The invention relates to a current limiter for a blocking converter. The transistor current of the transistor (TS) in the primary circuit of a transformer (TR) is measured by a current transformer (SW) and compared with a reference voltage that depends on the duty cycle of the transistor current. If the permissible transistor current is exceeded, the transistor is blocked until a new switching period begins. Due to the reference voltage, which is dependent on the pulse duty factor, the inverter is almost always switched off at the same output current, even with different input voltages. The limiter circuit (BS) contains a differential amplifier (DV) to which a measurement voltage (u ↓ i) proportional to the transistor current (i ↓ T) and a reference voltage (U ↓ C) are fed. The reference voltage is generated via a switch (S), which is controlled according to the duty cycle, a resistor (R ↓ 1) connected downstream of the switch, a voltage divider (R ↓ 2, R ↓ 3) and a capacitor (C) used for filtering.

Description

The end of the capacitor is connected

The voltage divider uses a DC voltage as the reference voltage and a second one DC voltage proportional to the pulse duty factor is superimposed. This is for different input voltages and thus a limitation with approximately the same even with different pulse duty factors maximum output current of the flyback converter possible.

Further advantageous embodiments of the invention are specified in the remaining subclaims.

An exemplary embodiment of the invention is described below with reference to FIGS. 1 to 5 explained in more detail.

It shows

F i g. 1 a limiter circuit according to the invention,

2 shows the basic circuit diagram of a flyback converter with the limiter circuit according to the invention,

Fig. 3 shows the basic course of the transistor current

Fig. 4 the current-voltage output characteristic of a Blocking converter with the limiter circuit according to the invention.

In Fig. 1 is the limiter circuit according to the invention ßS shown

First, however, the circuit diagram and the function of a flyback converter should be based on FIG. 2 and 3 explained will.

F i g. 2 shows the basic circuit diagram of a flyback converter. The input circuit is connected to an input voltage Ue via input terminals £ 1 and £ 2. The positive supply potential + Ue is applied to input terminal £ 1, while the second input terminal £ 2 is connected to 0 volts (J.). In the input circuit there is a series connection of the primary winding of a transformer 77? and a transistor TS. The current converter SW connected in series with the transistor does not initially need to be considered. A rectifier circuit with a rectifier G and a capacitor C 1 is connected to the secondary winding of the transformer TR. The output terminals are labeled A 1 and A 2. A consumer that lies between these output terminals has not been shown. The base of the transistor TS is connected to an output AS of a controller ST . A transducer MWis connected to the output terminals Ai, A 2 . Its output is connected to a first input £ 13 of the controller.

In addition, the limiter circuit BS is also connected to the output of the transducer MW via a second input, the node 52. The first input £ 11 of the limiter circuit is connected to the output of the current transformer SW . The clock input £ T of the limiter circuit SS is connected to the clock output A T of the control. The limiter circuit receives a control voltage which corresponds to the pulse duty factor of the transistor current. The control output AB of the limiter circuit BS is connected to the limiter input EB of the controller.

The transistor 7 ″ S is blocked via this limiting input EB and is only switched on again at the beginning of a new period. A circuit arrangement for this purpose uses an RS flip-flop (set-reset flip-flop) The RS flip-flop is set and the second resets it. During the setting time, the transistor 7 "S is also turned on. Of the limiter is in too large transistor current a signal abgegeber., That takes place the flip-flop on the clear input (clear input) prematurely resetting the blocking of the transistor TS itself, which is an npn-type in the embodiment by applying a negative voltage or ground at the base.

The control ST ensures periodic switching through and blocking of the transistor TS. The frequency should be constant in this embodiment. A typical waveform of the transistor current h is shown in FIG. When the transistor is switched on, its current rises practically vertically up to a value i \ . This is followed by a further slow rise, the steepness of which depends on the input voltage Ue and the inductance of the transformer, up to a maximum value k- After reaching this value, the transistor current drops to the value 0, and after a total of one cycle period Γ again to rise suddenly to the value i \. The duration of the current flow was denoted by yT, the duration of the current pause with (1-y ) T.

The ratio // (1— /) is called the duty cycle. The maximum value for γ is 0.5. The duty cycle depends on the input voltage. With higher input voltages, a smaller pulse duty factor is sufficient to generate the same output current U with the same output voltage Ua.

Disregarding losses and with a transformation ratio of the transformer TS of 1: 1, the output voltage is

U _A = Ue-

\ -y

and the output current

U _A QY

IL

The transistor TS of the flyback converter is now controlled so that the output voltage is constant with different loads. This is done, for example, via the transducer MW. which measures the output voltage Ua and converts it into a second auxiliary voltage Uh 2 proportional to the output voltage, which determines the duty cycle of the transistor TS via the first input £ 13 of the controller S7 ". Controls of this type are known from numerous circuits for flyback converters belongs to the invention, it should not be described in more detail.

The output voltage Ua and the second auxiliary voltage Uh 2 are generally galvanically separated via the transducer MW. The galvanic separation can, for. B. can be done optically, as can the second auxiliary voltage Uh 2 , which is also used to regulate the output voltage Ua, via an auxiliary winding of the transformer 77? and a subsequent rectification can be obtained.

The relationship between the output current and output voltage of a flyback converter with conventional limitation of the transistor current is explained using the output characteristics in FIG. The output characteristics were shown for two different input voltages Ue ί and Ue2 . The input voltage Ue \ is the minimum voltage, ie the flyback converter works with the maximum pulse duty factor (/ = 0.5). Up to the knee point K \ , the output voltage Ua remains constant with increasing output current U , and then slowly with further increasing

decreasing output current down to the value 0. With a higher input voltage Ue2 , a smaller pulse duty factor (e.g. with / = 0.3) is required. Due to the smaller duty cycle, the output voltage drops at significantly higher values of the output current Ia at the break point K 2. It is known to achieve so-called "pull-in characteristics" by feeding the output voltage back to the control system, which are shown in FIG. 4 are shown as dashed lines. Depending on the input voltage, however, the output voltage continues to be limited in the case of different output currents Ia , which means that the circuit arrangement must be dimensioned for the maximum value.

The limiter circuit according to the invention practically coincides the breakpoints K 1, K.2 (FIG. 5). The arrangement of the limiter circuit is shown in FIG. 1 can be seen. A voltage Ui which is proportional to the actual value of the transistor current ir is fed to the limiter circuit via an input £ 11. This voltage u is obtained via a current transformer SW , which is switched into the input circuit and measures the emitter current of the transistor / V. The current transformer can also be switched into the collector circuit. In the simplest case, an ohmic resistor represents the current transformer.

As already mentioned, the limiter circuit BS is shown in FIG. 1 shown. It contains a comparator (comparator) CO. The first input £ 11 of the comparator CO is connected to the output of the current transformer SW. The second input £ 12 of the comparator CO is connected to a capacitor C, the second terminal of which is connected to 0 volts (X). In addition, this connection is connected to a resistor combination consisting of three resistors R \, R2 and R 3. The second resistor R 2 and the third resistor R 3 form a voltage divider, the second resistor Λ 2 being connected to the circuit point 52, to which a second auxiliary voltage Uni is connected, and the resistor R 3 is connected to 0 volts (X) The connection point of these two resistors is connected to the second input £ 12 of the comparator CO and at the same time led to a connection of the first resistor R 1, the second connection of which is connected to the changeover contact of a switch S. The changeover contact is alternately at 0 volts (X) or on a first constant auxiliary voltage Um switched The switch is controlled via a clock input ET. A C-MOS gate, for example, can be used as the switch. The output of some types of multivibrator can also be used directly as a switch.

While the voltage Ui proportional to the transistor current h is applied to the first input £ 11 of the comparator CO , the reference voltage Uc is applied to the second input £ 12. As long as the reference voltage is greater than the voltage u, the output voltage of the comparator CO remains positive. If, on the other hand, the voltage u, reaches a value greater than the reference voltage Uc , the output voltage of the comparator CO becomes negative. This causes the transistor 75 to be blocked until the beginning of the next clock period at which the transistor TS is switched on again. The reference voltage Uc is composed of a direct voltage, which is formed by the ratio of the resistors R2 and A3, and a further direct voltage, which is determined by the duty cycle of the transistor current ir and has an internal resistance R 1. The capacitor C is used for sieving and ensures that the reference voltage is ίΛ-a direct voltage. The second auxiliary voltage Un present at the circuit point 52 is initially considered to be constant. It should have the same size as the first auxiliary voltage Uu 1. For the sake of simplicity, it is assumed that, with the minimum input voltage Un, the reference voltage Ucd \ e is half of the auxiliary voltages and / = 0.5. Then R 2 = R 3 is chosen. The switch 5 also supplies the same reference voltage Uo at / = 0.5. A limitation is intended at the inflection point K 1 of FIG. 4 insert. With a higher input voltage Ue of the flyback converter, the pulse duty factor is reduced. Since the switch 5 is now applied to 0 volts (X) for a longer time and to the first auxiliary voltage Uh \ for a shorter time, the reference voltage Uc becomes smaller. As a result, the limitation occurs earlier (with smaller values of the transistor current / V) and the desired output characteristic is shown in FIG. 5 is achieved. By suitably dimensioning the resistors Ri, R 2, R 3 , the break points can be shifted as desired. In special cases it is possible to dispense with one of the resistors R 2, R 3 or both. In general, however, there are greater scattering of the break points.

The comparator CO is supplied with power via a further auxiliary voltage, not shown here. Depending on the type of comparator used, the output signal can of course also vary between a positive voltage and voltage 0, for example.

In many applications, the in F i g. 5 "drawing in characteristics" is desired. This is achieved in that a voltage proportional to the output voltage Ua is used as the second auxiliary voltage Uh 2.

It is also possible to use the second auxiliary voltage Uh 2 as the first auxiliary voltage Uh 1. This results in an even stronger "characteristic curve to be drawn in". In this case it must be ensured that the switch 5 remains functional.

For this purpose 2 sheets of drawings

Claims (6)

Patent claims: 1.Current limiter for a flyback converter, which contains a transformer (TR) and a transistor (TS) connected in series with its primary winding , with a rectifier circuit (G, C 1) connected to the secondary winding of the transformer and with a controller (ST), which switches the transistor (TS) periodically through and controls by changing the duty cycle so that the output voltage of the flyback converter is constant, with a limiter circuit (BS) which contains a comparison circuit whose output (AB) with a limiting input (EB) of the controller ( ST) is connected to a current transformer (SW ) connected in series with the transistor (TS) , which supplies an input (Eli) of the comparison circuit with a measuring voltage (u,) proportional to the transistor current (fr) , which when a reference voltage (U ₀ ) submitting a. Signal to the controller (ST) causes the transistor (TS) to block until the beginning of a new clock period, characterized in that a comparator (CO) is provided as the comparison circuit, the second input (E 12) of which the reference voltage (Uc) is supplied, which is also smaller with decreasing duty cycle of the transistor current (fr) that the reference voltage (U _c ) is generated with the help of a switch (S) with a changeover contact, which corresponds to the duty cycle of the transistor current (if) between a first auxiliary voltage (Uh i) and 0 volts (I) are periodically switched back and forth, that the other terminal of the switch (S) is connected to the second input (E 12) of the comparator (CO) via a resistor (Rl)
and that a capacitor (C) is connected to the second input (E 12) of the comparator (CO). 2. Current limiter according to claim 1, characterized in that a voltage divider with two resistors (R 2, R 3) is provided between a circuit point (S 2) at which one of the output voltage (Ua) of the reverse converter proportional second auxiliary voltage (Uh 2) is applied, and 0 volts is switched, and that the connection point of the resistors (R 2, R 3) is also connected to the terminal of the capacitor (C) . 3. Current limiter according to claim 2, characterized in that a transducer (MW) which outputs a second auxiliary voltage (Uh 2) proportional to the output voltage (Ua) of the reverse converter is provided, the output of which is connected to the node (S 2). 4. Current limiter according to one of the preceding claims, characterized in that a constant voltage source is provided as the first auxiliary voltage (Uh]). 5. Current limiter according to one of the preceding claims, characterized in that as he-Die The invention relates to a current limiter according to the preamble of claim 1 (DE-AS 28 38 009). In the magazine »telcom report I (1978), issue 6, pages 404-409 «describes how converters work. In the case of flyback converters with trapezoidal transistor current, overloading occurs even when limited of this current to the destruction of the components of the output circuit through the measures that have been customary up to now. Attempts were made to prevent this destruction by overdimensioning the components. This made however, the flyback converters are bigger, heavier and more expensive. In DE-AS 28 38 009 a current limiter circuit for a DC converter is described, which essentially comprises a second current measuring device via a control and regulating circuit Switching transistor blocks when overloaded. A first transistor of the second current measuring device is via the Series connection of a diode and a resistor from the secondary winding one from the emitter current of the Switching transistor through which the current transformer flows. The second current measuring circuit only engages via further transistors via the control and regulating circuit on if the minimum switching time of the switching transistor is due to excessive input voltage or higher Overload would have to be undershot until the short circuit. It ensures that the current in the Power circuit does not exceed the permissible limit. After the fault has ceased, e.g. a short circuit, immediately suspends the current limitation. In this circuit arrangement, however, the current limitation is dependent on the input voltage and therefore a performance-related appropriately designed dimensioning of the components is necessary. The object of the invention is to provide a limiter circuit in which the output currents of the flyback converter are independent of the input voltage limited to approximately the same values. Based on the preamble of claim 1, the object is achieved by the characterizing features of claim 1 solved. It is particularly advantageous if the transistor current is monitored. Be by its limitation all other components of the flyback converter are also protected against overload. Since the monitored maximum permissible Transistor current is dependent on the duty cycle, a reliable limitation is guaranteed. It is advantageous if a circuit arrangement with a capacitor, a resistor and a Switch for generating the reference voltage is provided that the changeover contact of the switch has the resistor is connected to one terminal of the capacitor and that the switch is periodically corresponding the duty cycle of the transistor current between a first auxiliary voltage and 0 volts back and forth is switched on. This makes it easy You nüiSapttiiilüiig (OHi; cüciiiäiiS uic /. Wide iiiuS- voltage (Uh 2) is provided. 6. Current limiter according to one of the preceding claims, characterized in that a constant voltage source is provided as the first auxiliary voltage (Uh 1). t-1i_ '_ _ ± * 1 Π £ cmc UClU ι aaivci iiaiiiiia ριυμυι uuuaiv; i \ ticii, ii £ .3) / au nung won. It is also advantageous if a voltage divider is provided with two resistors, the between the switching point at which an auxiliary voltage proportional to the output voltage of the reverse converter is applied, and 0 volts is switched, and that the connection point of the resistors also with the