DE2935346A1 - INTEGRATED REFERENCE VOLTAGE SOURCE IN MOS TRANSISTOR TECHNOLOGY - Google Patents

Description

Integrated reference voltage source in MOS transistor technology

The present invention relates to an integrated voltage reference source according to the preamble of claim 1. It relates in particular to a reference voltage source that is a supplies a reference voltage proportional to the absolute temperature, which is referred to below as a PTAT reference voltage source or PTAT source as well as a temperature-compensated reference voltage source and a voltage detector built on said PTAT reference voltage source.

Reference voltage sources of the type mentioned are integrated in Analog circuits such as Aaalog digital converters or digital-to-analog converters used as a calibration voltage source, or are used, for example, to check a battery voltage.

Reference voltage sources that can be integrated into MOS transistor technology are in the article by David A. Hodges, Paul R. Gray and Robert W. Brodersen "Potential of MOS Technologies for Analog Integrated Circuits", published in the publication ESSCIRC, 1977, Pages 43 to 47 mentioned. The authors give various options for realizing such reference voltage sources such as the use of a Zener diode, the use of bipolar transistors to form a "band gap" - Reference voltage source or using the difference between the threshold voltages of depletion and enhancement MOS transistors. However, these solutions are too complicated and too sensitive for industrial application and the authors mentioned are also of the opinion that it is unlikely that exact reference voltage sources will be in a fully integrated form could be made with the usual MOS transistor techniques.

030012/0761

The ability to use integrated circuits in the weak Inversion area operated MOS transistors for manufacture from reference voltage sources to. is based on Eric Vittoz and Jean Fellrath in the article "CMOS Analog Integrated Circuits on Weak Inversion Operation ", published in the ΙΞΕΞ Journal of Solid-state Circuits, Vol. SC-12, No. 3, June 1977, pages 224 to 231. The proposed circuit (see for example Figure 8 of this article) provides only a low voltage which is very difficult to multiply in a cascade arrangement v / can earth.

It is an object of the present invention to provide a PTAT reference voltage source to create, which can be easily and easily manufactured in a conventional MQS transistor technology in structure istο The object of the invention is also the creation of higher PTAT reference voltages with the help of a cascade arrangement of elementary circuits or with the help of additional transistors » The invention also pursues the purposes using a inventive PTAT tension source a temperature-compensated Reference voltage or a voltage detector create"

The integrated reference voltage source geraäss the invention in the characterizing part of claim 1 specified features. Preferred embodiments of the invention are set out in the subclaims and in independent claims.

The reference voltage sources integrated according to the invention are Thanks to their simple structure, they only require a small area of the integrated circuit »The power consumption of the circuits is very low due to the operation of the transistors in the weak inversion region. The arrangements according to the invention have good overall properties and the circuits can be designed that they can be reproduced very well »

The invention is described in more detail below on the basis of exemplary embodiments with the aid of the accompanying drawings. It demonstrate :

FIG. IA shows the circuit diagram of an elementary circuit of a PTAT reference voltage source according to the invention,

FIG. IB shows the scheme of a dynamic arrangement corresponding to the circuit arrangement of FIG. IA ₇

FIG. 2 shows the circuit diagram of a PTAT voltage source with a cascade connection of circuits according to FIG.

Figure 3 shows the circuit diagram of a basic circuit to achieve a higher PTAT reference voltage,

Figures 4A and 4B show the structure of circuits on the basis of Figure 3A with additional transistors,

Figure 5A a simplified circuit diagram of a temperature-compensated reference voltage source _/

FIG. 5B shows the dependence of the base emitter voltage of a Auxiliary transistor in Figure 5A,

Figure 5C shows a detailed circuit arrangement of a temperature compensated voltage reference source according to Figure 5A,

FIG. 5D shows a simplified diagram of a voltage detector and

FIG. 6 shows a schematic representation of a mask arrangement accordingly a preferred embodiment of the transistors according to Figure IA.

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The basic circuit of a reference voltage source, as shown in Figure 1A, has swei n-channel MOS transistors T. and T , which are formed in the same diffusion trench. «The lines of these transistors are in series between the terminals (+» -) connected to a supply voltage source, which supplies a voltage O ₀ »The gate electrodes of these transistors are connected to one another and to the positive terminal (-S-) of the supply voltage source and the substrate connections are also connected to one another and to the negative terminal (-) of this voltage source tied together"

To explain the mode of operation of this basic circuit, it should first be pointed out, that a MOS transistor is known can be used in one or the other of the following two areas of work:

In the quadratic working area or area "strong inversion ^" in which the gate-source voltage of the transistor is higher than its extrapolated threshold voltage (see, for example, the book by A "S" Grove "Physics and Technology of Semiconductor Devices" edited by J. Wiley & Sons, 1967 "Chapter 9, page 277 5 the extrapolated threshold voltage or" turn-on ™ voltage is denoted by V in the following) 5

In the exponential work area or area of weak inversion, in which the gate-source voltage of the transistor is below said extrapolated threshold voltage.

The transition from one work area to the other is continuous. In the saturation region, it is generally assumed that the transistor is operated in the weak inversion region if I _ß ^ P, U _T ² where

I_ = sink current

β = quadratic coefficient = Sm-C

W ' ^OX

S = form factor = ■ = ■

Ij

W = effective channel width of the transistor L = effective channel length of the transistor

030012/0761

j> = mobility of the charge carriers in the channel

C = gate oxide capacitance

U = characteristic voltage = kT / q

k = Boitsmann's constant

Q = elementary charge

T = absolute temperature

In the following, the statement that a MOS transistor is operated in the weak inversion range is understood to mean that its Gate-source voltage is always less than V _ and that its sink current satisfies the above inequality. Under these conditions the sink current can be roughly printed out as follows

V ^{n ü} t <VV - ⁽ VV

¹ D - ^{S 1} DO

₂ V T0T Vt

η U _T e - (e ■ - e

I _ = characteristic current of the transistor

V = gate-substrate voltage

η = gradient factor in exponential operation

V = source-substrate voltage

V = drain substrate voltage

V = extrapolated threshold voltage.

In the schematic diagram of Figure IA the drain currents of the transistors _Τ Ί and T are each _n with I "and I__ designated. If a current al "is additionally supplied at point 1, the sink current of transistor T,

¹ DL ^{= 1} D ₂ ^{+ aI} D2

where a is a constant, in particular temperature-independent factor. According to the circuit diagram of Figure IA is

030012/0761

^ϋ τ

¹ Dl ^{= S} l- ¹ DOl

U ₂ / n ü _T -Cu ₁ ZU ₁ )

^X D2 ~ ^S 2 I _n _ e (e - e

It is assumed that ü „- U 5> U "so that the transistor

i Jl i

T is saturated ο In practice it suffices that U_ = U> 3U _n , and in this case i-yird

negligible _t so that

U / η U - (U ₁ / U) U / η U _ (U / U)

e Cl ^ e - -) = S ₂ I _D02 β- ^Χ β (a ₊ l)

Since T ₁ and T are formed in the same diffusion trench ^ "

¹ DOl

so that from the above relationship the following becomes Expression for U gives

U ₁ = U _T In ₂ Z ₁ ,
especially for the case a = 0
U ₁ = U _T In (HS ₂ ZS ₁ ).

The between the sink electrode (terminal 1} and the source elec trode of T occurring voltage U "is therefore proportional to the absolute temperature T and depends practically only on the form factors of the transistors used »

It has been shown that in general there is also a small difference AV between the threshold voltages of the two transistors T, and T "occurs, with typical values for these

030012/0781

Difference between 0 and 20 mV. It follows from that for the voltage U- ^ an error of the same order of magnitude, namely ΔV / n, although this error is practically independent the temperature is "

An arrangement with two completely identical transistors T-, T « can be made by using a single transistor which alternately takes on the role of T .. and T " plays. Since the two transistors have two common electrodes in the circuit of FIG. 1A, the implementation is possible switching is particularly easy.

FIG. IB shows the basic diagram of a dynamic embodiment of the basic circuit from FIG. IA. The line route of a Transistor T, which is operated in the weak inversion range, is connected on the one hand to a changeover switch SW, which the corresponding electrode of the conduction path of the transistor alternating with one and the other terminal of a supply voltage source U “connects. The switching positions p ,, p ~ correspond to the negative (-) and positive (+) terminal of the supply voltage source. The gate electrode of the transistor is connected to the positive terminal (+) and the other electrode of the line path from T is via a capacitance C, connected to the negative (-) terminal. In the position p, of the switch, the transistor T plays the role of T, the Figure IA, and in position p "the role of T". Is the capacity C, large enough to maintain a practically constant voltage U. one can show that

U ₁ = U _T In (1 + ^ t ₁ )

where t ₁ and t ₂ each represent the time periods in which the changeover switch _{assumes the positions P 1} and p_. The ratio t ₂ / t ₁ thus replaces the ratio of the shape factors in the case of two transistors. If the circuit of Figure IB from a

030012/0761

- I!

Power source supplied, so must the capasity C ₅ stoic terminals (+) and C) large be sufficient nm the constancy of the voltage U, in this dynamic Krsis su gswahrleisten "

The basic circuit of Eigur IA allows in practice at eia © r usual dimensioning clsr transistors ^ voltages U «i-a der Order of magnitude "/ on a hundred millivolts au" to reach higher PTAT-Besugsspanriungeri su srzMsri, let yourself be more of such Basic circuit a. simply arrange © Ils eat in Easkad © »

Figure 2 shows such a reference voltage source, made up of many ρ basic circuits or elementary circuits a »Each elementary circuit has two η-channel transistors, which correspond to the transistors T ₁ and T ₉ of Figure 1A, and each basic circuit is fed by a corresponding current source. The k-th Kiementarkreis, - k = X ₁ 2, 3, ».., p, accordingly has tracers T ₁ , and T-, which are each formed in the same diffusion _{trench and analogous to the transistors T 1} and T with one another »From Figure IA are connected = - The corresponding current source is formed by a ρ .. channel transistor T_, whose line path is in series with those of the transistors T, ^. and T ", lies, v"? ob with the source electrodes of all

Transistors T-. with the positive Kleiame (· :-) an ice cream.

Voltage source are connected = the gate electrodes of all transistors T 1 are connected to one another and to the gate electrode of a transistor T ₇₀ , the drain electrode of which is also connected to the entirety of said gate electrodes. The line section from T ₇₀ is connected in series with a current-determining element R- between the terminals of the supply voltage _{source. The element R n} determines the sink current I_ of the transistor T and can, for example, be a resistor or a constant current source. The individual currents supplied by the transistors T- ^ are denoted by I.

The elementary circuits of the reference voltage source are one below the other

030012 / 07S1

connected in such a way that the source electrode of the transistor T ,, of the first elementary circuit (k = l) with the negative terminal (-) of the supply voltage source and the source _{electrode of the transistor T n} , of the k-th elementary circuit with the sink electrode of the transistor T ₁ ,, ,. of the (kl) -th elementary circle are connected. The transistor T is therefore traversed by the sum of the currents I, to I, while T ", only by I, is traversed. The following relationship is obtained

^ü lk ^{= ü} T ^ln [ ^{1 + S} 2k

where S ₁₁ and S ₀₁ are the shape factors of the transistors T ₁ ,

XK ZK XK

and T, represent.

As Figure 2 shows, the transistor T- is connected so that it together with T__ forms a current mirror circuit. Are in particular the currents I to I are all equal to each other, then results for the entire reference voltage

U ₁ = ^ _ ü _lk = U _T ^ _ In | _1 + (pk) S _2k / S _lk k = lk = l

If all elementary circles are designed in the same way, where S ₀ , = S and S, = S ₁ , and if S "» S ₁ , then the voltage U is approximately

^S 2

U, = U

[p In g- + In (p i)]

The circuit arrangement of FIG. 2 thus allows a high reference voltage to be achieved, which is exactly proportional to U_, that is to say is proportional to the absolute temperature T. The power consumption of this arrangement can be adjusted using R-, which is an additional advantage. In a modified arrangement, the transistor pairs T ₁₁ , T ₃₁ to T _{1, T 2}

030012/0781

are formed in a common diffusion trench. the however, the minimum supply voltage must then be set higher because of a modulation effect through the substrate.

Another circuit arrangement for achieving higher reference voltages with the aid of the basic circuit is shown in FIG. Two η-channel transistors T, ₃ and T _34, which each correspond to the transistors T ₁ and T 1 of FIG. 1A, are connected to one another in the same way as T 1 and T 1. This elementary circuit is fed by a p-channel transistor T, _, the conduction path of this transistor being connected in series with those of the transistors T ₁₃ and T between the terminals (+, -) of a supply voltage source.

The drain electrode of the transistor T .. ₃ is connected to the gate electrode of another η-channel transistor T ₃₅ , the line path of which is connected in series with that of a fifth transistor T, of the ρ-channel type between the terminals (+, -) . The gate electrodes of the transistors T ₁ -, and T _co are

bx dz

other, as well as with the drain electrode of Tj--, connected, whereby the two transistors T_, and T _{ß2 form} a current mirror circuit.

The transistors are dimensioned so that they work in the weak inversion range and the supply voltage is sufficient chosen large to the transistors T ". and T__ to saturation bring to.

The sink currents of the transistors T _? - and T are each with I "

and I_ denotes. One also denotes with S _c and S ,. the 3 ob

respective shape factors of the transistors T ₅ , and Tg ₂ , it results as a result of the current mirror circuit

I ₂ = I ₃ S ₆ / S ₅

030012/0761

The circuit diagram also shows that the sink current I ₁ of T _{13 is} equal to I_. The characteristic currents I- of these transistors, which are formed in the same integrated circuit, are known to be equal to one another, so that one can use the designations S, S- and S ₃ for the respective form factors of the transistors T, _, T ₃₄ and T ₃₁ . and taking the saturation of T ₃₅ into account, is given the following relationship

Vn ^U T - (V ^Ü T)
¹ I ^{= S} l ¹ DO ^{e (1} " ^{e = T} 2 = ¹ SV ^S 5 *

V ^{n u} t

- ^S 3 ¹ DO ^{e S} 6 ^{/ S} 5

U ₁ and U are each analogous to FIG. 1A, the voltages between the drain electrodes of T, ₃ and T ₃₄ and the negative terminal (-).

In the elementary circle T ₁₃ , T-. one obtains as in Figure IA U ₁ = U _T In (1 + S ₂ ZS ₁ )

V ⁰ T

e ^{± L} = 1 +

with which the relationship I = 1 results in the following equation ^ü 2 ^{/ n Ü} T l / n

S ₁ e S ₂ Z (S ₁₊ S ₂ ) - S ₃ (I ₊ S ₂ ZS ₁ ) ^{/ n} S ₆ Zs ₅

from what

U ₂ = η U _T In [(S ₃ ZS ₁ ) (S ₆ ZS ₅ ) (I ₊ S ₁ ZS ₂ )

In this arrangement, a reference voltage U _{2 is} thus achieved which is proportional to U and otherwise only depends on the shape factors of the transistors and their slope factor η. It should be noted that the currents I ₁ = I ₂ and I ₃

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are independent of the supply voltage. This follows from the foregoing, from which the relationship emerges

¹ I ^{= 1} DO ^S 3 «W ^{(1 +} V ^S l ⁾

results. The upper limit of the current 1 “, which is characteristic for a given technology, allows the transistors of the Dimension the circuit in such a way that its operation in the area of weak inversion is guaranteed.

By adding additional transistors, starting from the arrangement of FIG. 3A, practically any number of transistors can be used achieve high reference voltages, these of course are always lower than the supply voltage.

Figures 4A and 4B show two different embodiments that are derived from the arrangement of Figure 3 and in their Behavior are equivalent. The five basic transistors, which correspond to those of Figure 3, are in Figures 4A and 4B in an analogous manner.

To arrive at the arrangement of Figure 4A, (Q-5) were n-channel Transistors and (Q-5) p-channel transistors are added to the mentioned five basic transistors, making a corresponding one Number of additional branches, each of which is formed by a p-channel transistor T,., I = 6, 7, ..., Q and a corresponding

Dl

speaking η-channel transistor T .., j = (Q + l), (Q + 2), ..., (2Q-5) is formed. The conduction paths of these transistors are in ·. connected in series to each branch. The transistors T-. are with

Dl

their source electrodes are connected to the positive terminal (+) of the supply voltage source and their gate electrodes are connected to one another and to those of the transistors T _c1 and T, .-. The transistors T .. are formed in separate diffusion trenches and their gate electrode is in each case connected to their drain electrodes, while their substrate is connected to the source electrode.

630012/0781

The source electrode of the transistor T .. .. is connected to the drain electrode of the transistor T ₂₄ and the source _{electrode of each transistor T 4} . is connected to the drain electrode of the preceding transistor T ...,. tied together. The sink-source voltages of the individual transistors T .., which are connected in cascade, thus add up, and the output voltage U _{2 of} the basic circuit is also added to these. If the transistors T .. are produced with mutually identical form factors, the size of which is S., and the transistors T _g . also produced with mutually identical form factors / which are also equal to that of the transistor T _g2 and the size

S, you get
ο

U ₂ = η Ü _T in [(S ₃ ZS ₁ ) (Q-4) (SgZS ₅ ).

. (1 + S ₁ Zs ₂ ) (1 + S ₂ Zs ₁ ) ¹⁷¹¹ J

U ₂₁ = U ₂ + nü _T In [(S ₃ ZS ₄ ) (Q-5) (SgZS ₅ ) (1 + S ₃ ZS ₁ ) ^{1 / n}

A total reference voltage U ₃ .-, -., _{Which is always proportional to η U T} , therefore occurs between the drain of the last transistor ^T 4 (2O-5 and the source of T ₁₃ ).

In the circuit arrangement according to FIG. 4B, (Q-5) n-channel transistors T are. (j = 6, 7, ..., Q) connected in series between the elementary _{circuit T 13} , T ₂₄ and the transistor T _ß3 , which supplies the entire sink current for all these transistors. The gate electrodes of the transistors T ₄ . are connected to the drain electrodes of these transistors as in Figure 4A. The transistors T ₄ . are made in separate diffusion trenches and work as in the earlier examples in the area of weak inversion.

The voltage U ₃ supplied by the elementary _{circuit T 13} , T ₃₄ has the same expression as "in FIG.

030012/0761

electrode and the source electrode of each transistor T. ., the form factor of which is denoted by S., an additional voltage is obtained

Δ U = η U _T In [(S ₃ / S ₄ ) (S ₅ ZS ₅ ) (l + S ^ S ^ ^{1 / n} ], which adds to U.

The entire reference voltage _/ which thus occurs between the drain electrode of the transistor T and the source electrode of the transistor T- is therefore

^ü 2 (Q-5) = ^U 2 ^{+ (Q} ~ ^{5) Δϋ} *
This voltage is therefore proportional to nU again.

In practice, voltages of about 800 millivolts with only two additional transistors T .., their Form factors are not larger than 10, according to the circuits of Figures 4A and 4B.

The PTAT reference voltage sources described above can be used in can be used advantageously in an arrangement that supplies a temperature-compensated reference voltage (band-gap reference), i.e. a reference voltage which is independent of the Temperature is.

An example is shown schematically in Figure 5A. It has a PTAT source, as well as an operational amplifier A, a bipolar transistor T _e (for example of the npn type, η - p diffusion trench - n substrate), a current source J, a regulating transistor T (for example a p Channel MOS transistor), and a voltage divider R, R.

The current source J supplies the bipolar transistor T _{3 with} a constant current!

030012/0781

Base-emitter voltage V _, _ from T_ a decreasing linear

ash b

Function of the absolute temperature. This relationship is graphically illustrated in Figure 5B. The value V_. is the width of the forbidden band of silicon with extrapolation to 0 K.

The one occurring at the voltage divider R ,, IU (output terminal R) Voltage is designated with U and represents the reference voltage

XV

The voltage across the resistor R_ is used as a result of the the verse

ribbon

the amplifier A and the transistor T _n containing control

^b - ^ü R ^{= ü + V} BE

with b =

If the PTAT reference voltage source is dimensioned so that for a given temperature

^ü = ^V G0 - ^V BE
in this way a temperature-compensated reference voltage is obtained

^Ü R ^{= V} G0 ^{/ b}

The value of this reference voltage can be set by a suitable choice of the ratio b, with which, if necessary, an _{error in the voltage U caused by an asymmetry of the transistors T 1} , T "can also be corrected. For

R ₁ = O and man ^R 2 = OO receives ^Ü R ίθ "

Figure 5C shows the detailed circuit diagram of a temperature compensated Reference voltage source according to the principle

030012/0781

circuit of Figure 5A.

In the PTAT reference voltage source used in this example, which corresponds to that of FIG. 2, the transistors are designated in a manner analogous to that in FIG. The operational amplifier A has η-channel MOS transistors T, g, T ₁₇ , ^t iq ' ^T 3i ^f T_ ₃ , and p-channel MOS transistors T ₂ -, ^T 27 " ^T 32" ^T 34 in ^{accordance with} the scheme of Figure 5C.

The voltage U, which is proportional to the temperature, is applied to the gate electrode of the transistor T ^ ₆ (terminal -) and the emitter of the bipolar transistor T is connected to the gate electrode of the transistor T ..- (terminal +). The drain electrode of the transistor T ₃₂ (output terminal S) is connected to the gate electrode of the regulating transistor T, its line path

in series with the voltage divider R ₁ , R _? between the terminals of the supply voltage source.

The branch point of this voltage divider is connected to the base of the transistor T, while the collector

Emitte: & path of this transistor in series with the line path of an η-channel MOS transistor T_ _Q between the terminal «of the supply voltage source is connected.

The constant current source J shown as an example in figure 5C has an η-channel transistor _Q T_, in the region of strong

2.0

Inversion is operated. The stabilized voltage V _o _, becomes

D egg

fed to the gate of this transistor, which thus supplies a constant current I. This current feeds a multiple mirror circuit which is formed by the p-channel transistors T ₃₉ , T_ T, T ₇₂ ' ^T 73' ^T 74 ' ^T 75 and which serves to polarize the PTAT source.

The transistor T_ _Q supplies a current I _Q , which feeds a further multiple mirror circuit formed by the η-channel transistors T ₃₀ , T _2Q and T ₁ , via which the bipolar

030012 / 07S1

Transistor T and the operational amplifier "A polarized 5

will.

The PTAT reference voltage source used in this example is formed by five elementary circuits connected in cascade, each with a ratio S_ / S, = 81. To the To reduce the effect of leakage currents and to improve the behavior of the arrangement at higher temperatures, it may be possible, Depending on the technology used, the number of elementary circles can be increased, for example to 8, and the ratio the form factors are reduced.

FIG. 5D shows another possible use of the invention PTAT reference voltage source. This use results from the statements made in connection with FIG. 5A Considerations and accordingly the analogous elements in Figures 5A and 5D have been labeled in the same way.

It can be seen from the circuit diagram of FIG. 5D that the transistor T _{n has been} omitted in comparison with FIG. 5A

κ. -

and R _{1 is} directly connected to the positive terminal (+) of the supply voltage source. Thus U ₁₃ = V if one uses V den

Xv CO OC

Value of the supply voltage. If V by the value

CC

V _ / b goes, the state at the output S of the operational amplifier changes A and the arrangement thus represents a voltage detector which is responsive to the magnitude of the supply voltage.

The reference voltage sources described here are based on a very simple elementary circuit that is completely based on conventional MOS technology is agreed. It should be noted that although the present description is based on the use of η-channel transistors is based, a similar arrangement can also be constructed with p-channel transistors.

030012/0761

The surface area of the integrated circuit occupied by the arrangements described is extremely small and the practical implementation of the circuits enables very good reproducibility to be achieved if the following remarks are taken into account.

To increase the effect of the output conductance of the MOS transistors reduce, the channel length should be chosen to be large »In one Silicon gate CMOS technology are typical values for this Channel length L

L> 12 ^ tm for η-channel transistors and L> 20 μ-m for p-channel transistors.

In order to master the form factors S and S ₀ well, the same length _{is preferably chosen for T 1 and T 0.}

In order to obtain a large difference and an exact ratio between S ₁ and S, T _{0 is divided} into a plurality of elementary transistors, the dimensions of which are identical to those of T 1, and these elementary transistors are connected in parallel with one another.

FIG. 6 shows, on the basis of a schematic view of the masks used, a preferred embodiment of the circuit according to FIG. 1A. The transistor T ₀ is subdivided into elementary _{transistors T 2} ¹ ', T ₁ , T ″, and T _w , which are arranged symmetrically with respect to T, in order to prevent possible gradients in the thickness of the gate oxide layer on the silicon wafer to avoid. The lines labeled 61, 61 ', 61 ", 61'" and 61 ^IV represent the delimitation of the diffusion zones and the lines labeled 62 the outline of the gate electrode made of polycrystalline silicon. Contact windows such as 63 are indicated by solid lines in the interior of the Diffusion zones shown.

© 30012/0761

Furthermore, metallized zones 64, 65, 66, 67 are shown in dashed lines Lines indicated. The zone 64 has the connection 1 of FIG. 1A and the zones 66 and 67 each have the connections with the supply voltage terminals (+) and (-). Finally, the outline 68 denotes the anchoring point with the Diffusion trench or with the substrate.

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Claims (11)

PATENT ADVOCATE DIPL-PHYS. UM HAFT MAXl M ι :. IA i; "T Ti ASSE 15 MUNICH 22 TELEPHONE 0 89 J 29 48 18 CENTER ELECTRONIQUE HORLOGER SA, 2 rue A.-L. Breguet Neuchatel, Switzerland Claims Integrated reference voltage source in MOS transistor technology, with two MOS transistors operated in the weak inversion range of the same conductivity type in which the drain electrode of a first MOS transistor is connected to the source electrode of the second MOS transistor is connected and the drain electrode of this second transistor to a first terminal of a Supply voltage source is connected, while the source electrode of the first transistor to the second terminal of the Supply voltage source is connected, characterized in that the supply voltage has a size that leads to saturation of the second transistor leads that the gate electrodes of the two transistors with each other and with the drain electrode of the second transistor are connected and that the substrate or. Diffusion trench connections are interconnected, wherein the voltage occurring between the drain and the source of the first transistor represents the reference voltage. 2. Integrated reference voltage source according to claim 1, characterized in that a current source is connected to the drain electrode of the first transistor and one Supplies current whose ratio to the sink current of the second transistor is constant and in particular independent of temperature is. 3. Integrated reference voltage source in MOS transistor technology, with a MOS transistor operated in the weak inversion range, characterized in that it comprises a changeover switch arranged to have a first terminal the line path of said transistor alternately with a first and with the second terminal of a supply voltage source connects that the supply voltage has a size that leads to saturation of the transistor, and that the gate electrode of the transistor to the first and the second connection of the conduction path of the transistor are connected to the second terminal of the supply voltage source via a capacitance, with the capacitance connected to said capacitance occurring voltage represents the reference voltage. 4. Integrated reference voltage source in MOS transistor technology, with at least two operated in the weak inversion range MOS transistors of the same conductivity type and with at least two current sources, which each supply currents, their ratio is constant and, in particular, is independent of temperature, characterized in that the drain electrode of a first MOS transistor is connected to the source electrode of a second MOS transistor, the drain electrode of this second The transistor is connected via a first current source to a first terminal of a supply voltage source and the The source electrode of the first transistor is connected to the second terminal of the supply voltage source, the gate electrodes of the first and the second transistor are connected to one another and to the drain electrode of the second transistor Ö30Ö12 / 0761 2335346 and the substrate or diffusion trench connections of these transistors are connected to one another and to the source of the first transistor, and that the drain electrode of a third MOS transistor is connected to the source electrode of a fourth MOS transistor, the drain electrode of this fourth transistor via a The current source is connected to the first terminal of the supply voltage source and the source electrode of the third transistor is connected to the drain electrode of the first transistor , the gate electrodes of the third and fourth transistors being connected to one another and to the drain electrode of the fourth transistor, and the substrate or Diffusion trench connections of the third and fourth transistors are connected to one another and to the source electrode of the third transistor, and that the supply voltage, the current sources and the transistors are dimensioned such that the transistors operate in the weak inversion range and that the second and the fourth transistor are saturated, the voltage appearing between the drain electrode of the third transistor and the source electrode of the first transistor being the reference voltage. 5. Integrated reference voltage source according to claim 4, characterized in that it ρ transistor pairs from has the same conductivity type and ρ corresponding current sources, where ρ is greater than two, that a first transistor pair consists of said first and said second transistor, and that the remaining transistor pairs in analog Manner as the pair consisting of said third and said fourth transistor are formed, wherein two successive pairs are connected so that the source electrode each corresponds to said third transistor Transistor with the drain electrode of said third transistor of the preceding transistor pair corresponding transistor is connected, and that sizing of the transistors and their supply analogous to that of the first, second, third and fourth transistor 030612/0781 tors, being between the drain electrode of the transistor corresponding to said third transistor of the last pair and the source electrode of the first transistor represents the reference voltage. 6. Integrated reference voltage source according to claim 1,2 4 or 5, characterized in that the first and the second transistor or the transistors of each of the said Pairs are formed in the same diffusion trench. 7. Integrated reference voltage source in MOS transistor technology, with at least a first and a second MOS transistor of a first conductivity type, which is a current mirror circuit form, the source electrodes of these transistors being connected to a first terminal of a supply voltage source their gate electrodes with each other and with the drain electrode, of the first transistor, and at least a third and a fourth MOS transistor a second type of conduction, which are operated in the area of weak inversion, characterized in that the drain electrode of the third transistor with the source electrode of the fourth transistor and the source electrode of the third The transistor is connected to the second terminal of the supply voltage source, and that the drain electrode of the fourth transistor is powered by the second transistor of the mirror circuit, the gate electrodes of the third and the fourth transistor are connected to one another and to the drain electrode of the fourth transistor, and the Substrate or diffusion trench connections of these transistors are connected to each other and to the source electrode of the third transistor, and that they also have a fifth transistor of the same conductivity type as the third and fourth tra: sistor, the drain electrode of this fifth Transistor to that of the first transistor of the mirror S3ÖÖ12 / G7S1 circuit is connected while the source electrode of the fifth transistor to the second terminal of the supply voltage source and the gate electrode of this transistor is connected to the drain electrode of the third transistor, and the supply voltage has a size that for Saturation of the fourth and the fifth transistor leads, the between the drain electrode of the fourth transistor and the voltage occurring at the source electrode of the third transistor represents the reference voltage « 8. Integrated reference voltage source according to claim 7 characterized in that it has a sixth and further transistors up to a Q-th, those of the first Are conduction type and connected with their source and gate electrodes in an analogous manner to the said second transistor and that they further include a (Q + 1) -th and further transistors up to a (2Q-5) -th of the second Has conductivity type, which are operated in the weak inversion range, each of these transistors with its Source electrode to the drain electrode of the preceding transistor and with its drain electrode and its gate electrode to the drain electrode of a corresponding transistor of the first type of conduction is connected, furthermore the source electrode of the (Q-M) -th transistor with the gate electrode of the fourth transistor is connected and the substrate or diffusion trench terminals of each of these transistors are each connected to the source electrode of the same transistor ^, so that the between the drain electrode of the (2Q-5) th transistor and the source electrode of the third transistor represents the reference voltage. 9 "Integrated reference voltage source according to claim 7, characterized in that it comprises a sixth. and further transistors up to a Q-th, those of the second 630012/0701 Are conduction type and work in the area of weak inversion, the conduction paths of these transistors in series between the drain electrode of the fourth transistor and the source electrode of the second transistor of the mirror circuit are connected, and wherein the gate electrodes of each of these TJansistors each with the drain electrode of the same The transistor and the substrate or diffusion trench connections of these transistors in each case with the source electrode of the same transistor are connected so that the between the drain electrode of the Q-th transistor and the Source electrode of the third transistor occurring voltage forms the reference voltage. 10. Integrated reference voltage source according to claim 7, 8 or 9, characterized in that the third, the fourth and the fifth transistor are formed in a same diffusion trench. 11. Temperature-compensated reference voltage source with a reference voltage source according to any one of claims 1 to 7, characterized in that, in addition to said reference voltage source an operational amplifier, a regulating MOS transistor, a bipolar transistor, and means for keeping the emitter current of said bipolar transistor constant having a first input of the operational amplifier connected to the output of said reference voltage source a second input of the operational amplifier is connected to the emitter of the bipolar transistor, the collector-emitter path this bipolar transistor in series with part of the means for keeping the emitter current constant the output of the operational amplifier is connected between the terminals of the supply voltage source connected to the gate electrode of the regulating transistor, 030012/0761 and the conduction path of the regulating transistor is connected to the collector-base circuit of the bipolar transistor, so that the voltage between the base of the bipolar transistor and that terminal of the supply voltage source _f is opposite to that connected to the collector of the bipolar transistor, said temperature-compensated reference voltage represents » 12, temperature-compensated reference voltage source according to claim 11, characterized in that a voltage divider in Sens is connected to the line path of the regulating transistor between the terminals of the supply voltage source, the Base of the bipolar transistor is connected to an intermediate point of said voltage divider. 13 »Voltage detector responsive to the size of the supply voltage with a reference voltage source according to one of the Claims 1 to 10, characterized in that, in addition to said reference voltage source, it has an operation = amplifier, a voltage divider, a bipolar transistor, and means for keeping the smitter current constant having bipolar transistor, wherein sin first input of the operational amplifier with the output of the Besugsspazmungsquelle is connected, a second input of this operational amplifier is connected to the emitter of the bipolar transistor and the collector signal of this bipolar! Transistor in series with the means for keeping the Emitter current between the terminals of the supply voltage source is connected and the base of the bipolar transistor with is connected to an intermediate point of the voltage divider, and this voltage divider between the terminals of the food = Voltage source is connected, the output of the operational amplifier represents the output of the voltage detector » IΘ Q 1 2 / θ 7 S ^ι ϊ