DE2921793A1 - Semiconductor device esp. MISFET prodn. - using silicon nitride film obtd. by direct nitriding to prevent ion implanted impurity migration during heat treatment - Google Patents

Abstract

Semiconductor device, esp. MISFET prodn. involves implantation of an impurity in a semiconducting Si substrate and heating. The novel feature is that a Si3N4 film, esp a gate insulating film of the MISFET, is produced on the substrate by direct thermal nitriding, so that the total amt of ion implanted impurity is retained at the surface of the substrate after heating. Specifically, the Si3N4 film prevents redistribution of the implanted impurity from the substrate into the Si3N4 film when the substrate is heated to activate the impurity and correct damage to the substrate caused by ion implantation.

Description

Method of making a semiconductor device

with ion implantation The invention relates to a method of manufacturing an ion implantation semiconductor device, and in particular a method which can be used to manufacture a MIS-FET, whereby during manufacture an impurity concentration in the channel of the MIS-FEU is controlled by ion implantation will.

Ion implantation is known for surface doping a semiconductor and includes introduction of atoms into the face layer of a solid semiconductor substrate by bombarding the semiconductor substrate with ions with an energy in the range of keV to MeV. This ion implantation process is the previous diffusion process has been partially replaced as the ion implantation process takes advantage of one of has externally controlled non-equilibrium process while the diffusion process is determined by unchangeable physical conditions, such as the diffusion constant of the foreign matter in the semiconductor material.

In the ion implantation technique, it is known that the implanted Atoms become electrically active only after the ion-implanted semiconductor material heated at a temperature of about 100,000 for a period of about 30 minutes is. Ion implantation will also damage the atomic arrangement of the Caused semiconductor material, but this can be caused by the above-mentioned heating be remedied.

Because the ion implantation under high energy and in the non-equilibrium state is carried out, the concentration of the implanted ions is on the inside of the semiconductor maximum what is called the protruding area (Rp) or mean penetration density referred to as. Of the protruding area (Rp) and thus the concentration of foreign matter can be changed precisely by the energy of the ion beam. Accordingly, the Ion implantation suitable to control the concentration of the foreign matter that one Have conductivity type and those in the active areas of bipolar transistors, NIS-FET and the like are included.

It is known in semiconductor technology that ions, preferably boron ions, by an insulating, thermally oxidized film on a semiconductor substrate at such an ion energy that the ions are implanted under the oxide film be implanted. An essential purpose of applying the ion implantation mentioned above is denoted by #channel doping ", where the threshold voltage of the channel the MIS-BET is adjusted by the concentration of the implanted ions in the channel will. However, the known ion implantation method is because of that as an insulating film used oxide film disadvantageous because the implanted boron ions on the The semiconductor substrate is drawn into the oxide film after the above-mentioned heating, which has the consequence that the concentration of impurities on the surface of the semiconductor substrate is reduced to a level much lower than the desired level is. This is due to the fact that the distribution constant of boron ions in the oxide film is high, and hence a large amount of boron ions in the oxide film is redistributed. Accordingly, it is not by the known channel doping method possible to obtain a desired value of the threshold voltage.

The invention is based on the knowledge that with very thin nitride films, which grow by direct thermal reaction with nitrogen, the one mentioned above This effectively eliminates the disadvantage of the redistribution of the implanted ions can that the silicon nitride film through direct thermal nitriding of semiconductor silicon is formed.

The object of the invention is therefore to provide a method with To create ion implantation in which the redistribution of the implanted ions from the semiconductor substrate to the insulating film during the heat treatment after Ion implantation is essentially prevented.

The invention is also intended to provide a method with ion implantation, which prevents a reduction in the surface concentration of the implanted ions can be.

The invention should also make it possible to determine the area concentration of the implanted foreign matter and precisely set the threshold voltage of the MIS-FE and the implanted foreign matter uniformly over the surface of the semiconductor substrate to distribute.

The invention is also intended to provide a method of manufacturing a Create E / D-MIS-IC by means of ion implantation in which a driver element of the IC contains an enrichment MIS-FE and in which a load element of the IC contains a depletion MIS-FEX contains. In this IC FET with different threshold voltages are in a circuit element and therefore the precise setting of the area concentration the foreign matter is indispensable.

Finally, the invention aims to use a silicon nitride film as an insulating film The MIS-FET can be used to redistribute the implanted foreign matter during heat treatment after ion implantation.

The method according to the invention can contain the following steps: - Forming a silicon nitride film by direct thermal nitriding of the silicon a semiconductor silicon substrate, - implantation of fuel ions into the semiconductor silicon substrate, Heating the semiconductor substrate to a temperature for electrical activation the foreign matter ions and to correct the damage caused by the ion implantation caused semiconductor substrate, while the total amount of implanted foreign matter substantially maintained on the surface of the semiconductor silicon substrate - depositing a film of conductive material on the silicon nitride film, - selectively removing the film of conductive material and the silicon nitride film and Forming windows through these films, the windows being parts of the ion-implanted Exposing the surface of the semiconductor silicon substrate, and - diffusing of particulates into the semiconductor silicon substrate while the total amount of ion-implanted Foreign matter on the semiconductor substrate surface under the remaining silicon nitride film is essentially retained.

A silicon nitride film is formed mainly by vapor deposition (CVD) using a silicon-containing gaseous material such as SiH4 in Comes into contact with ammonia. The silicon nitride film formed by the CVD method is used as the insulating film of the MIS-FED and as the surface protection film of the 10. Of the The invention is based on the finding that a thermal nitriding of the Silicon substrate formed film, namely a silicon nitride film in which the silicon of the substrate is nitrided directly, a redistribution of the implanted ions of the semiconductor surface in the nitride film effectively prevented. The silicon nitride film is used here as denotes direct thermal nitride film of silicon.

The surface concentration of the implanted foreign matter in terms of average concentration in the implanted area of the silicon substrate takes during the above-mentioned heating step in an amount less than 50%, preferably 20%, based on the amount of ions implanted.

The method of forming a direct thermal nitride film from Contains silicon, which can prevent the redistribution of the implanted ions the step of heating a silicon semiconductor substrate in a nitrogen containing atmosphere to a temperature between 900 and 130,000, for example between 1000 and 120000. The atmosphere containing nitrogen can be nitrogen or a nitrogen compound such as ammonia or hydrazine (N2H4). the The nitrogen compound is preferably ammonia.

A preferred silicon direct thermal nitride film for prevention redistribution of foreign matter can be achieved using a nitriding atmosphere, in which oxidizing foreign substances, such as oxygen, water, carbon dioxide, etc., on one Levels less than 1 ppm are reduced, and by adjusting the nitration temperature in the range from 1200 to 130,000.

The nitriding atmosphere can contain an inert gas such as argon in addition to contain nitrogen and / or a nitrogen-containing gas.

Preferably, the silicon substrate becomes complete before nitriding cleaned by degreasing the silicon substrate in an organic solvent is boiled in an acidic solution, preferably sulfuric and nitric acid and is etched in hydrofluoric acid.

Before forming the silicon direct thermal nitride film it is preferable to place the silicon substrate in an inert gas atmosphere at one temperature to be heated between 900 and 13000c.

An average relative dielectric constant of the direct thermal nitride film of silicon is generally 50 larger than that of one thermal oxidation film made of silicon. Electrical properties other than that relative dielectric properties of the direct thermal nitride film Silicon are the same as or better than those of a silicon nitride film, which is formed by the CVD process, see Table 1. The direct thermal Therefore, silicon nitride film can be used as the gate insulating film of the MIS-FET.

Table 1 CVD direct nitriding maximum electrical 0.1-5 MV / cm 10.55 MV / cm field fixed charge 5x10 11 -1011 -10 13 / cm less than per unit 5x10 - 10 / cm 5x1o11 charge / Ld2 area (Qss) dielectric constant 5.0 - 6.0 6.0 (;) The direct thermal nitride film made of silicon results in significant masking effects against, for example, acids, organic solvents and oxidation. The interface between the silicon direct thermal nitride film and the silicon substrate cannot be contaminated by any caustic or cleaning solution used after the Ion implantation is used, for example to clean various films, formed during the manufacture of the MIS-FET. Through a Silicon nitride film, formed by the CVD method, on the other hand, may have such an impurity cannot be effectively prevented.

The silicon direct thermal nitride film is as dense as that densest CVD film. Because of the high density and the masking effects, the direct thermal nitride film made of silicon advantageously a penetration of sodium ions etc. from a silicon dioxide film into the interface between the silicon nitride film and the silicon substrate.

The invention has been made to discover the above-mentioned excellent ones Properties of the silicon direct thermal nitride film are based on which Properties however cannot explain why the redistribution of the implanted Foreign matter is prevented from entering the silicon nitride film from the silicon substrate. As described above, existing on the surface of the semiconductor substrate Foreign matter in significant amount in the silicon dioxide film after the heat treatment redistributed. Such an effort to redistribute after heat treatment at 12000c in a dry oxygen atmosphere is given by the following formula expressed: Ns / Nb f <0.04, where Ns and Nb are the concentration of foreign matter, i.e.

Boron, both on and on the surface of the silicon substrate are non-inclusive part. Accordingly, if the silicon substrate is provided with a silicon dioxide film is provided and has an Nb value of 1x1016 / cm3, the concentration of boron on the surface of the silicon substrate (Ns) to 4x1014 / cm3 according to the above Reduced heat treatment. On the other hand, when the direct thermal nitride film is formed from silicon on the silicon substrate according to the invention, that is Ratio Ns / Nb advantageously higher than about 0.7. Accordingly is the redistribution of foreign matter compared with that between one Silicon substrate and a silicon dioxide film occurs, negligibly small.

The redistribution of the foreign matter e is also negligible if the silicon substrate with the silicon direct thermal nitride film in one Hydrogen atmosphere is heated, while this redistribution is essential, when a silicon substrate is heated with silicon dioxide in a hydrogen atmosphere.

The silicon direct thermal nitride film used for the gate of the MIS-FET is used and the ions are implanted according to the channel doping method passes through, preferably has a thickness in the range of 20 to 100 i. To be implanted Ions have an energy range of 20 to 400 keV depending on the threshold voltage of the channel of the MIS-FET. This energy is advantageously low due to the small thickness of the silicon nitride film. As a result of the ion implantation with the above-mentioned ion energy through the direct thermal nitride film the thickness mentioned above becomes that set by the amount of the implanted ions Threshold voltage is not due to the redistribution of ions during the above mentioned heating is reduced. When the thickness of the above-mentioned silicon nitride film is not sufficient as the thickness of the gate insulating film, it is necessary on the direct thermal nitride film made of silicon an additional insulating film Form silicon dioxide or silicon nitride by the CVD process. When the thick of silicon nitride is between 20 and 100 i, a conductive material, containing, for example, doped polycrystalline silicon, directly on the direct thermal nitride film can be formed from silicon and used as the gate electrode of the FLIS-FET be used. The silicon nitride can be used as an excellent mask against diffusion from Foreign substances contained in the gate electrode act in the semiconductor substrate.

Favorable conditions for setting the threshold voltage (Vth) are as follows.

A. Threshold Voltage Control of Enrichment FlIS-FET (1) Resistivity of P-type silicon substrate: 0.1 to 30 ohm.cm.

(2) 'Thickness of silicon direct thermal nitride film: 20 up to 100 i.

(3) Boron ion energy: 20 to 400 keV.

(4) Implanted amount of foreign matter with P conductivity: i015 up to 1018 / cm3.

(5) Threshold voltage Vth: 0 to 1 V.

B. Threshold Voltage Control of Depletion FIS-FET (1) More specific Resistance of P-type silicon substrate: 0.1 to 30 ohm cm.

(2) Thickness of silicon direct thermal nitride film: 20 to 100 i.

(3) Arsenic ion energy: 30 to 400 keV.

(4) Implanted amount of foreign matter with N conductivity: 1015 up to 2x1018 / cm3.

(5) Threshold voltage Vth: -3 to 0 V.

The post ion implantation heating can be carried out simultaneously with a subsequent thermal diffusion for doping foreign matter 'for example out into the gate electrode or the source region and drain region of the MIS-FET will.

In manufacturing the above-mentioned E / D-MIS-IC, the E (enhancement) MIS-FET and the D (depletion) FLIS-FET by ion implantation of each conventionally Boron and phosphorus ions are produced in such a way that one of the MIS-FETs through a bottle film selectively is exposed. The foreign matter ions can be achieved solely through the direct thermal nitride film made of silicon, as mentioned above, and also by the nitride film made of silicon and one on the nitride film made of silicon deposited conductive film are implanted.

The conductive film is made of aluminum, polycrystalline silicon or other metals, preferably polycrystalline silicon, and is used as the gate electrode the MIS-FET is used. The ion implantation through the nitride film and the conductive Film is more beneficial than ion implantation just through the nitride film underneath Taking into account the fact that a small amount of abrasion of the thin direct thermal Nitride film made of silicon, which is used during cleaning of the silicon nitride film the final ion implantation could occur, prevented by the conductive film can be. The ion energy passing through the nitride film and the conductive film implanted foreign matter should be at a high level in the above-mentioned range, i.e. between 20 and 400 keV, depending on the type and thickness of the conductive Film for the gate electrode can be set.

The direct thermal nitride of silicon that carries the foreign matter ions can improve the semiconductor device manufacturing yield, because electric charges are deposited in the silicon nitride film by the ion implantation induced are reduced due to the direct thermal nitriding. As a result, the silicon nitride film becomes damaged or broken the reduction in electrical charges.

The foreign matter ions can enter the silicon substrate indirectly the silicon direct thermal nitride film or both through this nitride film and a conductive film as described above can be implanted. The foreign matter ions but can also be used directly in the silicon substrate can be implanted and the silicon direct thermal nitride film can subsequently be ion-implanted Substrate can be formed from silicon. During the subsequent heat treatment to activate the directly implanted foreign matter and to correct any damage the silicon substrate and the heat treatment after the indirect ion implantation in the silicon substrate, the direct thermal nitride film can redistribute to prevent foreign matter.

The inventive method is preferred for the production of MIS-IC are used because the foreign matter under the gate electrode of the MIS-IC is accurate can be controlled. Known methods of ion implantation through a silicon nitride film, for example manufacturing process for circuit elements in bipolar integrated Circuits or individual elements, such as transistors and diodes, can also go through the inventive method can be replaced.

The invention is described by way of example with reference to the drawing, 1 to 5 are cross-sections of a semiconductor silicon substrate with various Parts of a MIS-FET formed thereon; and FIG. 6 is a graphical representation of FIG Relationship between the dosage and the surface concentration Ns of boron.

Example 1 As shown in Fig. 1, a P-type semiconductor silicon substrate 1 is provided with a specific resistance of 20 ohm cm with an insulating film 2 made of silicon dioxide (Si02) provided with a thickness of a few thousand i. A window is through the Insulating film 2 is formed so that a part of the surface of the substrate 1 is exposed, on which a FIS-FET is formed. The exposed area of the silicon substrate by the window of the insulating film 2 is made by immersing the entire substrate in one Solution purified from HF.

The substrate 1 shown in Fig. 1 is at a temperature of about 12000c heated in a 100 show ammonia atmosphere. The exposed area of the Silicon substrate 1 is nitrided directly by the ammonia atmosphere. The insulating film 2 is used as a nitriding mask. A silicon nitride film 3 (Fig. 2) having a thickness of 100 i is applied to the surface portion of the exposed silicon substrate within the Window formed. Atmospheric nitrogen is thus released into the silicon substrate 1, while a nitride-forming reaction occurs during the impregnation.

Beams of boron ions (B +), denoted by "4" in Fig. 2, with an energy of about 40 keV into the silicon substrate the silicon nitride thin film 3 is ion-implanted. The thick insulating film 2 masks the underlying silicon against boron ion implantation, so that the ion implantation layer 5 is formed only under the silicon nitride thin film 2.

The semiconductor silicon under the thick insulating layer 2 is called the field area surrounding the flIS-FET element is used. The doping amount of the boron ions is 5x1011 / cm2 of the ion implantation layer 5.

The ion-implanted substrate 1 made of silicon becomes a common one Heat treatment at a temperature of about 10,000 C for a period of 30 Minutes exposed. The purpose of this heat treatment is to get the ion implanted Electrically activate foreign substances and the atomic arrangements of the ion-implanted To restore or correct the silicon substrate.

A silicon dioxide film (SiO 2) 6 (Fig. 3) is formed on the silicon nitride film 5 by a CVD process up to one Depressed thickness of 500 i. The total thickness of the films 3 and 6 ensures such a thickness that for the Gate insulating film is required to be formed on the channel region of the MIS-FET is. The polycrystalline silicon film 7 for the gate electrode of the FIS-FET is subsequently on the entire upper surface of the silicon substrate 1 by a deposition method precipitated with monosilane, see Fig. 3.

4, the polycrystalline silicon film 7 and the gate insulating films become 6 and 3 selectively removed by photoetching and a phosphosilicate glass film (PSG) 8 is deposited on the entire upper surface of the substrate 1. The substrate 1 is heated to a temperature of about 1000 ° C. An N-impurity from phosphorus, contained in the PSG film 8 is transferred into the silicon substrate during heating 1 diffuses to form N source and drain regions 9 and 10, respectively.

Windows are formed by the PSG film 8 and part of the source and drain regions 9 and 10 are exposed through each of the windows, respectively. Source and drain electrodes 11 and 12 are formed by vacuum deposition of aluminum and then aluminum is selectively removed to form an aluminum electrode pattern is generated, which contacts the exposed areas, see FIG. 5.

The threshold voltage obtained is 1 V.

Example 2 The procedure of Example 1 is repeated with the exception that the polycrystalline silicon film 1 is directly on the direct thermal nitride film 3 is deposited from silicon. The energy of the boron ions 4 is 25 keV. The same threshold voltage as in Example 1 is obtained.

Example 3 In this example, the ion implantation is carried out according to the Formation of the polycrystalline silicon film 7 (Fig. 3) with a thickness of 3000 2 executed. The procedure of this example is the same as in Example 1 with the following exceptions.

A. The polycrystalline silicon layer 7 is directly on the direct thermal nitride film 3 made of silicon with a thickness of 90 Å is deposited.

B. The energy of the boron ions is 170 keV.

C. The dosage of the boron ions is 5x1011 / cm2.

The results of fabricating the MIS-FET are essentially the same as in example 1.

Example 4 A piece of P (100) silicon substrate with a specific Resistance between 3 and 5 ohm-cm will be the direct formation of the silicon nitride exposed. The silicon substrate is immersed in a 0.6 # solution of hydrofluoric acid and then dried completely in a nitrogen atmosphere. The dried ones Silicon substrates are placed in a glass tube through which argon flows. One gaseous mixture of 70% argon and 30% nitrogen are completely cleaned, so that the oxidizing gases such as 02, CO2, H20 etc. to a content of less than 1 ppm (1x10 6). This gaseous mixture is then poured into the quartz tube flowed in at a speed of 5000 cm3 / min and with the silicon substrate brought into contact at a temperature of 12000c. A silicon nitride film grows on the silicon substrate up to a thickness of 100 A. Boron ions (B +) are through the silicon nitrides at an ion energy of 40 keV and in an amount of 5x1013 / cm2 implanted. N + P junctions that are separated from each other are between the P substrate and the N + layer implanted with boron ions. Treated like that Silicon substrate is heated or tempered at 11000C for 30 minutes.

The avalanche breakdown voltage of the N + P junctions is 6.6 V + 0.2 V.

Instead of the direct thermal nitride film made of silicon, a Silicon dioxide film with a thickness of 100 µ on the above-mentioned silicon substrate formed by thermal oxidation. The avalanche breakdown voltage of the N + P-t # transitions, which are obtained by the ion implantation with subsequent annealing is 8.7 V + 0.5 V.

The low avalanche breakdown voltage of the N + P junctions caused by the ion implantation is formed by the direct thermal nitride film of silicon indicates that the areal concentration of boron after annealing is not significant is decreased. The spread of the breakdown voltage of the N + P junctions is in the Transitions according to the invention are less than in the transitions produced by ion implantation can be produced by a conventional oxide film. This fact shows that the foreign matter ions into a piece of the silicon substrate through the direct thermal nitride film Silicon more uniformly than can be implanted through the oxide film.

Example 5 Silicon substrates on wafers are produced in four lots, see Table 2, in accordance with the concentration of boron in the body of the substrates (Nb) grouped.

Table 2 - Ns / Nb Lot No. Nb (~ 3) Na (cm) (Medium) 1 2.8 ~ 3.2 x 1015 2.1, 3.4 x 1015 0.92 2 1.8 ~ 2.0 x no16 1.2 ~ 2 2.0 x 1016 0.84 3 1.8 ru 2.1 x 1016 1.3 ### 1.7 x 1016 0.77 4 1.7 x 1016 1.6 ~ 2.2 x 1016 0.89 Each lot contains 10 to 20 substrates.

The direct thermal nitride from silicon is on the substrates formed by heating to 120,000 for 30 minutes. The substrates are on a Temperature between 1000 and 115000 for 15 to 90 minutes in an oxygen atmosphere heated.

The boron concentration on the substrate surface increases after heating and is shown in the Es column in Table 2. The ratios Ns / Nb of Substrates of each lot are averaged and are shown in Table 2. How out results in the ratios Ns / Nb, the surface concentration of boron is not essential redistributed in the silicon nitride due to the heat treatment. Furthermore are the foreign matter that was already on the substrate surface before the formation of the silicon nitride were not redistributed into the silicon nitride.

Example 6 The relationship between the areal concentration of boron (Ns) and the dosage amount of the boron ions in this example is among the following Conditions have been investigated.

Ion energy 40 keV thickness of the direct thermal nitride film Silicon 90 i heating temperature after the formation of the silicon nitride film 1000 to 115000 This relationship is shown in FIG.

The Ns value depends linearly on the dosing quantity and can be 1017 / cm3 or more. The Ns value is about twice that of ion implantation through a common oxide film.

Summary Foreign matter ions implanted in a semiconductor silicon substrate do not turn into a film from the substrate during heating of the substrate redistributed.

Such redistribution occurs due to direct nitration of the silicon substrate for forming a silicon nitride film.

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Claims (7)

Claims 1. A method for manufacturing a semiconductor device, in particular, a MIS-FET in which foreign matter enters a semiconductor silicon substrate are implanted and in which the ion-implanted semiconductor silicon substrate is heated, characterized in that a silicon nitride film, in particular a Gate insulating film of the NIS-FET, on the semiconductor silicon substrate by direct thermal Nitriding of the silicon of the semiconductor substrate is formed, thereby due to the direct thermal nitriding after heating, the entire amount of the ion-implanted Foreign matter is retained on the surface of the semiconductor silicon substrate. 2. The method according to claim 1, characterized in that foreign matter ions can be implanted through the silicon nitride film. 3. The method according to claim 2, characterized in that the foreign matter ions by a film of conductive material deposited on the silicon nitride film and then implanted through the silicon nitride film. 4. The method according to claim 1, characterized in that the foreign matter ions implanted directly into the semi-conductor silicon substrate. 5. The method according to any one of claims 1 to 4, characterized in that that the thickness of the silicon nitride film is in the range of 20 to 100, preferably 50 to 90, i. 6. The method according to claim 5, characterized in that an ion energy of foreign substances in the range from 10 to 400, preferably 20 to 200, keV are applied will. 7. Use of a silicon nitride film produced according to claims 1 or 5 to prevent redistribution of ion-implanted foreign matter from the Semiconductor substrate in the silicon nitride film during the heating of the semiconductor substrate to a temperature for electrically activating the foreign matter and correcting it damage to the semiconductor substrate caused by the ion implantation.