DE2940088C2 - Raster display device - Google Patents

Description

The invention relates to a raster display device according to the preamble of claim 1. Such Display devices are used to display various types of information on a screen, for example in patient monitoring systems in medicine for displaying cardiac function signals.

In conventional raster display devices, the electron beam is periodic through a pinhole cathode ray tube deflected along parallel lines across their screen, the one that can be excited by the electron beam Luminous substance carries. For the representation of curve shapes, planar light patterns are lined up on the screen, the waveform may appear as a nearly continuous line if the scan lines are close enough together.

In the case of the spacing of the grid lines used, for example, on television screens for reasons of cost the grid display leads to a jagged contour of the displayed line, which is used for the display, for example of cardiac functions is unsatisfactory as the jagged lines provide an accurate interpretation for the viewer make more difficult.

There is a display device according to the preamble of claim 1 known (DE-OS 23 11 826), in which to achieve a smooth-appearing representation of a curve, the brightness of the light patterns combined to form the curve is modulated in the direction of the web in such a way that their contours are weakened, and thus optically run into each other.

For this purpose, in the known device, a clock signal which divides each raster line into Sections controls, a modulation control signal generated by a multiplier, its frequency is a predeterminable multiple of the frequency of the clock signal. The modulation control signal is passed through an up-down counter and a digital-to-analog converter into a modulation signal with a stepwise rising flank, a plateau and a gradually falling, flank converted, which in turn is the The brightness of the brightened raster line pieces or light pattern is modulated in the raster line direction. Each lightened Raster line segment or light pattern shines weaker at its beginning, with / oller in its center Intensity and weaker again at its end, the respective increase in intensity towards the middle through the Shape of the corresponding edge of the modulation signal is determined.

The mentioned publication describes the implementation of this .modulation for the representation of straight lines, those with the perpendicular to the grid parts an angle of 58 degrees to 90 degrees or - 58 degrees to include - 90 degrees. The modulation device is switched off if the straight sections are steeper. In contrast, the characterizing part of claim 1 solves the problem of providing a raster display device according to the generic term, with which to generate a smooth with any curve appearing curve edge the shape of the curve to be displayed with the modulation of each individual light pattern is considered separately.

According to claim 1 are for each light pattern to adapt the modulation to the curve Positions of at least three points of intersection of the curve piece to be represented by this light pattern with three mutually adjacent tracks determined by a scanning device. The modulation happens in such a way that when generating the light pattern, a first control device has its width along a first Rail section increased, which is determined by the positions of a first pair of -lieser points, and a second Control device decreased the width along a second rail section, which is determined by the positions of a second pair of these points is determined. If the track section between the first pair of points is greater or smaller than the segment of the path between the second pair of points, the light pattern becomes asymmetrical along the path, whereby more strongly curved sections of the curve with a curve adapted, smooth contour can be displayed.

The change in the width of the light pattern along a path can be continuous or according to claim 2 according to claim 3 take place in stages, the position of the stages being interpolated or from the path position can be determined by intersections. The first and second pairs of points can have a common nsa * men point or be separated from each other, whereby in the latter case a light pattern is generated, which initially increases in width along the track, then has a constant width over a section and finally diminishes in width.

According to claim b, the grid lines can have an angle with the axes of the curve shown. Claims 7 and 8 are preferred embodiments for modulating the light pattern serving control devices. Preferably, the screen of a cathode is used as the viewing surface.

The cathode ray tube is used, the electron beam of which is deflected in the manner of a grid of parallel lines. the The width of the light pattern generated in a web is determined by modulating the spot size and intensity of the Electron beam changed.

In the following a preferred embodiment of the invention is explained with reference to the drawings; it shows

Fig. 1 is an illustration from which it can be seen how a part of a curve shape with a rhombic Contrast pattern can be formed

F i g. FIG. 2 shows a block diagram of a circuit arrangement for realizing rhombic patterns according to FIG Algorithms in FIG. 3,

F i g. 3 a set of algorithms to be executed to form rhombic patterns,

Figure 4 is a line diagram of a portion of a waveform formed with a two-stage three-point contrast pattern is pictured,

Fi g. 5 schematically shows a circuit diagram of a circuit for generating and using the two-stage pattern according to FIG. 4,

Fig. 6 is a diagram showing how a section of a curve shape is replaced by a four-stage Four-point pattern can be represented,

F i g. 7 schematically shows a circuit diagram of an arrangement for generating and using the four-level contrast pattern according to FIG. 6,

F i R. 8 schematically shows a circuit arrangement of an assembly for generating the four-stage contrast pattern as shown in FIGS. 6,

Figure 9 is a block diagram showing how digital circuitry has a programmed processor for use in the arrangements according to FIG. 7 and 8 can be used,

F i g. Figure 10 is a block diagram showing one way in which digital logic circuits are used can replace the analog functions in the arrangements of FIGS. 7 and 8,

11 schematically shows a system in which raster lines of a cathode ray tube intersect the paths, lengthways of which the patterns are formed at right angles, and

F i g. 11A schematically shows a diagram for explaining the operation of the system according to FIG. 11th

The three-point rhombus taupe

If a curve shape, as denoted by 10 in Fig. 1, is represented by changes in the light contrasts at points where it intersects parallel, spaced-apart paths 12 to 30 which extend upwards from a common base 31, so this waveform appears as a series of points. If, however, the curve shape is represented in accordance with this invention, then in accordance with this exemplary embodiment it appears as a rhombic pattern of light contrasts 18 'to 30'. The pattern 18 ', which is centered on a path 18, increases gradually from the width 0 to a maximum width upwards, and this takes place in an amplitude range which is defined by a pair of points P-3 and P-2, where the curve shape 10 intersects the third or second aforementioned paths. The pattern gradually increases. the maximum width up to the value 0 within an amplitude range which is defined by a second pair of points P-2 and PI, where the curve shape 10 intersects the first and second aforementioned paths.The diamond pattern 20 'is formed along the next parallel path 20 , but now the points of intersection of the curve shape 10 with the three aforementioned paths are denoted by (P-3), (P-2) and (PI). The relative amplitudes of the points defining the areas within which the width of the patterns changes depends on the shape and inclination of the portion of a curve shape being displayed.

Circuit for using the diamond pattern

In the arrangement according to FIG. 2, the device for displaying the waveform consists of a cathode ray tube 32, in which the electron beam is deflected in such a way that it forms a pattern of parallel scans spaced lines that coincide with trajectories 12-30 in FIG. To increase or decrease the width of the light emitted along a line of the grid thereby forming the diamond pattern, the control signal for the electron beam is increased accordingly or decreased thereby changing the size of the beam on the face of the cathode ray tube. at In this particular embodiment, this is done by charging or discharging a capacitor 34 and dic voltage according to the waveform 34 'on the capacitor via a CRT gamma correction circuit 36 and an amplifier 37 of a beam control electrode, for example a control grid 38, of the cathode ray tube 32 fed. For example, to see the diamond pattern 18 'in FIG. To generate 1, the voltage signal 34 'becomes zero increased to a maximum value when the electron beam along the line 18 between the amplitudes samples which correspond to the amplitudes of the intersection points P-3 and P-2. The beam width is again down to 0 decreased as the electron beam continues to scan along line 18 between amplitudes that match the amplitudes correspond to the points of intersection P-2 and P-I. The charging and discharging of the capacitor 34 is as follows causes:

The signal relating to the waveform to be displayed is sent from a signal source 40 to a digital AmpHtudenabtasteinrichtung 42, the output of which is connected to a shift register 44. A clock generator 46 is there Pulses with a high sampling frequency to the sampling device 42 and the shift register 44 to synchronize, so that the output signals of the shift register sections 46, 48 and 50, the amplitudes of the Show the curve shape on the last three grid lines, for example P-3, P-2 and P-I. These signals are fed to a computer 52 which, in accordance with the algorithms in FIG. 3 is programmed and a digital one

Signal at an output I emits which corresponds to the smallest amplitude caused by the scanning signals is shown. When scanning along path 18 in Figure 1, this would be the amplitude of intersection P-3. The computer 52 also outputs a digital signal at the output II, which corresponds to the intermediate value of the through the Sampling signals represented amplitude corresponds, d. H. the path 18 is the amplitude of the Intersection point P-2. The computer output I is connected to a D / A converter 53, the output voltage of which the inverting input of a comparator 54 is supplied. The computer output II is with a D / A converter 56 is connected, the output voltage of which is the inverting input of a comparator 58 is fed. A line deflection generator 60 synchronized with pulses from the clock 46 provides one Sawtooth voltage 60 ', which changes from the value 0 to a maximum value with each line deflection. the Voltage 60 'is applied to the non-inverting inputs of comparators 54 and 58.

The outputs of the comparators 54 and 58 are connected to the inputs of an EXCLUSIVE-OR element 62 tied together. Its output is connected to a switch actuating device 64 for a semiconductor switch 66 and Via an inverting amplifier 68 also with a switch actuating device 70 for a semiconductor switch 72 connected. The switch 66 is via a D / A converter 67 between the ungrounded side of the capacitor 34 and an output III of the computer 52 connected, in which the computer a calculated value a constant charging current. The switch 72 is connected to the ungrounded via a D / A converter 73 Side of the capacitor 34 and an output IV of the computer 52 connected, in which the computer has a calculated value of the discharge current supplies. A clamp circuit 74 prevents the output of the n / A-lJrn ^ et ^ er «; 73 iintpr the essential voltage level falls.

The deflection of the electron beam in the cathode ray tube 32 takes place by the sawtooth voltage 60 ' at the output of the line deflection generator 60 is fed to a fast driver circuit 75, which in turn is connected to a deflector 76. A frequency divider 78 is between the clock 46 and a Slow deflection driver circuit 80 connected to deflector 76 is connected, whereby a slow or grid-like scanning is achieved overall.

Operation of the circuit

The circuit according to FIG. 2 works as follows:

At the beginning of a raster line, the output signals of the comparators 54 and 58 and the EXCLUSIVE-OR gate 62 have the lower signal level, the switch 66 is open and the switch 72 is closed. When c ¹ ■ ϊ sawtooth voltage 60 'reaches a value which corresponds to that at the inverting input of the comparator 54 and thus the amplitudes of the lowest of the intersection points PI, P-2 and P-3, the comparator 54 and the EXCLUSIVE-OR gate switch 62 to the higher signal level. As a result, the switch 72 is opened and the switch 66 is closed, whereby the charging of the capacitor 34 is initiated. The charging speed depends on the value of the constant charging current at output III. The value of the charging current is dimensioned in such a way that it is inversely proportional to the amplitude difference between the point of intersection with the lowest amplitude and the point of intersection with the mean amplitude. When the sawtooth voltage 60 'reaches a value which is equal to that at the inverting input of the comparator 58 corresponding to the amplitude at the middle point of intersection, the comparator 58 switches to the higher signal level. This opens the switch 66 and the switch 72 is closed and the discharge of the capacitor 34 is triggered. The discharge speed depends on the value of the constant discharge current that is provided at output IV. This value is calculated in such a way that it is inversely proportional to the amplitude difference between the point of intersection with the mean amplitude and the point of intersection with the greatest amplitude.

The capacitor 34 and the circuit part described for charging the capacitor form a device triggered by a first pair of scanning signals and a first set of control signals, namely the rising portion of the waveform 34 ', which is the width of a change in the Light contrast increases along a given direction on a parallel path within an amplitude range which is defined by the amplitudes generated by the first pair of sample signals are shown. In the case of the pattern 18 'on the web 18, the pair of scan signals adjust the amplitudes the intersection points P-3 and P-2.

The capacitor 34 and the circuit part just described for discharging the capacitor 34 form means triggered by a second pair of sample signals and a second set of control signals derives, namely the falling portion of the curve shape 34 ', soft the width of a change in the Reduced light contrast generated along the same parallel path within an amplitude range defined by the amplitudes represented by a second pair of control signals will. In the case of the pattern 18 'on the web 18, the second pair of scanning signals corresponds to the amplitudes the intersection points P-2 and P-I. In this particular case, the first and second are sets of control signals continuously and modulate the width of the electron beam when it scans a raster line that coincides with one of the paths 12 to 30 described coincides

The algorithms of FIG. 3 show the areas for enlarging and reducing the width of the light contrast pattern for all changes in the relative amplitudes of points P-3, P-2 and PI at which the curve shape to be displayed intersects the three aforementioned paths. To the extent that some of the changes, for example those of lines C, D, E ₁ F. C, H, I and /, would require the capacitor 34 to be fully charged or discharged without a time delay, the computer 52 causes the charging current or the discharging current to become one has a fixed amount and switches 66 and 72 flows during the opening and closing times. The changes in the lines G, H, I and / could be represented by a broadening of the electron beam as it passes through the amplitude range which is defined by the two lower points and through

a narrowing of the electron beam as it passes through the area which is defined by the two upper points. Better matching is achieved between the diamond patterns by using the width changes called up by the algorithms. Line K shows a finitely small charging and discharging time which is required to indicate where the curve shape has the same value, namely a horizontal line. Without this display this line would be invisible.

Scanning processor

In the meii'ton cases, signals representing physiological functions require more time to be

ίο Complete the period when it takes the electron beam to scan a full raster. For example it takes about one second to complete a heartbeat period, but can be during this time the beam from the cathode ray tube 60 scanned full rasters. If no special technique is used, 1/60 of a heartbeat period would be displayed during each raster scan, so that in one Second the entire heartbeat period would be shown in 60 overlapping different parts. One such ad would be meaningless. If one were to reduce the time required to scan a raster to a Second, a complete heartbeat period would be displayed one after the other on the screen. However, since the light emitted by the phosphor on the screen of the cathode ray tube decreases rapidly, part of the heartbeat period would already become invisible when the other is being formed. Around an evenly bright illumination of one or more complete periods of a slowly changing To achieve a signal which, for example, represents the heartbeat activity, it has been proposed that the samples of the signal amplitude are taken at a low rate and many times with can be displayed at high speed during the relatively long input time.

In the system of Fig. 2, a bright scanning technique is carried out in the following manner. The analog The signal to be displayed, which may be the output voltage of an electrocardiogram, is obtained from a signal source 40 of the circuit 42 processing the samples. This contains an A / D converter 82, the

triggered by each pulse received from a frequency divider 84 to produce a digital word, j

which represents the amplitude of the signal at that point in time. The output of the converter is with a Data input of a memory 86 used for data renewal. An address counter 88 for this j

Memory supplies the read-in address to a terminal 90 of a single-pole solid-state changeover switch 5, its

Contact arm is connected to the input address line of memory 86. Pulses from the frequency counter 84 '■

are also fed to the input for reading or writing into the memory 86, the clock input of the address counter 88 and a switching control device 92 in order to connect the "switching arm" of the switch 5 to the terminal 90. Thus, with each new pulse, a new digital word is entered from the divider circuit 84 into successive addresses of the memory 86. i

The memory read address is supplied by an address counter 94 which is connected to the other terminal 96 of the Switch S is connected. The address control signals are such that they repeat the memory 86 with the read the same sequence with which the signals are written. Pulses from clock 46 become the divider circuit »4, the clock generator terminal of the memory S6 and the clock generator terminal of the read address counter 34 fed. The output signal of the memory 86 is fed to the input of the shift register 44. This the Data for the uniform illumination of the image renewing system, which was previously used for a display device designed with a deflected beam is compatible with this raster display system.

The two-step three-point pattern

In Fig. 1-4, spaced parallel trajectories are indicated by broken lines 100, 102, 104, 106 and 108 extending upward from a common baseline 110. A signal having a waveform 112 which intersects trajectories 100, 102 and 104 at points P-3, P-2 and PI, respectively, is represented by cross-shaped patterns 104 ', 106' and 108 '. In particular, the pattern 106 'changes from width 0 to half width with an amplitude H that is equal to one third of the amplitude range between points' P-3 and P-2 and changes up to the maximum width with an amplitude F that is ² Iz corresponds to this range. The width of the pattern changes from the full value to half the value at an amplitude F ' which is equal to one third of the amplitude range between the points P-2 and PI and changes to the value 0 at an amplitude H' which is ² I ₃ corresponds to this area.

Device for using a two-step three-dot pattern

When the electron beam of a cathode ray tube 111 in FIG. 5 is deflected in such a way that it forms a grid with parallel lines, which with the tracks 100 to 108 in F i g. 4 coincide, the pattern can can be formed by modulating the beam width with control signals generated as follows.

The waveform to be displayed is fed to an A / D converter 114, which determines the amplitude of the waveform once per lenticular lens scanned according to the control of pulses with the raster line scanning frequency, the are fed to the converter from a clock 116. If desired, a circuit for »luminous scanning« can be used as described in connection with FIG. 2, but in the one shown Embodiment, the output of the A / D converter 114 is directly a shift register 117 with three Sections 118,120 and 122 fed to These sections are controlled by pulses from the pulse generator 116, so that their output signals are digital scanning signals, soft the amplitudes of the Show the curve shape at the last three grid line intervals, for example at points P-3, P-2 and P-I in Fig. 4. These digital sampling signals are converted into corresponding voltages by converters 124, 126 and

128 implemented resistors rl '. r2 ' and r3' are connected in series between the output of D / A converter 126 and the output of converter 124, and resistors r 1, r 2 and r 3 are between the output of D / A converter 126 and the output of the D / A converter 128 connected in series. All resistors have the same value, so that the voltage at node / 1 of resistors r2 and r3 and the voltage at node / 2 of resistors rl and r2 have values of V3 and ² Ii, respectively the voltage between the output of the D / A converter 128 and the output of the D / A converter 126 amount. The voltage at node / 3 of resistors r 1 'and r 2' and the voltage at node / 4 of resistors r 2 'and r3'is' Z ₃ or 2/3 of the voltage between the output of the D / A- Converter 12S and the output of the D / A converter 124. These nodes JX, / 2, / 3 and / 4 are connected to the inverting inputs of the voltage comparators 130, 132, 134 and 136. A deflection generator 138 is synchronized by pulses from the clock generator 116 and fed a sawtooth voltage 140 at the line scan frequency to the non-inverting inputs of the voltage comparators 130, 132, 134 and 136.

The downstream logic circuits generate sets of beam width control signals which increase the beam width in the cathode ray tube in accordance with one pair of scan signals and decrease the beam width in accordance with another pair of scan signals. The outputs of the comparators 130 and 136 are connected to the inputs of an EXCLUSIVE-OR gate 142. Whose open collector exit is with the Bari? of a transistor 144 and the tap of a potentiometer 148 via a resistor 146. An emitter load resistor 150 is connected between a point of negative potential V− and the emitter terminal of the transistor. The outputs of the voltage comparators 132 and 134 are connected to the inputs of an EXCLUSIVE-OR gate 152 and the inputs of an OR gate 166. The output of the EXCLUSIVE-OR gate 152 is connected to an input of an OR gate 154. The other input of the OR gate 154 is connected to ground via a resistor 156 and coupled to the output of the OR gate 166 via a capacitor 168

The open collector output of the OR gate 154 is connected to the base of a transistor 160 and a point with positive potential + VB via a resistor 162. The emitter terminal of the transistor is connected to the emitter terminal of the transistor 144. These emitter connections are connected via an amplifier 164 to a control electrode of the cathode ray tube 111 for the electron beam width, for example to a control grid 163 via the amplifier 164.

The deflection of the beam of the cathode ray tube 111 along the lines of the grid is achieved by the Sawtooth voltage 140 is passed on to an amplifier 170 and its output with a line deflection coil 172 is connected. The raster deflection is achieved by using a frequency divider 174 between the Clock generator 116 and a grid deflection 176 is connected and its output via an amplifier 178 is connected to a raster deflection coil 179.

Operation gerräß F i g. 5

If the signal with the waveform 112 according to FIG. 4 the A / D converter 114 according to F1 g. 5 is supplied, the voltages at the resistor connections correspond to Ji, J2. / 3 and / 4 the amplitudes HF F 'and //' in FIG. 4. At the beginning of a line when a sawtooth voltage is 140 0. the outputs of all logic circuits have the lower signal level and the transistors 144 and 160 follow the output voltage minus a voltage drop Vbc which is applied to the amplifier 164 in order to switch off the electron beam in the cathode ray tube 111.

When the sawtooth voltage 140 reaches the voltage value at node / 1, the voltage comparator 130 switches to the higher signal level and causes the open output collector of the EXCLUSIVE-OR gate 142 to rise to a higher signal level, which is determined by the setting of the potentiometer 148 . The emitter connection of the transistor i44, which is connected as an emitter follower, receives a higher voltage level, which is indicated by the stage 51 in the curve form 171. When the sawtooth voltage 140 reaches the value of the voltage at node / 2, the voltage comparator 132 and the EXCLUSIVE-OR gate 152 switch to a higher signal level. As a result, the voltage at the open collector of the OR gate 154 rises to a positive value determined by + VB , which is higher than the voltage of stage s 1. The voltage at the emitter terminal of transistor 160 rises to one through stage 5 2 in the waveform 171 displayed value. The transistor 144 is turned off. When the voltage of the stage s 1 is supplied to the amplifier 164, the voltage of the cathode ray tube 111 supplied to the electrode grid 163 is sufficient for the electron beam of the cathode ray tube to receive half the maximum width, as at H in FIG. 4 is shown. When the voltage of stage s 2 is fed to amplifier 164, the beam is given the maximum width, as in Fin F i g. 4 is displayed. Thus, the circuits just described generate a first set of control signals s 1 and s 2 corresponding to a first pair of scan signals at points F-3 and PZ which determine the width of the light along a path, for example path 106 in FIG. 4. Increase within an amplitude range defined by the pair of scanning signals.

When the sawtooth voltage 140 reaches the value of the voltage at node / 3, the output signal! of the EXCLUSIVE OR gate 152 and the OR gate 154 to the lower signal level. This turns off transistor 160 and the voltage at the input of amplifier 164 falls, as indicated by step s 3 of waveform 171, and becomes equal to voltage s 1 determined by transistor 144. This voltage causes the beam of the cathode ray tube 111 has only half the maximum width, such as BF \ F'in 4 is shown. When the sawtooth voltage 140 reaches the value of the voltage at node / 4, the comparator 136 and the EXCLUSIVE-OR gate 142 switch to the lower voltage level, switch off the transistor 144 and reduce the voltage at the input of the amplifier 164 to 0, such as is represented by the step s4 of the waveform 171. The electron beam is now interrupted, as with Win

45

60 65

Fig.4 is shown. Thus, the circuits just described generate a second set of control signals 5 3 and 5 4 corresponding to a second pair of scan signals at points P-2 and PA which are the width of the light beam along a path, for example path 106 in Figure 4, within of an amplitude range defined by the second pair of sample signals.

If a portion of the waveform being reproduced is horizontal and intersects the trajectories of Figure 4 in the same amplitude, the values of the sampling signals at points P-3, P-2 and PA would be the same, so that the inverting inputs of the comparators 130,132,134 and 136 applied voltages would have the same value. When the sawtooth voltage 140 applied to the non-inverting inputs reaches this value, all comparators switch to the higher voltage level at the same time. If this

ίο takes place, neither the EXCLUSIVE-OR element 142 nor the EXCLUSIVE-OR element 152 change the switching state, so that the electron beam is never turned on at a point when it has a maximum width g should have. The beam is turned on by the operation of the OR gate 166 in this case. If the - the first of its inputs assumes the higher signal level, the resulting rising signal edge becomes differentiated by capacitor 168 and resistor 156 and forms a short pulse 169 am Resistor 156, which causes OR gate 154 to switch to the higher signal level and the beam of the cathode ray tube 111 turns on

Of course, the number of steps in the sets of control signals can be increased by more resistances are used between the output of the converters and more Komparato. en and EXCLUSIVE-OR gates can be provided and / or the number of used for each curve shape Sampling points is increased. If enough steps are used, the pattern generated could practically do that be the same as the P-homb pattern previously described.

The four-step four-point pattern

In Fig. 6, a plurality of parallel trajectories is shown by broken lines 180,182,184,186,188,190,192 and 194 extending upwardly from a base line 196. A curve shape 198 which intersects paths 180, 182, 184 and 186 at points PA, P-3, P-2 and PA is represented by light patterns 186 ', 188' and 190 'extending along paths 186, 188 and 190, respectively. The width of the hatched pattern 188 'is increased in four equal steps from 0 to a maximum within an amplitude range which is defined by the points PA and P-3. For the amplitude range defined by points P-3 and P-2 , the width remains at a maximum value, which is preferably equal to twice the value of the distance between adjacent parallel paths, and within an amplitude range defined by points P-2 and PI the width of the pattern decreases from the maximum value to 0 in four equal steps. The patterns 186 'and 190' are similar so that there is some overlap.

Circuit arrangement using a four-stage four-point pattern

If the display device includes a cathode ray tube with grid lines beginning with tracks 180 to 194 in FIG. 6 coincide, the pattern shown can be formed by changing the width of the electron beam is controlled when this is controlled along each raster line according to the location of points P-4, P-3, P-2 and P-I in which the curve shape to be displayed intersects the four previous grid lines. With the system 7, the digital signals at the output of a source 200 of a processing device 202 for Scanning signals supplied, which may be a "brightness scanning circuit", as he is in connection with F i g. 2 has been described. The output from the processing device is fed to a shift register 204 with four sections 206, 208, 210 and 212 fed the digital word with each pulse switch on, which is fed to its clock inputs from a clock generator 214. After the shift register has been loaded, the digital words are at the outputs of the shift register sections 206, 208, 210 and 212 a group of scanning signals, which in each case the amplitudes of the waveform to be displayed at the represent the last four consecutive lanes, as at points P-4, P-3, P-2 and P-I in FIG. 6 shown

so is. These sample signals are applied to the respective inputs of D / A converters 216, 21 &, 220 and 222 which generate voltages with corresponding amplitudes. These tensions can also be used as a Group of signals are perceived, which at the same time each have the amplitude of the four successive Represent the curve shape to be represented by grid lines.

Four identical resistors R 1, R2, R3 and R 4 are connected in series in the order mentioned between the outputs of the D / A converters 216 and 218 and the nodes / 1,72, J3 and / 4 with the inverting inputs connected by voltage comparators Q, H, T and ^. Four equal resistors R Y. R2 ', R 3' and R 4 ' are connected in series between the outputs of the D / A converters 222 and 220, and the nodes JY, / 2', / 3 'or respectively . / 4 'are each connected to the inverting inputs of the voltage comparators Q'. H'. T 'and F' connected. A fast or line sweep generator 224, synchronized by pulses from clock 214, provides a sawtooth voltage 226 at the line frequency to the non-inverting inputs of all voltage comparators.

The following logic circuits provide a set of electron beam width control signals and are used to increase the width of the electron beam in a cathode ray tube 227 according to one of the pairs of scan signals P-4 and P-3 or P-2 and PA when the beam is scanned along a path .

Also, a set of control signals to decrease the width of the electron beam are generated corresponding to the other pair of scan signals as the beam continues to scan along the path. The output signals of the comparators Q and Q ' are fed to the corresponding inputs of the EXCLUSIVE-OR gate 228. The output signals of the comparators H and H ' are fed to the corresponding inputs of the EXCLUSIVE

OR gate 230 supplied The output signals of the comparators T and T are supplied to the corresponding inputs of the EXCLUSIVE OR gate 232, and the output signals of the comparators Fund F ' are supplied to the corresponding inputs of the EXCLUSIVE OR gate 234 and the inputs of the OR gate Element 262 fed. The open collector output of the EXCLUSIVE-OR element 228 is connected to the base of a transistor 236 and the tap of a potentiometer 238. The emitter of the transistor 236 is connected via an emitter load resistor 240 to a point with negative potential V− and switches off the electron beam in the cathode ray tube 227 when this potential is fed to its control grid 242 via an amplifier 244. The open collector of the EXCLUSIVE-OR gate 230 is connected to the base of a transistor 246 and the tap of a potentiometer 248. The emitter of transistor 246 is connected to resistor 240. The open collector of the EXCLUSIVE-OR-Güedes 232 is connected to the base of a transistor 250 and to the tap of a potentiometer 252. The emitter of transistor 250 is connected to resistor 240. The output of the EXKLUSrV-OR. Gate 234 is connected to one input of an OR gate 254, the other input of the OR gate 254 is connected to ground via a resistor 256 and to the output of the OR gate 262 via a capacitor 264 . The open collector of the OR gate 254 is connected to the base of a transistor 258 and a point with positive potential via a resistor 260. The emitter of transistor 258 is connected to resistor 240.

The deflection of the electron beam of the cathode ray tube 227 with the line frequency is achieved, by the sawtooth signal 226 at the output of the generator 224 used for the rapid deflection Deflector 266 is supplied via an amplifier 268. The raster deflection of the beam is obtained, in that the pulses from the clock 214 are fed to a frequency divider 270 and a generator 272 is synchronized with the low frequency pulses from divider 270 for the slow deflection. Of the The output of the generator 272 is connected to the deflection circuit 266 through an amplifier 274.

Mode of operation of the circuit arrangement according to FIG. 7th

The following explains how the pattern 188 'in FIG. 6 is formed by means of the circuit arrangement according to FIG. Within an amplitude range defined by dif points P-4 and P-3, the width of the pattern is increased from 0 in steps of 25%, as indicated by the letters Q ', H', T and F. The pattern retains its full width within an amplitude range defined by points P-3 and P-2. The width of the pattern becomes within an amplitude range defined by points P-2 and PX

o- η / Λ

I Irl r

- * J rU V <1 IllVUllgU t- gg

corresponds to the amplitudes of the signals at points PA, P-2, P-3 and P-4, so that the voltages at circuit nodes / 1, / 2, / 3, / 4, J4 ', JV, JT and / 1 'the amplitudes of Q, H ₁ T. F, F', T. Wund ζ) 'in F i g. 6 correspond.

At the beginning of a raster line, the ^v -'ert of the sawtooth voltage 226 is 0, and all logic switching devices have the lower signal level. If the sawtooth voltage 226 has a value that corresponds to that at the junction point JV , the voltage comparator Q ' switches to a, higher signal level! and causes the output of the EXCLUSIVE-OR gate 228 to increase to a value which is determined by the voltage from the potentiometer 238. The voltage is adjusted so that transistor 236 produces a signal indicated by step si of waveform 276. If the saw number _t ) annu g successively corresponds to the voltages at the nodes / 2 'and / 3', the comparators H ' and T successively switch to the higher signal level and cause the open collector outputs of the EXCLUSIVE-OR gates 230 and 232 assume the potentials which are determined by the settings of potentiometers 248 and 252. These potentials cause their respective emitter terminals to rise to the voltage levels indicated by signals s2 and s3 of waveform 276. When the sawtooth voltage 226 rises to the value of the voltage at node / 4 ', the voltage comparator F' switches to the higher voltage level and causes the EXCLUSIVE-OR gate 234 to switch to the higher signal level and the output signal of the OR gate 254 rises to a voltage value determined by the voltage + VB at the top of resistor 260. As a result of this voltage, a voltage puf occurs at the emitter of transistor 258, which voltage is indicated by signal s4 of waveform 276. The signals 5 1, 5 2, 5 3 and 5 4 cause the electron beam of the cathode ray tube 227 to have 25%, 50%, 75% and 100% of the maximum width, respectively. This set of signals causes the beam to increase in width within an amplitude range determined by a pair of scan signals, in this particular example the scan signals at points P-4 and P-3. When the sawtooth voltage 226 successively increases to voltage values at nodes / 4, / 3, / 2 and / 1, the voltage comparators F, T, H and Q switch to a higher signal level and cause the EXCLUSIVE-OR gates 228,230,232 and the OR gate 254 switch to the lower signal level and generate signals s 4, 5 3, s 2 and s 1 of the waveform 276. This set of signals causes the beam width to decrease within an amplitude range determined by a pair of scan signals, which in the present example are the scan signals at points P-2 and PI.

The OR gate 262 works in conjunction with the capacitor 264 and the resistor 256 and generates a pulse 265 which results in a minimum pulse width at the output of the OR gate 254 whenever the both middle points have the same amplitude.

It will be understood that the number of stages could be increased by increasing the number of resistors which is between the outputs of the pair of D / A converters 216 and 218 and the pair of D / A converters 220 and 222 are provided. The number of voltage comparators would also be increased, as well as the number of EXCLUSIVE-OR elements.

15th

Preferred embodiment using a four-step four-point pattern

If the curve shape to be displayed has a reversal of direction within four paths, so that there is an overlap between the areas defined by the amplitudes of points PA and P-3 with the areas defined by the amplitudes of points P-2 and PA , it becomes possible that in the otherwise continuous line in the circuit shown in FIG. 7 generated display gaps occur.

In the system according to FIG. 8, however, no gaps are generally created. Most of the Components correspond to those of FIG. 7 and are denoted by the same letters or numbers Der The difference is that two EXCLUSIVE-OR gates, whose outputs are connected to the inputs of a OR-G.'iedes are used instead of the EXCLUSIVE-OR gates 228, 230 and 232 in Fig.7 will. Thus, the outputs of a pair of EXCLUSIVE-OR gates 278 and 280, respectively, are with the inputs an OR gate 282, the output of which is connected to the base of transistor 236 Outputs of a pair of EXCLUSIVE-OR gates 284 and 286, respectively, are connected to the inputs one; OR gate 288, the output of which is connected to the base of transistor 246. The outputs of a Pairs of EXCLUSIVE-OR gates 290 and 292 are connected to the inputs of an OR gate 294, the output of which is connected to the base of transistor 250. The following table shows the comparators which are each connected to the inputs of the various EXCLUSIVE V-OR elements:

20th

EXCLUSIVE-OR link

27Si 280 284 286 290 292 234 262

50

55

60

65

Comparators to which the EXCLUSIVE: V-OR inputs FQ 'F'Q FH'F'H FT 'ϊ T FF'F'F are connected

Mode of operation of the arrangement according to FIG. 8th

When displaying an inclined line such as line 198 in FIG. 6, the arrangement according to FIG. 8 similar to that according to FIG. 7. If, for example, the comparator Q ' changes the switching state, the OR gate 282 switches to the higher voltage level and generates the stage 5 Y in the representation 296. The OR gate 2S2 remains at the higher signal level until the comparator Q switches At this point in time the comparator switches over to the lower signal level and forms stage 51. The fact that you have changed the switching state in the meantime with the inputs of the EXCLUSIVE-OR gates 278 and 280 has no effect , since the OR gate 282 remains at the higher circuit level as long as the two inputs to the EXCLUSIVE OR gate 278 or the two inputs to the EXKLLJS! V-OR-Giied 280 are not the same. Thus, the sawtooth voltage 226 rises and the OR gates 282, 288, 290 and 294 switch to the higher signal level and generate the voltage levels si ', s2', s 3 'and s4', which form a set of control signals corresponding to a pair of sampling signals representing the amplitudes of the pair of intersection points PA and P-3 are generated. This set of control signals can be used to successively increase the width of the light contrast window along the given direction within an amplitude range defined by the amplitudes represented by the pair of A'otas · '; signals .

In the circuit according to FIG. 7 sees the possibility that a gap occurs between the amplitude range in which the comparators Q and Q ' switch to the higher signal level in order to generate the stages 5 i and s Γ, and that amplitude range in which the comparators H and H' switch to the higher switching level in order to generate the stages s2 and s2 ' . If so, the beam has 0 width in the space between the regions and creates a space in the displayed waveform. In the circuit according to FIG. 8, the changes in the switching state of one of the comparators Q and Q ' cause the beam to generate a step s 1' and thus increase the width of the beam to 25% of the maximum value, but the change in the switching state of the other comparator does not produce a step 51 and does not reduce the width of the beam down to the value 0, unless both comparators F and F ' have changed the switching state. Thus, no gap is created in the portions of the area between points PA to P-3 which overlaps the area between points P-2 to PI.

Digitized circuits according to FIG. 7 and 8

F i g. 9 illustrates the use of digital circuitry to provide the input signals to the logic circuitry of FIG. 7 or F i g. 8 forward. The signals relating to the curve shape to be represented are forwarded from a signal source 300 to a device 302 for processing the sampled values, and their output signals are fed to a processor 304. The device 302 processing the samples and the processor 304 are synchronized with pulses of the line scanning frequency which are supplied by a frequency divider 306 which is connected to a clock generator 308. After scanning signals have been fed to the processor 304 which represent the amplitude of the curve shape just shown for four successive raster lines, for example the amplitudes of the points PA, P-3, P-2 and PI in FIG. 5, the processor calculates the amplitude values , at which the different levels occur in the pattern. In this particular embodiment, the digital words corresponding to these amplitudes are fed to a shift register 310 from the output of the processor in the order Q ', H', T, F ', Q, H, T and F in such a way that they are in this order at the outputs of the Shift register sections 312, 314,316,318, 320,322,324 and 326 occur.

These outputs are each connected to the B inputs of digital amount comparators 328,330,332, 334,335,338,340 and 342. The calculations for a line can be made during the previous line and entered into the shift register during the blanking period, namely just before the values for the line, in which they are to be used. The necessary shifting of the information in the shift register sections is controlled by pulses from the processor 304.

A counter 346 driven by pulses from clock 308 provides digital words corresponding to various increasing amplitudes in a repeated sequence to Λ inputs of comparators 328-342. Each signal sequence occurs during a line scan and the number of digital words in a line is hanging on the number by which the divider 306 divides because its output synchronizes the fast or line ramp generator 348 which controls the line deflection speed of the cathode ray tube, not shown. Between the frequency divider 306 and a slow speed or raster ramp generator 352 is a frequency divider 350 which controls the raster deflection of the cathode ray tube. If the digital word applied to input A by one of comparators 328 to 342 represents an amplitude that is equal to or greater than the amplitude produced by the digital word applied to the β input of one of the sections of shift register 310, the comparator switches to the higher signal level. If, therefore, the outputs of the amount comparators for the points Q ', H', T, F '. Q, H, T and F instead of the outputs of the comparators in FIG. 7 and 8, which are labeled in the same way, the system of Fig. 7 operates. 7 and 8 as previously explained.

FIG. 10 shows digital switching which the Qpgpn ^ turk j \\ the analog circuits according to FIG. 7 and 8 and derive signals which inform the logic circuits when the electron beam in the cathode ray tube has reached the amplitudes corresponding to points Q, H. T, F, F '. T '. H ' and Q' correspond, which are required to create the four-step pattern according to FIG. 6 to form.

The signals relating to the waveform to be displayed are fed from a source 354 to a processor 356, the one in FIG. 7 and 8, and its output is fed to a shift register 358, soft has four sections 360,362,364 and 366. The synchronization pulses with the raster line frequency for the Shift register sections, processor 356, fast ramp deflection generator 368 and divider 370, the sync pulses to a slow ramp deflection generator 372, are from a frequency divider 374 supplied, which is fed by a clock 376.

The inputs of a digital averager 378 are connected to the outputs of the shift register sections 360 and 362 such that a digital signal is generated which generates half the amplitude // between the amplitudes at points PI and P-2 . At the output of a digital mean value generator 380, a digital signal is derived which forms the quarter amplitude Q by connecting the inputs of the mean value generator to the output of the shift register section 360 and the output of the mean value generator 378. A digital signal which represents the three-quarter amplitude T is derived at the output of an averaging device 382, in that its inputs are connected to the output of the shift register section 362 and the output of the averaging device 378. A digital signal F, which represents the full amplitude difference between FI and F-2, is obtained directly from the output of the shift register section 362, where the signal representing the amplitude of F-2 occurs. Signals representing the amplitudes of the points F ', T, / - / 'and ζ)' are derived in a similar manner. The output of the shift register section 364 represents the amplitude F '. The signal representing half the amplitude // 'between the amplitudes of F-3 and F-4 is derived by a digital averager 384, the inputs of which are connected to the outputs of the shift register sections 364 and 366. The signal representing the three-quarter amplitude T ' between F-4 and F-3 is derived at the output of a digital averaging unit 386, the inputs of which are connected to the outputs of the shift register section 364 and the output of the averaging unit 384. The quarter amplitude Q' between F-4 A signal representing F-3 is derived at the output of a digital averager 388, the outputs of which are connected to the output of the shift register section 366 and the output of the digital averager 384.

The outputs of the digital averaging units 380, 378 and 382, the shift register section 362, the shift register section 364 and the digital averaging units 386, 384 and 388 are fed to the β inputs of comparators 390,392,394,396,398,400,402 and 404. The output of a counter 406, stored by the clock 376; is connected to the Α inputs of the comparators. During each line scan, the counter 406 outputs a series of digital words representing successively larger amplitude values. If the amplitude exceeds that value which is represented by a digital word which is fed to the β input of a digital comparator, the latter switches to the higher signal level so that the output signals of the magnitude comparators 390 to 404 can be used instead of the Outputs of the comparators Q, H. T, F, F '. T, // 'and Q'in F i g. 7 and 8.

Circuit arrangement in which the grid lines do not coincide with the tracks

In the device explained so far, the raster lines coincided on the screen of the cathode ray tube with the parallel, spaced-apart paths along which light is emitted, so that the rhombic light contrast pattern according to FIG. 1, the two-stage light contrast pattern according to FIG. 4 and the four-level light contrast pattern according to Fig. 6 were formed by modulating the width of the electron beam was scanned along each grid line within the areas defined by the amplitudes where the displayed curve shape intersects previous grid lines. According to FIG. H patterns are formed on the screen of a cathode ray tube in which the grid lines are parallel Cut paths instead of coinciding with them.

In the arrangement according to FIG. 11, the signal is transmitted from a signal source I via the waveform to be displayed

10

20th

30th

35

40

45

50

410 is fed to the input of an A / D. Converter 412, which periodically samples the amplitude of the waveform and the digital words representing the amplitude of each sample are fed to a computer 414. After each digital sample word has been received, the calculator 414 calculates from this and the previous scan words the width which the light scan pattern must have at the intersections a trajectory with the raster lines between the lowest and the highest represented by the sample values Amplitude occur. If seven different widths (and a shutdown signal) are to be used, there are the computer sends a data word consisting of three bits, which represents the width of each interface, Each of these data words is stored at memory locations in memory 416 which represent the display intersections correspond. The stored data words are sequentially under the control of a Raster generator 418 is read from memory 416 and fed to a D / A converter 420. Whose Output voltage is a control electrode for the beam width, for example a control grid 422 a Cathode ray tube 424 is supplied. The raster time-determining generator 418 also controls a deflection circuit 426, which deflection coils 427 for the cathode ray tube 424 feeds so that its electron beam a grid of parallel lines 428 in synchronism with the reading of data words in the storage locations along corresponding parallel lines 430 of memory 416 are scanned. The data words in each line of the Memory are located at the intersection of the vertical broken lines 432, which the vertical broken lines 434 on the CRT 424 screen. When reading out each Data word from the memory 416, the voltage at the output of the D / A converter 420 has one through this Däiciiwort definite value. So there is the initial signa! de * D / A converter 420 from a series of Pulses with different amplitude values, each of which at an intersection of the electron beam in of the cathode ray tube 424 occurs with the vertical broken lines 434. The width of the electron beam at each intersection depends on the amplitude of the pulse occurring at that point in time. the dashed lines 434 are the parallel paths along which the light contrast is to be achieved around the to generate special patterns to be used. The locations of these tracks are determined by the location of the Digital words in memory 416 rather than the locations of the grid lines. The computer 414 delivers pulses ar> the A / D. converter 412 for controlling the scanning speed and to the raster generator 418 for its Synchronization.

Mode of operation of the sound arrangement according to FIG. 11th

Although the system of FIG. 11 can be formed to form light contrast patterns of any shape, it will be explained in connection with rhombic patterns and with reference to FIG. 11A showing the locations of some of the tracks 434 and some of the raster lines 428 on the CRT 424 screen. The electron beam scans lines 428 sequentially in a direction shown by the arrows. It is turned on for the duration of the pulses from D / A converter 420, just before it reaches track 434 until some time thereafter, and is set to any intensity, and hence any width, dictated by the amplitude of the pulses is determined and indicated by the diameter of the circles. The diamond pattern Di is formed along a path P \ by proportionally increasing the beam diameter at the points of intersection of the path ρ with the grid lines between the points Pi-3 and P _r 2, and by proportionally increasing the beam diameter at the intersection of this path Pt with the grid lines between the Points f | -2 and P _x A is decreased. The hatched diamond pattern D ₂ is formed along the next path p ₂ by proportionally increasing the beam diameter at the intersection of path p ₂ and the grid lines between points (P ₂ -3) and (P ₂ -2) and proportionally increasing the beam diameter the intersection of path p ₂ with the grid lines between points (P ₂ -2) and (TV1) is lowered. Similarly, the diamond pattern Di is formed along the path pz by proportionally increasing the beam diameter at the intersection of the path p ₃ and the grid lines between the points / V3 and P ₁ -I and proportionally increasing the beam diameter at the intersection of the path pi with the grid lines is decreased between the points Py2 and P ₃ -I.

For this purpose 10 sheets of drawings

55

60

Claims (8)

Patent claims: L Raster display device with a visible surface on which two-dimensional light patterns are used to represent a curve along parallel paths, the paths extending in a first direction and spaced apart in a second direction, with first means for Generate these light patterns along sections of these paths and with a modulating device that is used for A visible parameter of this light pattern is used to achieve a smooth-appearing representation of the curve the generation of which is modulated in the web direction, characterized in that for generating a If the curve edge appears to be smooth in any curve, the width of each of the light patterns (18 ', 20') along its associated path (18, 20) adapted to the curve profile (10) by the modulating device is modulated between zero and a maximum width, for which purpose - A scanning device (42) is provided which successively generates scanning signals, each of which determines one of at least three intersection points (PI, P-2, P-3) of a curve piece to be represented by a light pattern (18 ') with mutually adjacent paths - A first control device (44,52,67) is provided which generates a first control signal from a first pair of these scanning signals to increase the width of this light pattern (18 ', 20') along a first partial path that is dependent on the web positions, which occupy the intersection points (P-3, P-2) determined by the first pair of scanning signals, as well as - A second control device (44,52,73) is provided which generates from a second pair of these scanning signals to a second control signal for reducing the width of this light pattern (18 ', 20') along a second path section which is dependent on the web positions, which occupy the intersection points (P-2, PI) determined by the second pair of scanning signals. 2. Display device according to claim 1, characterized in that the first control device (44,52, 67) and the second control device (44,52,73) generate control signals which determine the width of the light pattern constantly change. 3. Display device according to claim 1, characterized in that the first control device and the second control means generate control signals which gradually change the width of the light pattern (Fig. 5, Fig. 7). 4. Display device according to one of claims 1 to 3 for displaying the time course of a Signal as .vurvenform, characterized that the scanning device (4Γ.) wins the scanning signals from the signal to be displayed, and
that the sampling signals represent the rth amplitude of the signal at successive times.
5. Display device according to claim 4, characterized in that the first control device (44,52, 67) derives the first control signal from a first pair of scanning signals generated consecutively in time, and that the second control device (44, 52, 73) the second control signal from a temporally immediate subsequently generated second pair of successive scanning signals. 6. Display device according to one of claims 1 to 5, wherein a first size of the to be displayed Curve is specified along a first axis and a second size of the curve to be displayed along a second axis is indicated which is perpendicular to the first axis, characterized. Hg that the parallel trajectories have predetermined angles with respect to the first and second axes, | that a control device (414, 416) determines the width of the light pattern along a first partial path " changes determined by the intersection points of the associated path with vertical lines from the points (P-3, P-2) represented by the first pair of scanning signals, and the width of each of the light patterns changes in the opposite sense along a second path segment which is determined by the intersections of the associated path with perpendicular lines from the points (P-2, PI) represented by the second pair of, scanning signals. | 7. Display device according to one of claims 1 to 6 with a cathode ray tube, in which the first | Setup deflects the beam from the cathode ray tube along grid lines that are parallel to the parallel ones Paths run, characterized in that that an Integra: or (34) is provided, that the first control means (44, 52, 67) to increase the width of the light pattern (18 ', 20') along the first rail section emits the first control signal to the integrator (34) in such a way that its output signal (34 ') changes in a first direction, that the second control device (44,52,73) for reducing the width of the light pattern (18 ', 20') along of the second rail section emits the second control signal to the integrator (34) in such a way that its Output signal (34 ') changes in the opposite direction, and that the output signal (34 ') of the integrator (34) in the generation of the light pattern (18', 20 ') along a of the raster lines (18, 20) of the cathode ray tube is used as the beam width control voltage. 8. Display device according to one of claims 1 to 6 with a cathode ray tube, in which the first device deflects the beam of the cathode ray tube along raster lines which run parallel to the parallel ϊ tracks, characterized in that I that a shift register (117) is provided which one to the output of the scanner (114) | connected input and several outputs at which successively obtained scanning signals occur simultaneously, Η that a first divider circuit (r 1, r2, r3) and a second divider circuit (r Γ, r2 ', r3') are provided, | whose inputs are connected to the outputs of the shift register (117), and those to their outputs | Emit signals which are each determined by a first and a second pair of scanning signals and represent predetermined fractions of the amplitudes of the sampled signal, that the outputs of the divider circuits (r ", r 2 \ r3 '; r Γ, r 2', r3 ') each drive one input of several Kumparators (130, 132, 134, 136), the second inputs of which come from the output of a deflection device (138 ) are controlled, which supplied a sawtooth voltage for deflecting the electron beam of the cathode ray tube (111), that each comparator (13C, 132,134,136) then generates an output signal at its output when the ^! Sägezahüspaanung reaches the voltage value of the signal supplied by the divider circuit at the other input and that the output signals of the comparators (130, 132, 134, 136) via gate stages (152, 154, 160, 166 and 142, 144) a control grid (163) of the cathode ray tube (111) in generating the light pattern in this way control that the curve shape shown has a smooth-appearing edgeL