DE2806099A1 - SEMICONDUCTOR ASSEMBLY - Google Patents

Description

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the ceramic block as well as the metal base under the block becomes the Thermal resistance reduced to a considerable extent due to the packing.

Background of the invention

The invention relates to semiconductor devices, and more particularly to the common Assembly of high performance equipment in a single assembly.

In the past, semiconductor devices have been package assembled by placing the transistor chip on a single piece of dielectric material, such as beryllium ceramic, to electrically isolate the chip from the package base, which is typically copper. As the performance requirements increase, so does the transistor chip size. Since the prior art uses a single ceramic substrate onto which the silicon chip is placed, the thermal path runs through the silicon chip, through the ceramic and the part to which the ceramic is soldered, either a copper stump or a copper flange. The thickness of the ceramic is controlled by the difference in the expansion rates of the ceramic and the copper soldered to it. These two materials expand at significantly different rates. If the assembly gets hot during the soldering process, the ceramic will tend to crack. This limits the size of the soldering surface and the ceramic thickness. It is therefore desirable to keep the soldering area small and the ceramic as thick as possible in order to reduce the risk of breakage or cracking. As the transistor chips get larger in order to obtain higher output power, it requires a large soldering area, so that the possibility of cracks increases.

It is also desirable to make the ceramic block as thin as possible because it provides a resistive path for heat to flow from the device. The base material underneath the ceramic was also used for structural rigidity

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made fat. It is therefore desirable to adjust the thickness of the base material to reduce in order to further reduce the thermal resistance.

Summary of the invention

The most important object of the invention is to provide an improved semiconductor assembly available for the assembly of high-performance semiconductor components close.

In short, the invention consists of a semiconductor package, at wherein a plurality of semiconductor dies are separately attached to a plurality of dielectric blocks. The blocks are then placed on a metal base set, which can be provided with individual recesses or cavities to accommodate the blocks and to locate them soldered to the base. The separated semiconductor wafers are wired with lead wires that connect to the semiconductor circuit.

Since the platelets have a small area, they can be made very thin, without the risk of cracks occurring during the assembly soldering process.

According to one aspect of the invention, there are cavities or recesses in the base provided that reduce the metal thickness under the platelets, so that the thermal resistance is reduced, so that the power capacity of the whole Unit is increased.

Since the platelet is very small, it causes the difference to be temric Strain rates of metal base and platelet do not imply that the platelet jumps.

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These and other objects, features and advantages of the invention will become apparent from the following description of FIG. 1 in the drawing illustrated embodiments; show it:

Figure 1 is a plan view of a known transistor assembly;

FIG. 2 shows a section along the line 2-2 in FIG. 1;

FIG. 3 shows a plan view of a first embodiment of the invention;

FIG. 4 shows a section along the line 4-4 in FIG. 3;

FIG. 5 is a plan view of a second embodiment of the invention; and

FIG. 6 shows a section along the line 6-6 in FIG.

A known power transistor assembly is shown in FIGS. In known devices, a ceramic block 10 is provided with a conductive surface 12 which is metallized on a first surface, and a conductive surface 14 metallized on the opposite surface. The plate is then soldered to a copper base 16, which acts as a heat dissipation. A transistor plate 18 is conductive Surface 14 soldered. Typically, the body of the die 18 is the collector region of the transistor and the collector then comes in electrical Contact with the metallized surface 14. Lead connecting wires connect the emitter and base of the plate 18 to input and output pads, which are not shown.

In Figure 3, a semiconductor assembly is shown according to the invention is constructed. A conductive support 20 is provided which can be made from copper. The carrier is with several recesses or hollow

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clear 22, 24, 26 provided. Multiple ceramic blocks 28, 30, 32 are provided, their dimensions are chosen so that they fit into the respective recesses 22, 24, 26. Each block has one conductive layer 34 on one side and a second conductive

Layer 36 on the opposite side. The blocks are inserted into the recesses and on the carrier by a soldering process 20 attached, in which the conductive layer 34 is soldered to the base 20.

The transistor plates 38, 40, 42 are each to the second conductive Layer of blocks soldered on, such as layer 36 of block 28. Connecting wires (not shown) are on input and output pads attached and connected to corresponding base and emitter leads on the platelets 38, 40, 42, namely according to known method.

In Figures 5 and 6, a second embodiment of the invention is shown. A copper base 50 is provided into which recesses or cavities 52, 54, 56 and 58 are cut.

Individual blocks 60, 62, 64 are provided and of such a size cut so that they fit into the recesses 52, 54 and 56, respectively. The lower sides of the blocks are connected to the base 50. These blocks each carry a semiconductor die 70, 72, 74 attached to the top the platelets are bonded. The block 68 carries individual capacitive elements 76, 78, 80, which the semiconductor circuits 70, 72 and are associated.

A ceramic ring 82, the lower side of which is bonded to the base 50, surrounds the semiconductor circuit elements just described. Of the Ceramic ring 82 offers an opening 84, which is a wall of a housing Forms receptacle for the semiconductor elements, with space for the supply line

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Connection wires are left that connect the various elements connect according to known techniques. The ceramic ring 82 also forms an insulating support for the base and collector pads 86 and 88 respectively bonded to the top of the ring. These pads are each shown as one piece to which the Input or output connection led v / ürde. It should be noted that separate individual circuits to the assembly could be united if this technique is used but three pads are plated (as shown by broken lines) instead of the single pad shown in 86 and 88. This would result in three separate circuits, corresponding to the three Semiconductor wafers and the three capacitors.

The transistor assembly according to FIGS. 5 and 6 is particularly useful for the assembly of assemblies according to the earlier application P 28 OO 304.5 of the applicant. In this older application there is a semiconductor assembly described, which should contain two individual transistors in such a way that they can be connected externally in a push-pull circuit. The two transistors each have an input and an output pad and are molded on the same dielectric sheet. the Transistors share a common ground plane and are wired in either an emitter or a base circuit.

The assembly according to the invention is easy to assemble in this to adapt the circuit described earlier. For this purpose the output pad 86 would be metallized in two separate parts. Similarly, the input pad 88 would be metallized in two separate parts. The connecting wires would then work in the same way bonded as explained in the older application. For example, connection wires 90 would be from input pad 88 for a basic circuit

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bonded to one electrode of the capacitor 80, and then to the emitter of the semiconductor 74. Finally, the base of the semiconductor 74 would via wire 94 to the other electrode of the capacitor 80 and likewise connected to a suitable earth plane, for example the copper carrier 50. All these connections are not shown in FIG. to simplify the drawing. There are many different types of circuit wiring used by those skilled in the art can, and the invention is not limited to any particular circuit.

In both preferred embodiments, the copper is recessed or cavities cut to hold the blocks. This makes it possible for the base material to be thick enough is made to be structurally strong while the material in the cavities under each block is thin to lower the thermal resistance. It should be noted that the cavities or recesses are not required for the practice of the invention, and that the blocks can be bonded to a flat piece of copper. In the embodiment of Figures 5 and 6, the copper base 50 can still be very thin be made because the Keranrik ring 80 has sufficient structural strength for the base to which it is bonded.

L e rs e i t e

Claims (4)

2808Π99 Vl P472 D claims 1. A semiconductor assembly with a metal support, characterized in that a plurality of semiconductor wafers are attached separately to a plurality of dielectric blocks which in turn are attached to the metal support. 2. Assembly according to claim 1, characterized in that the dielectric blocks are arranged in adapted recesses in the metal support. 3. An assembly according to claim 1 or 2, characterized in that a dielectric ring surrounding the semiconductor wafers and dielectric blocks is attached to the metallic support. 4. An assembly according to claim 3, characterized in that metal pads are arranged on the dielectric ring, which are connected with connecting wires to the semiconductor wafer. m..34 / 06/5