DE2758218A1 - ELECTRONIC CASH REGISTER - Google Patents

Description

PATtN ADVERTISERS

A. GRÜNECKER H. KINKELDEY

WT STOCKMAIR K. SCHUMANN R. H. JAKOB

«PL INO

G. BEZOLD

DR PER MAT DlPt. -CMEI ¹ /

CASIO COMPUTER CO., LTD. 6-1, 2-chome, Nishishinjuku Shinjuku-ku
Tokyo / Japan

8 MUNICH 22

MAXIUILIANSrRASSE 43

Dec. 27, 1977 P 12

Electronic cash register

The present invention relates to an electronic cash register that includes a time counting function and
automatically calculates data in a predetermined time, such as total sales, item quantity and the like.

Commonly used in an electronic cash register is for everyone If an amount was entered via an input keyboard, a department key corresponding to the one is then entered Department to which the sold goods belong, operated. The entered data is processed, sorted and accumulative stored in storage devices that are used to add up

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TELEPHONE (OSO) 93 3863 Telex OB-aeaeo TELEQRAMS MONAPTH TELECOPER

the sales amounts and the item quantities are established for each department, as well as the total amount for
the day concerned and the total sales for each employee. At the end of the working day, the cash register is put into a reset operating state in order to successively print out the various data stored in the corresponding memories, and then are
this memory is deleted. This sorted sales data
v / earth used for management purposes. For this reason, it is advantageous that the sales data are detailed in
compact form are correct.

Since conventional cash registers are not equipped with a timer function, they can only monitor sales add up one day so that the data received are insufficient for these purposes. If you look at the sales situation in knows certain time periods of a day, e.g. morning, afternoon and evening, this data is more efficient and more useful to management.

If the time function is also extended to years, months, weeks and days, an operator can set the time period for the entire amount formation in advance, for example to a week, a month, or a period of two
Days or the like. Accordingly, the aggregation can be carried out automatically for a period longer than one day
resulting in a significant improvement in the cash register's total billing.

In a conventional cash register, the operator must enter the dates, such as the year, month and
Key in the day at the beginning of each working day for the receipt slip issue. This work is complex.

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It is a primary object of the invention to provide an electronic To create a cash register that is able to automatically collect sales data within a given period of time to be added together, with suitable time ranges being preset.

For this purpose, an electronic cash register will be created, which is characterized in that an input device with xien at least one input keyboard for inputting numerical Values and registration determination keys are provided for registering the respective goods, which further department keys to identify the departments for the corresponding goods, a total key for setting a time range for totaling, a time setting button and a control switch for selective setting of a desired mode of operation, such as presetting, registering, resetting, comprises that a first Memory means for storing numerical data entered through the input keyboard is provided, that a second memory device is provided which has a plurality of memory areas which correspond to the department keys and which, when a department key is pressed, in the memory area corresponding to this key accumulatively stores the numerical data such as the item quantity that a timer circuit is provided for Setting a time in response to an input operation of the time set key, the set time being the starting time for subsequent time counting operations that a Third storage means is provided for storing time data relating to time ranges in response to a Actuation of the grand total key, that an assessment device is provided in which the in the third memory device stored time data is compared with the time number data in the timer circuit after goods have been sold

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to assess the time range in which the sale of goods has taken place that a computing device is provided for performing arithmetic operations, including a total formation of the amounts of goods sold in accordance with the assessment that a fourth storage device is provided which has multiple addresses and which is addressed by the assessment result and the Saves the calculation result in the addressed memory section, and that printing means for printing out the contents of the fourth memory means in the reset mode is provided.

With this facility, the aggregation of the sales data within the preset time range can be carried out automatically executed if the time range for the total sum is preset. Accordingly, the sale can s conditions are dimensioned within a desired time range in such a way that more detailed numerical material is processed Can be, including change of operators, delivery of goods and the like. What for the monitoring of Goods and other activities is useful. If the time counting function is still extended to months and days, the data can be printed out when issuing receipts without pre-setting the respective date.

In the following an embodiment of the invention is explained in more detail with reference to the drawing. Show it:

1 shows a keyboard of an electronic cash register,

2A and 2B together are a block diagram of the entire cash register;

3A is a circuit diagram of the circuit diagram of FIG Fig. 2 central unit used,

Fig. 3B is a circuit diagram showing a memory circuit and shows a timer circuit according to FIG. 2,

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Pig. A- a memory overview of the memory circuit,

FIGS. 5A and 5B memory maps of the memory in FIG Timer circuit,

6A and 6B are a flow chart illustrating the operation of the circuit in time counting;

Fig. 7 is a data overview of the in the memory of the timer circuit stored data,

Figs. 8A to 8C show data stored in the memory and the register in time counting, and Figs

FIGS. 9A and 9B are a schematic representation for illustrative purposes the printing of consecutive numbers and dates.

Fig. 1 shows the arrangement of a keyboard 10 of an electronic cash register (ECR). Numeral 11 denotes amount keys for entering numerical values such as price and quantity of goods, 12 denotes a department key for registering goods by group, 13 denotes a clear key for clearing numerical data entered from the amount keyboard. A function keyboard provided with the reference symbol consists of individual keys that represent a non-addition C 4h ) for providing the preselected time, as well as a space key (Vo), a multiplication key (<§)), a percent key (%), and (+) - and (-) buttons, which are used to display the increase or decrease of the percentage. Numeral 15 denotes an employee key for inputting the responsible person. A sales keyboard 16 includes individual keys each representing receipt (Rc), disbursement (Pd), total net (Nt), balance sheet (Bl), no sale (NS), credit (Cr) and debit (Ch). Numeral 17 denotes a subtotal key (ST) for obtaining intermediate results in a calculation process. A balance key 10 (Ca / AMT) is used

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zvir issue of a receipt used to calculate the total "amount and / or receive the change amount. A time key 19 is used to provide the time. 19a an operating key for providing an operating time segment. 19b becomes a time range of totaling provided. 19c denotes an alarm key (AL) for providing an alarm time. The x buttons 19a to 19c represent the time keyboard 19. ELn control lock 20 can be switched over to the operating states (OPP), (Pr), (REG), (X) and (Z). The operational status (OPP) is used when the electronic cash register is out of order is; the operating state (Pr) is used to preset data, the state (REG) is used in normal registration used, the operating state (X) is used for read operations without losing stored data; the operating state (Z) is used for resetting in order to delete data after the stored data have been read out are.

The following description relates to the internal configuration of the electronic cash register according to the present invention. Reference numeral 31 denotes an input / Output control (I / O) that controls the keyboard 10 and a printer part 33. The I / O controller 31 controls the keyboard 10 to a scanning signal. When a key on the keyboard 10 is operated, the scanning signal in response to the Key actuation selected and supplied to the I / O controller 31 as a key input signal. After receiving the key input signal from the keyboard, the I / O controller 31 loads the key input signal into an input buffer register (not shown), to temporarily store it here. The printer section 33 comprises a receipt printer 36 and a single strip printer 37. The printers 36 and 37 are equipped with pressure rollers 38 and 39 which are arranged coaxially and on their Surfaces have numeric characters. A receipt strip 41 and a single strip 42 are tightly attached to the print

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rollers 38 and 39, respectively, are arranged. Opposite the printing rollers 38 and 39 with the receipt strip 41 and the individual strip, printing hammers are arranged, in front of which sieve. Ribbons (not shown) are located. A printing position detection circuit is arranged at one end of the printing roller 33 and detects the printing position of the printing rollers 33 and 39 at certain angles of rotation of the rollers in order to emit detection signals. The detector signals are supplied to the I / O controller 31 via an amplifier 45. When the print position detection signal and the print data coincide, the I / O controller 31 sends a drive signal through a driver 35 to the print hammer facing the print type at that time to drive the hammer. When the printing rollers 38 and 39 complete one revolution, the printing of one line is completed and the receipt slip 41 and the individual strip 42 are advanced by one line. As printing proceeds, the receipt slip 41 is led out so that the printed portion can be torn off after the printing process is completed. For example, your receipt - Thank you ^{11 may be} printed on the receipt sheet 41. The same print data that is printed on the receipt sheet 41 is recorded on the individual sheet 42, which is picked up by a shaft 46, to add to the net total A storage unit 47 and a timer circuit 38 are connected to the central unit 3. A supply source 49 is connected to both the storage unit 47 and to the timer circuit 48 in order to keep them always ready for operation Reference frequency oscillator, which may be, for example, a crystal oscillator 50. The memory 47 and the timer circuit 48 are formed on a single chip. The central processing unit y \ generates a chip enable signal CE1 to specify the memory circuit 47 and another Chip select signal CE2 to specify timer circuit 48. On

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Write / read signal R / W from memory 47 denotes the Read or write operation of the memory unit 47. The timer circuit supplies time data and day data which are read out by the central unit 34, if necessary is. When a receipt is issued, the central unit reads the day information from the timer circuit 38 to cause the printer part to print the day on the issued receipt. The time data is called time stamp data used if a total sum is carried out at a given point in time. The central unit 34 performs the receipt slip output in response to a key input signal from the keyboard. At this point in time, the processing data are used as print data for the I / O controller 31 and a display section 24 via a display driver 51 where they are made visible.

Figures 3A and 3B together illustrate the details of the central processing unit 34, the storage unit 47 and the timer circuit 48. First, the central processing unit 34 will be explained. An address circuit 31 specifies the address of a control part 62. The control part 62 comprises a microprogram in order to control the operations of the corresponding circuit parts. That Microprogram is stored in read-only memory (ROM). The control part comprises output lines 63 to 66. The output line 63 supplies a code generator command; the output line 64 a given timing signal; the output line 65 various commands, e.g. a register specification signal, a transmission command, a digit shift command; and output line 66 provides the next Address itself. The code generator command from the output line 63 is transmitted to a code generator circuit 67. A timing signal from the output line 64 is provided to a timing circuit 68. The commands from the output line 65 are transmitted to a command decoder 69. The next address output on line 66 is sent to a

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Transfer address circuit 61 to set the next address. A timing signal from a timing signal generator 80, which is provided in the central processing unit 34, is sent to the code generator circuit 67, the timer circuit 68 and the command decoder 69 given. The code generator circuit 67 converts four bits "existing" given a timing parallel data, which are output from the control part 62, for example, into a serial code. The exit the code generator circuit 67 is fed to an addition / subtraction circuit 71 via a gate circuit 70. The timer circuit 68 sets the time control of the operation of the registers, as well as their digit handling in accordance with the Timer signal, which via the output line 64 of the control part 62 is supplied. The output signals are sent to the corresponding gate circuits as enable or disable signals within the central unit 34, for example to the gate circuit 70 and the AND gates 72 and 75. The Outputs of the UITD gates 72 and 75 are via OR gates 76 is passed to an input / output register 78a within register group 77. The instruction decoder 67 decodes one of the command given to the control part 62 in order to control the activities in the corresponding parts of the central unit 34, E.g. the determination of the registers within the register group 77 »and it issues a read / write command to the memory 47 and the timer circuit 48. The outputs of the timer circuit 68 and the instruction register 69 are sent as control signals to the display driver 51 and to the I / O controller tion 31. Register group 77 comprises the X register as input / output registers 78a, as well as other registers 78b to 78n »which are labeled Y to N. The outcome of the Register group 77 is connected to an adder / subtractor 71 over an OR gate 70 connected. The output of the X register 78a is fed to an AND gate 72 via a circuit 79a, the circuit 79a being a memory with the capacity of a Digit is. The output of the adder / subtracter 71

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Was the UKD element? '* · z ^ slait-st »The key input signal from the keyboard 10 is fed to the AND element 74 via the I / O control 31. The data from the memory 47 and the timer The decoded data coming from circuit 48 are passed to the AND gate 75. The output signals of the registers X to N 78b to 78n are passed through registers 79b to 79n to gate circuits 81b to 81n, the registers 79b to 79n each having a storage capacity of one digit The output of the adder / subtracter 71 is also fed to the gate circuits 81b to 8in. The outputs of the gate circuits 81b to 8in are fed to the X to N registers 78b to 78n. The outputs of the X register 78a are used as display data or Print data are supplied to the display driver 51 and the I / O controller 31 and a chip selection circuit 82. In response to an instruction given from the control part 72, the chip selection circuit 82 reads the chip selection data in the X register 78a and generates the chip enable signals CE1 and CE2 according to the contents of the register in order to thereby control the memory 47 or the timer circuit 48. The outputs of the adder / subtracter 71 are loaded into the A register 83 for addressing. The data decoded by the A register 83 is given to the adder / subtracter 71 through the gate circuit 70 and divided into two addresses; an address RA represents a row address and an address CA represents a column address. These addresses are supplied to the memory 47 and the timer circuit 48. Data and carry signals output from the adding / subtracting circuit 71 are supplied to a judging circuit. The judging circuit 84 judges whether the data or the carry from the circuit 71 is present or not, and passes the result of the judgment to the address circuit 61. At this time, the successor address is output through the output line 66, and the detection signal is logically summed up so that the next address is changed.

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The storage circuit 47 includes a storage unit 91 and an address determination circuit 92 into which the read / Write command R / W from your command decoder 69, and the row and column addresses are loaded from A register 83. The address determination circuit 92 and the gate circuit 93 are enabled by the chip enable signal CS1 output by the chip select circuit 82. the read out from the memory unit 91 via the gate circuit 93 Data becomes your AND gate 75 of the central unit 3 ^ · as already mentioned above. The output of the X register 78a in the central processing unit 34 is called Write data is passed to the memory unit 91 via a gate circuit 93. The storage unit 91 has a capacity of nx8 as shown in FIG. The columns B1 to B8 are determined by the column address CA, while the rows 1 to η are determined by the row address RA. The storage unit 91 is in three sections divided; a first section 91A comprises columns B1 to B4, a second section 91B comprises columns B5 and B6, and a third section 91C comprises columns B7 to B8. In the first section 91A store the first through sixteenth address the department total corresponding to department key 12. The seventeenth address stores the total sales between times T1 and T2. the eighteenth address stores the total sales in the specified time range between T2 and T3. The nineteenth Address saves the total sales in the time range between times T3 and T4. At the twentieth address the total amount received is saved. This memory area is thus used as a time-related total sales memory area designated. In the second area, the item count is stored under addresses 1 to 16. The sales counts between the specified times T1 and T2, T2 and T3, and T3 and T4 are in the memory area stored under addresses 17 to 19. The reception

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count is stored in the twentieth address. Preset Item prices in the appropriate departments are at the first through sixteenth address within of section 91C is stored.

According to Pig. 3B is the timer circuit 48 with a memory 100, which is used to store the day data, the current time data and preselected time data and the like. The memory 100 is determined by the addresses RA and CA of the rows and columns in the address determining circuit 101 via the A register 83 addressed in the central processing unit 34, and the Read and write operations are effected by R / W commands supplied from command decoder 69. A The control section 110 of the timer circuit 48 carries an address code signal and the R / W command to the address determination circuit 101 for addressing the memory 100. The from the Data applied to the memory 100 are sent via a gate circuit 102 to a buffer register 103 and to a gate circuit 104 given. The output of the buffer register 103 »as well as a one-second clock pulse from the pulse generator 105 are fed to the gate circuit 104. The pulse generator 105 works as a function of a crystal oscillator 50 and generates a timer signal in addition to the one-second pulse, which controls the timing of the operation of the respective parts in the control part 110. The gate circuit 104 selects and carries out an input signal in accordance with a control signal from the clock control part 110 the adding / subtracting circuit 106 to. The adding / subtracting circuit 106 performs in accordance with one of the control part command issued by an addition or subtraction and forwards the result of the calculation as write data via the Gate circuit 10? to the memory 100. The data and the carry-over of the calculation result obtained from the adding / subtracting circuit 106 is outputted to the judgment circuit 108 to assess the memory status of, for example, 60 or 24 size and time matches. That

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Result of the assessment by the assessment circuit 108 is passed to the clock control part 102, which in turn provides a control signal for the next processing on the basis of the judgment result is generated. The data read out from the memory 100 are transmitted via a gate circuit 109 given to the UlTD link 75 in the central unit. The gate circuits 107 and 109 and the addressing circuit 101 are activated by the chip enable signal CE2 enabled by chip select circuit 82. The gate circuits 102, 104, 107 and the adding / subtracting circuit 106, as well as the judging circuit 108 are through a signal output from the clock control part is controlled. The gate circuit 107 is activated by the chip enable signal CE2 and the signal from the clock control part 110 are controlled. The memory 100 has a storage capacity of four Rows by eight columns, for example in Pig. 5A au see is. The corresponding columns B1 to B8 are identified by the column address CA, while the corresponding Rows are identified by the row address signal RA. Rows 1 to 3 store time data such as Hours and minutes for two columns each, i.e. B8-B7 »B6-B5, B4-B3, and B2-B1. In addition, time data for clearly defined totaling T01 to T04 in the stored in the first row. Time data AL1 to AIA are stored in the second row, and time data for service time SV1 to SV4 · are stored in the third row. the Time data T1 to T4- define the total time range; the Time data AL1 to AIA define an alarm time, and the time data SV1 to SVA define the service time of one Discount and the like In the fourth row, columns B8 to B7 store flag 1 and flag 2 to match indicate between the current time and the specified time; columns B6 to B4 store the year Month and day of the relevant date; the columns B3 to 31 the hour, minute and second of the current time. In the memory location of the fourth row under column B7

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of memory 100 sum storing Plag 2, a binary "1" is stored in the first bit b1 when the current time is between T1 and T2, while a "1 ¹¹ " is stored in the second bit b2 when the current time is between T2 ^{and T3; an 11} I ^{11 is} stored in the third bit b3 if the current time is between T3 and T4.

In operation, the timer circuit 48 operates as required a reference signal supplied by the crystal oscillator 50 will. The reference signal output from the crystal oscillator 50 is applied to the pulse generator 150, which the One-second pulse and various timer pulses are generated. The one-second pulse of the pulser 105 becomes fed to the adding / subtracting circuit via the gate circuit 104. The control part 110 sets the row address RA = 4 to define the fourth row of the memory 100 and reads the content of the memory location addressed in the memory 100 via a gate circuit 102 in order to then load it into the buffer register 103. The gate 104 selects and executes the output of buffer register 103 and the one-second pulse from pulse generator 105 the adding / subtracting circuit 106 to thereby add the one-second pulse to the second data of the column B1 add. The output signal of the adder / subtracter 106 is fed through the gate 107 to the memory 100 and in the fourth row inscribed. In this way, the contents of the fourth row of the memory 100 are always "refreshed". The output of the adder / subtracter 106 is fed to the judging circuit 104, where judged whether or not the result of the addition reaches a predetermined Vert is determined and the judgment result is determined the control operation in the clock control part. In particular, if the addition of the second impulse is equal to B1 the fourth column is reached, i.e., if the number of seconds reaches the value 60, this condition is

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circuit 108 detected, and the clock control section adds a "1" on the content of column B2 of the fourth row, i.e. on the minute amount, while at the same time the seconds amount is deleted. Subsequently, a similar operation of the carry control is repeated to adjust the setting for minutes, hours, months and years to meet. When initially setting the timer circuit 4-8, you must The date and time must be set correctly. When setting the control switch 20 in Fig. 1 is set to Pr, and here the amount key 11 is operated accordingly to the sizes for the year, the month, the day, the hour, the To specify the minute and the second. In this case, the non-addition key "- #" is depressed every time data is entered into the electronic cash register. The by pressing the appropriate key via Input data entered on the keyboard 10 are passed to the central processing unit 34 via the I / O control 31, where they via the AND gate 74 and the OR gate shown in FIG 76 can be entered into the X register 78a. The one in that Input data stored in X registers 78a is transferred to the timer circuit 48 where it is placed in the intermediate sections the fourth row of columns B6 to B1 are loaded via a gate circuit 107. Be that way the data and the time data are loaded into the memory 100 of the timer circuit 48, and after finally the Loading of the seconds amount is completed, the above-mentioned timing operation is carried out.

When the time data for time totaling, the time data for the service time and the time data for the alarm time are written in the memory 100, this is done by using the amount key 11, the T _Q key 19b, the SV key 19a and the AL Button 19c accomplished. If, for example, the time date for the hour is entered using the amount key 11

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enter the minute amount using the T ~ key 19b. After actuation of the T _Q key 19b, the time sequence specifying the date "1" is entered through the amount key 11 to address the area of the first row in columns B7 and B8, so that the hour and minute of the time date T1 loaded in here. If the above operation is performed using the SV keys 19a instead of the T _Q key 19b, the time data for the service time is loaded into the memory 100 in sections of the third row under the columns B7 and 38. The actuation of the AL key 19c writes the time data for an alarm in the sections of the second row under columns B7 and B8.

To load the specified department data, the amount key 11 and the department key 12 are printed, with the Control switch 20 is switched to the position Pr. Here, the key input data is stored in the storage unit 47 brought via the X register 78a. In the memory 47 are the Key input data written at the first to sixteenth addresses in the third area of the storage unit 91, what is done via the gate circuit 93.

When processing the sales of goods, the control switch 20 is set to REG, and the item prices of the sales goods are entered using the amount key 11. then that department key 12 is actuated, which by the printer part 33 on the receipt strip 41 or the individual strip 42 is printed out. At the same time, the input data are displayed on the display 24, to which the input data via the central processing unit 34 and the display driver 51, and the data is stored in the central processing unit 34 · accumulated. Continue to be from memory 47 Data that corresponds to that specified by the department key 12 Address accordingly, read out after the central unit 36,

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where they are added to the input data, and the result of the addition is stored at the specified address in the Storage unit 4-7 inscribed. Now the price is increasing is added to a certain row of the first area 91A, and the item or article count is based on a specific Row of the second area 91b added up. In this way the operation becomes similar to the above by pressing the amount key 11 and the department key 12 for each item sold repeatedly. If the prices of all goods sold have been entered and the department has been specified, so the balance key 18 is actuated to issue a receipt with the total amount and / or the change amount. The total amount thus received by the central unit 34- is made visible in the display part 24 · and fed via the I / O control 31 to the printer part 33, where it is printed on the Individual strips 4-2 and the receipt strips 4-3 are printed out will. When editing using the department preset key for each department in the above If the prices of the goods are not entered, the process described above is carried out in a similar manner carried out, with the input data of the preset data of that address which corresponds to the department key 12 by only the department key is operated.

The operation of the timed totalization should be based on; 1 to 8 will be described. If data relating to goods sold are entered, so the key input signal is passed on via the I / O controller 31 to the central processing unit 34 and in the register 78a set. Then the balance key 18 is actuated so that the data in the X register 78a is transferred to the Y register 78b, as shown in Fig. 6A at step a. The data flow takes place at this point in time in such a way that the

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the X register 78a flowing through the gate 70, the Adder / subtracter 71 "and gate 81b into the Y register 78b arrive. In the next step b, the control part reads the chip-determining data to the memory 100 in the Set the timer circuit 48 and load this value into given digits of the X register 78a. The control part 62 gives an operation command to the chip selection circuit 82. After receiving the operation command, the chip selection circuit reads 82 extracts and generates the chip-determining data from a given digit position of the X register 78a the chip enable signal CE2 to specify the memory 100. Thereafter, the control section 62 generates addresses RA = 4 and CA = B7 to subdivide the intermediate section of the fourth row to define the columns B7 of the memory 100. The addresses are serialized by the code generator circuit 67 Codes are converted, and then the converted code is supplied to the adding / subtracting circuit 71 through the gate 70. The addresses RA and CA output from the adder / subtracter 71 are input to the A register 43, where they are converted into parallel data, which in turn is sent to the addressing circuit 101 within the timer circuit be forwarded. A read command from the control part 62 is set in the command decoder 69 in the latter. That means, the chip enable signal CE2 specifies the timer circuit 48, and the Plag 2 addresses the memory 100. By addressing in step b, the flag 2, which is shown in the location of the fourth row and column B? (4, B7) of the memory 100 is stored, read out, and the readout signal is via the AND gate 75 and the OR gate 76 transferred to the X register 78a. If the current time is read from memory 100 into buffer register 103, so the timer circuit 48 successively reads the time data of the temporal totaling T1 to T4 from the memory 100 and carries it out via the gate 104 of the add / subtract

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Circuit 1C6 see below, u; u diess D-it'aii compare them to the current time stored in d.ea Pui'ft ster 103. The comparison result is fed to the judgment circuit 108. In the judgment circuit 108, the service time, ie T1 to T2, T2 to T3 or T3 to T4, to which the current time belongs, is looked up, and the binary number "1" is stored in the corresponding bit of the flag 2 memory location b1 to b3 of the memory 100 is loaded.

Assume that the time T1 is at 10 a.m., T2 at 12 p.m., T3 is preset to 2:00 p.m. and T4 to 5:00 p.m., so that under these circumstances the receipt slip at 10.30 a.m. is dispensed by depressing button 18. As described above, the memory location becomes M (4, B7) of the memory 100 is addressed and the content of flag 2 is read from memory 100 into output register 78a. The current time 10.30 a.m. falls in the time range T1 to T2, i.e. 10.00 a.m. to 12.00 p.m., and the binary "1" is in the first bit b1 of flag 2 is written so that flag 2 has the value "0001". As can be seen in step c of Fig. 6, the content "0001" of the flag 2 read in the register 78a to the judgment circuit 84 through the gate 70 and passed to adder / subtracter 71. The assessment circuit determines whether or not any of the bits of flag 2 contains "1" as shown in step d. is the result of the assessment is NO, i.e. if the current time does not fall within the time ranges, the total time is calculated not carried out and the receipt is issued immediately. If the assessment is YES, i.e. the current one When time falls within one of the time ranges, the process proceeds to step e in FIG. Initiated in this step the control section 62 controls the chip determination circuit 82 to generate a chip enable signal CE1 and addresses the Storage unit 47 to one of the addresses 17 to 19 according to the Address the contents of flag 2. In this case the

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current time in the time range 'J? 1 to T2, so that the seventeenth address of the memory unit 47 is determined. The transition to step f in FIG. 6A then takes place. The contents of M (RA, CA), for example the article number "20" in the time range between T1 and T2 and the intermediate amount "¥ 13,200" in the same range, are then read out into the X register 78a. The content of “¥ 13,200” in the X register 78a and the sales data, for example “¥ 700” stored in the Y register 78b, are supplied to the adding / subtracting circuit 71 via the gate circuit 70. In the circuit 71 these values are added. Furthermore, the article number "20" in the time range T1 to T2 is supplied to the adding / subtracting circuit 71, where it is subjected to a "+1" operation. Thereafter, the total amount "¥ 13,900" is stored in the time range _# T1 to T2 and the article number "21" in the same time range at the seventeenth address of the memory unit 47.

The sequence of step e according to FIG. 6A is shown in detail in FIG. 6B. In step el, it is determined whether or not "1" is present in the first bit b1, that is to say whether the content of flag 2 has the value 0001 or not. If a “1” is present in bit b1, step e2 loads the chip enable signal into X register 78 and, in addition, row address RA = 17 and column address CA = Bi are loaded into A register 83. If a "1" is not set in the bit b1 in step el, a step e3 is carried out to see whether the binary "1" is set in the second bit b2 or not. If the ¹¹ I "is set in the bit b2, a step e4 loads the chip enable signal CE1 into the X register 78a and sets the row address RA = 17 and the column address CA = BI in the A register 83. Is in If no "1" is stored in the bit b2 in step e3, a next step e5 is carried out, which loads the chip enable signal CE1 into the

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i-register 78a and the file address HA = 19 and the column address CA = BI in the Α address register 83.

Fig. 8B shows the Pall when the sales processing is at 11:50 am happens.

For example, if sales processing happens after 12:00 p.m. at 12:01 p.m., as shown in Fig. 8C, a total is made and a receipt is issued the memory locations in the eighteenth row under columns B6 to B1 of memory 100 are specified, since at this point in time the second bit b2 of flag 2 is set to "1" and therefore its content is "0010". Acts If this sale is the first after noon, the contents of the eighteenth row are under the columns B6 to B1 are all "0". Accordingly, the article number in the time range T2 to T3 is stored in the memory locations of the columns B6 to B1 and the eighteenth row with the total amount within the same time range, for example "3f 450", of the sales amount is loaded at this point in time. This is followed by the data aggregation with regard to the storage locations the eighteenth row under columns B5 to B1 of the memory 100 continued until time T3, i.e. 2:00 p.m.

After 2:00 p.m., the data relating to the locations in the nineteenth row under columns B6 through B1 through to Time T4, i.e. until 5 p.m. in this case, added together. In this case, the amount of money and the number of items become added up and the operation goes to step g. In this step, this sales data (the aforementioned Total amount) in the Y register 78b of the register group 77 is transferred to the X register 78a and then to the I / O controller 31 where the data is in the output buffer register (not shown) can be saved. The I / O

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Controller controls the printer section 33 based on the data stored in the output buffer register and prints out the data as shown in step h of FIG. In step h, the printing operation shown in Figs. 9A and 9B is performed in addition to printing out the data. At the end of the data printout, the successor number is printed out, as can be seen in step h1 of FIG. At this time, the microprogram read out from the control part 72 sets the chip designation data to specify the storage unit 4-7 and the X register 78a. Then, the microprogram of the control part 62 transmits an operation command to the CMp determination circuit 82. After receiving the operation program, the chip determination circuit 82 reads out the chip determining data from the X register? 8a to generate a chip enable signal CE1 and the memory unit 47 to be determined. Thereafter, the control section generates an address code to specify the memory locations of the seventeenth row and columns B8 and B9 of the memory unit 91. Thereafter, the address code is converted into a serial code by the code generator 67. The converted serial code is then passed to the adding / subtracting circuit 71 via the gate 70. The data output from the adding / subtracting circuit 71 is loaded into the A register 83, where it is converted into parallel data to be supplied to the addressing circuit 92. A read command fetched from the control section 62 by the command decoder 69 is provided in the addressing circuit 92. As a result, the content of the memory locations of the seventeenth row and the columns B8 and B7, ie the successor number, for example "34-00", is read out from the memory unit 91, and then the successor number is read out via the AND gate 75 and the OR gate 76 passed to X register 78a. The sequence number read out from the X register 78a is transferred to the output buffer register in the I / O controller 31 together with ¹¹ NO "as shown in Fig. 9A. The data in the

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Output buffer registers control the operation of the printer part 33, so that it has the successor number "KO 3400" on the Receipt prints out. The successor number "3400" from the X register 78a is read out, the adding / subtracting circuit 71, where it is increased by one. This addition gives the successor number the value "3401", which again into the memory locations of the seventeenth row and the columns BS and B7 within the memory unit 91 is loaded.

When the IT message number printing operation is completed, is the central unit 3 ^ a paper feed command to the I / O controller 31 · As a result, the paper is fed by N columns on the receipt as in step h2 in Fig. 9A is shown.

Thereafter, the CPU transmits YES- a stamp print command to the I / O controller 31 so that, as can be seen in step h.3 in Fig. 9A, "Your receipt - thank you" is printed out.

When the stamp printing is completed, the operation changes to the "data printout" state, so that the central processing unit 34 a chip determination for the timer circuit 48, as well as addressing the date for the memory 100. That is, the central unit 34 transmits a code that the The chip of the timer circuit 48 designates, i.e., the value "0010", to the X register 78a while simultaneously issuing an operation command to the chip determination circuit 82 through the control part 62. Subject receiving the operation order reads the chip designation circuit 82 extracts the chip designation code "0010" from the X register 78a and generates the chip selection signal CE2 to set the timer circuit 48 chip.

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iJau'-ca transfer -.-.- 3I 'oi ^ -u ^ r t, sil o2 the A.lr ^ 5 3J.-ii; eii durc'i o_L j Gate circuit 70 to the address register 83 and to the adder / Subtract circuit 71. The address data specifies the storage locations in the fourth row of columns B6, B5 and B4. The address data is transferred from the address register 83 to the Addressing circuit 101 in the timer circuit 48 is transmitted. In the address determining circuit 101, a read command set, which is fed from the control part via the command decoder. Hence the date becomes November 20, 1976 e.g. "76 11 20", read out from the memory locations of the fourth row of columns B6, B5 and B4- of memory 100, such as it can be seen at step h5 in Fig. 9B. The selected ones Data is transferred to the X register 78a through the gate 109, the AND gate 75 and the OR gate 76. That from the The data read out from X register 78a is transferred to the output buffer register in the I / O controller, along with the Segiaent code, as can be seen at step h.6 in Fig. 9B. The I / O controller 31 controls the printer part 33 according to the data stored in the output buffer register, to extract the data as shown in step h7 in Fig. 9B squeeze. The document issuing process takes place in the manner described above. The stamp expression "Your receipt - thank you nice "and the printing of data will be for the subsequent Receipt slip carried out. Referring to Fig. 9B, the document between the N-row spaced successor number and the Stamp print torn off. Therefore, the stamp printing and data printing are arranged in the upper part of the issued receipt.

In the embodiment explained above, by setting the control switch 20 to Pr and set by alternately pressing the amount key 11 and the non-adding key "#". However, year, month, day, Hours, minutes and seconds can be entered one after the other by pressing the amount key 11 and then the non-addition key operated for the same pulse. If the total time is set, hours and

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ORIGINAL

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! T * inu>: Hi fortlniVf iVnd ^r iber dio Bο Tx'-3rd row "st ⁰ .st; - ^ 11 Lxvrra gross, warden by the T ^ -LresaTiitsuiamsntaste I9b is pressed after that, notwithstanding the above? Example: Since the T _n total key 19b is provided separately, it can always be set, regardless of the state set by the control _{switch 20. If it is desired that the T n} total key 19b be replaced by another key, then the ST key 17 or another can be used on condition that the control switch 20 is switched to the state Pr, for example.

In the above embodiment, x / earths the sales amount and sales count within a predetermined time for each actuation the balance key 18 added up. However, this is the storage space for storing the total amount and the count provided for each department, the totaling can be carried out for each department. In this case it will the totaling is carried out each time the department key is pressed. In addition, since there are storage spaces for Saving the total amount and counts for each deal are provided, the total amount and the count for each transaction are added together will. In this case, an aggregation is carried out each time the terminate key 16 is actuated. Is beyond that Storage space is provided for storing the total amount and the counts for each employee key, so can be used for total sales and count for each employee within a given time. In this In this case, totaling is performed every time the register key such as the close key 16, the department key 12 or the subtotal key 17 be operated.

The amounts and the counts can not only be added up within a certain time, but also within the date will. In this case there are storage spaces

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intended to store the total amount and the counts of the predetermined date, each time a Registration takes place, the preset date is compared with your date of registration to determine the total amount and the count accumulated in a given memory location to save.

809828/0656

Claims (12)

PATENT ADVOCATES A. GRÜNECKER . ING 275821a W. STOCKMAIR Oh. ■ -ι - »-: ■ *" \ lT "> f, K. SCHUMANN P. H. JAKOB G. EiEZOLD DHREHN «-.- 8 MUNICH 22 MAXIMILIANSTRASSE 43 Dec. 27, 1977 P 12 / Claims (1.) Electronic cash register, characterized that an input device (10) with at least one input keyboard (11) for entering numerical Values and registration designation keys are provided for registering the respective goods, furthermore department keys (12) for identifying the departments for the corresponding goods, a grand total key (19b) for setting a time range for totaling, a time setting button (14) and a control switch (20) for selectively setting a desired mode of operation, such as presetting, registering, resetting, comprises that first storage means (100) for storing numerical data entered through the input keyboard (11), it is provided that the second storage device (47) is provided which has several memory areas which correspond to the department keys (12) *, and which when pressed a department key (12) in the memory area corresponding to this key accumulatively the numerical data, e.g. the amount of articles, stores that a timer circuit (48) is provided for setting a time in response to 809828/0656 ^0FtiGlNAL inspected <ο · ο) aaasea tclkx os-aeseo tilisrammk monapat tblecopier a singabeoperatioa of the time setting key, the setting time the start time for subsequent time counting operations is that a third memory device is provided for storing time ranges relating to Time data in response to a press of the grand total key (19c) that an assessment device (108) is provided in which the stored in the third storage device Time data are compared with the time counting data in the timer circuit (48) after goods have been sold, in order to to assess the time range in which the sale of goods has taken place that a computing device is provided for Carrying out arithmetic operations, including totaling the amounts sold in accordance with the assessment Amounts of goods that a fourth memory device is provided which has a plurality of addresses and which by the judgment result is addressed and the calculation result is stored in the addressed memory location, and that a Printer means (33) sum printing out the contents of the fourth Storage device is provided in the reset operating state. 2. Cash register according to claim 1, characterized in that that the fourth memory means comprises a memory area for storing the total amount and the count value, and that the total sum formation for each time range in the arithmetic unit for each actuation the registration determination key is performed, calculations the item count and total sales amount. 3. Cash register according to claim 2, characterized in that the registration determination key has a balance key (18), and that each time the balance key (18) is pressed, a totaling of the Total sales amount and item counts for each time 809828/0656 area is carried out in the computing device and the result of the calculation in the fourth storage device is saved. 4. Cash register according to claim 1, characterized in that indicates that the registration designation keys Terminating keys (16) comprise that the fourth memory device comprises memory areas for storing the Final counts and the total, which correspond to the final keys (16), and that each time one is pressed Completion key (16) the final count and the total amount in the memory area of the fourth memory device Loaded according to the key pressed. 5. Cash register according to claim 1, characterized. marked that the fourth memory device comprises memory areas for storing the article count and the department total for each time range corresponding to the department key, and that each time the department keys (12) are pressed, the article count and the department total can be loaded into the memory area corresponding to the key pressed. 6. Cash register according to claim 1, characterized in that the time setting is a Includes key switches, and that the time setting for the timer circuit (48) is carried out by combining the Amount keys and this key switch. 7. Cash register according to claim 1, characterized in that that the timing circuit (48) has a crystal oscillator (30) for providing a reference signal includes that a pulse generator is provided for frequency dividing the reference signal emitted by the crystal oscillator, that a computing device is provided for 809828/0656 consecutive and additive time counting by the pulse generator output pulse signals, and that a memory device is provided for storing the time data, the supplied by the computing device, as well as a control device for the time counting process of the timer circuit (4-8). 8. Cash register according to claim 7 »characterized in that the memory device has a Memory area includes for storing time data for corresponding time areas. 9. Cash register according to claim 8, characterized in that the memory device (100) the timer circuit (48) includes memory areas for storage of year, month, and day data that are determined by the time counting operation of the year, month, and day result in the time counting operations in the computing device connect, and that the annual, monthly and daily data that are stored in the memory areas, are read out and fed to the printer device (33) in order to automatically print them out on a receipt, if the receipt key is pressed. 10. Cash register according to claim 8, characterized in that g e mark calibrates that the storage device (100) in the time clock circuit (48) comprises a memory area for storing a flag signal which is used for time range differentiation serves, and that the time domain data stored in the memory device with the current time in the Computing device is compared and the result of the comparison is written as a flag signal for time domain differentiation will. 809828/0656 11. Cash register according to claim 1, characterized that the first storage device, the assessment device and the computing device a chip and form a central unit that the second memory device and the fourth memory device are formed on a single chip and constitute a memory circuit that the timer circuit comprises the third memory and is formed on a single chip, and that the memory circuit and the timer circuit include a source of supply to ensure their operation. 12. Cash register according to claim 11, characterized in that the central processing unit further comprises means for performing a Read / write operation for the third storage device in the timer circuit and the memory circuit. 809828/0656