DE2445490A1 - CHARGE LINK IMAGING SYSTEM - Google Patents

Description

DR.-ING. FRIEDRICH B. FISCHER ^{5 (} > ^3R rodhmkikchen (b

PATENT ADVERTISER SAARSTRASSE 71

Fairchild Camera and Instrument F7487

Corporation Dr. F / Wi

464 Ellis Street
Mountain View, California 94040

Charge-coupled imaging system

The invention relates to imaging systems, and they
relates in particular to a charge-coupled device technology linear imaging system which provides greater resolution than has previously been possible with linear imaging devices of this type.

The basics of the technology of semiconductor charge coupling devices has been described by WS Boyle and GE Smith in an article entitled "Charge-Coupled Semiconductor Devices" in Bell System Technical
Journal, April 1970, page 587.

As Boyle and Smith explain, there is a charge-coupled device - hereinafter also "CCD"
called) from a metal-insulator-semiconductor structure (metalinsulator-semiconductor - also referred to as ^N MIS ^W ), in

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which minority carriers are stored in a “spatially defined depletion region”, also referred to as “potential well ¹¹ ”, on the surface of the semiconductor material. This charge packet is moved along the surface by moving the potential energy minimum In an article "Experimental Verification of the Charge-Coupled Device Concept", which is published by Amelio et al., On page 593 of the same issue of the Bell System Technical Journal, attempts are described which have been carried out to the advantages and the feasibility of the To demonstrate the principle of charge coupling arrangements

As pointed out by Boyle and Smith, there are charge coupled devices presumably as shift registers, delay lines and, in two dimensions, as imaging or display devices be usable with advantage.

In U.S. patent application serial no. 343,759, which on 22. March 1973 under the name "A Buried-Channel, Charge-Coupled Linear Imaging Device "was filed, describe Kim and Dyck, a linear imaging assembly comprising a series of photosensitive elements and two CCD transport assemblies one on each side of the row of photosensitive elements. The transport arrangements, which are covered by opaque material, take charge packages, which as a result of incident radiation in the photosensitive Elements are saved. The charge packets are read out along the transport arrangements without them be affected by incident light.

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In the case described in the referenced Kim and Dyck patent application " Arrangement requires a single photosensitive element in the linear imaging array N potential wells (and the corresponding N electrodes and N inter-electrode spaces) in the adjacent CCD transport assembly. N is an integer and represents the number of phases that occur when the charge packets are passed on along the CCD transport arrangement be used ,, As a rule, N = 2 (two-phase CCD transport arrangement) or N = 3 (three-phase trans- * port arrangement), although N also has other values if necessary can accept. The resolution achievable by the series of photosensitive elements is accordingly limited.

A further reduction in the resolution that can be achieved with a charge coupling arrangement results from the use of charge sinks and exposure control, as described in US patent application Ser. 362,131 (Amelio) by the applicant, which was filed on May 21, 1973 under the designation "Charge-Coupled Devices with Exposure and Anti-Blooming Control ^11" .

The invention is aimed primarily at linear and planar To improve the resolution achievable with charge-coupled imaging systems and to simplify the design. The improved Resolution can be achieved without changing the principles of design and construction by which the CCD imaging systems operate are currently being built, so that the existing process and machining technology for charge coupled devices can be used.

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In accordance with the invention is a linear charge coupled device imaging system provided, which is an arrangement of light-sensitive charge coupling elements for the storage of incident Proportional charge light and a single adjacent transport arrangement for reading out the stored charge. Each potential well in the transport arrangement corresponds in the ratio 1 j 1 to a light-sensitive element in the linear one Imaging system.

As a result of the invention, the achievable resolution is increased by a factor of N in the case of a linear light-sensitive CCD arrangement. However, this increase in resolution requires an N-fold increase in the frequency of the control of the transport arrangement signal used without a corresponding increase in the possible switching speed of the transport arrangement achieved will.

According to the invention, two transport arrangements for reading out the charge packets, which in one arrangement are more light-sensitive Elements stored are "used". In this case, in a two-phase system there is no increase in the frequency of the Signal required, which is used to control the transport arrangement.

Exemplary embodiments of the invention are explained in more detail below with reference to the drawings.

Figures 1a and 1b show schematically a top view and a Sectional view of a linear CCD imaging arrangement according to the invention with the adjoining transport arrangement «

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Figure 2 shows schematically a linear imaging arrangement according to the invention with six photo elements.

Figures 3a to 3g show waveforms to explain the Operation of the linear imaging arrangement shown in FIG.

Figures 4a and 4b show the relationship between integration times for the various elements in the array according to Figure 2.

FIG. 5 shows a plan view of the structure of a linear imaging arrangement with two adjacent transport arrangements according to the invention.

FIG. 1a shows a schematic plan view of a first exemplary embodiment of the invention. A semiconductor wafer 10 (Figure 1b) contains a semiconductor substrate or a semiconductor body 11 on which an insulating layer 13 is formed. Like in the As shown in the sectional view of FIG. 1b, the semiconductor body 11 has the p-conductivity. The conductivity types of the various Areas to be described in the semiconductor body 11 can, however, also be reversed; the description below the conductivity type is therefore not restrictive with regard to the invention.

In the upper surface of the semiconductor body 11 there is a buried channel 11a, as described in US patent application Ser. 296.507 of the applicant, filed on October 10, 1972 under the name "Buried Channel Charge-Coupled Devices" (Bechtel and Early), described _e The buried channel 11a

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increases the efficiency with which the charge from a potential well can be transferred to others. In this context, reference is made to the aforementioned US patent application for further details Serial No. Ref. 692,507. The buried channel 11a can be omitted if necessary.

An insulating layer 13 is over the top surface of the Semiconductor body 11. The insulating layer 13 preferably contains an oxide of the semiconductor material of the semiconductor body 11. In a preferred embodiment, the semiconductor body 11 consists of silicon and the insulating layer 13 consists of silicon dioxide. in the However, within the scope of the invention, other semiconductor material can also be used which is suitable for a stored charge maintain as stored in charge coupled devices; in this context other suitable Insulating layers 13 are used.

The "photosensitive elements" or "photo elements" contain areas 15a, 15b, 15c, 25a, 25b, 25c, 35a, 35b, 35c, 45a ... etc. (Figure 1a) in the semiconductor material under photo gate 15. These areas, which the potential wells contain in which charge wlrd saved _s are either disposed near the surface of the semiconductor body 11 immediately below the insulating layer 13 or slightly away from the upper surface of the Hall> lead body 11 in the buried channel, as in the aforementioned United States Patent application 296.507 (Bechtel and Early).

Each of the charge storage areas or the light-sensitive elements 15a, 15 "b» 15c ₉ 25a "c® is separated from the areas adjacent to it by channel stop

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regions) 16a, I6b, 16c, 26a. _ffl . separated. The channel blocking regions consist of parts of the semiconductor body 11 which are arranged on the upper surface; they have the same conductivity as semiconductor bodies 11, but they are more highly doped. These channel blocking regions prevent the charge stored in a given photosensitive element from reaching regions of the semiconductor body 11 which interact with the adjacent photosensitive elements. The channel blocking regions have the same conductivity type as the conductivity prevailing in the semiconductor body 11, and together with the barriers formed by the exposure gate 14 and transfer gate 16 they form the limits of the charge collection and storage in each of the photosensitive elements 15a, 15b, 15c, 25a. .. provided part.

The transfer gate 16 controls the transfer of charge from a given photosensitive element into the corresponding area of the CCD array 17. The CCD array 17 consists of a number of electrodes 17a, 17b, 17c, 27a, 27b, 27c, 37a · .., which are formed on a semiconductor material disposed on the insulation as described, for example, in US Pat. No. 3,728,590 (Kim et al.), issued April 17, 1973. As can be seen from Figure 1a, the electrodes 17a, a, 37a ... with collecting line ¹¹ ^ ₁ ", the electrodes 17b, 27b, 37b ... with collecting line" ^ ₂ "and the electrodes 17c, 27c, 37c .. Connected to the manifold ^η φ- * ^η The arrangement shown in plan view in FIG. 1a is intended to work as a three-phase CCD system.

In the upper surface of the semiconductor body 11 (Figure 1b) is a diode 12 (FIG. 1a) with a pn junction 12b (FIG. 1b) is formed. The diode 12 serves as a charge sink for the exposure and "blooming" control as described in the US patent application

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serial no. 362,131. This application was named "Charge-Coupled Device with Exposure and Anti-Blooming Control "filed on May 21, 1973 (Amelio). This patent application filed for the applicant is referred to in Reference is made within the scope of the invention.

The electrical contact to the drain diode 12 is established by a conductor 12a (FIG. 1b), which has an opening in the insulating layer 13 contacts the upper surface of the diode 12. The transfer of charge from the photo elements 15a, 15b, 15c, 25a, 25b, 25c, 35a ... to the area of the drain diode 12 is controlled by controlling the potential at the exposure gate 14, which is formed on the insulation 13. The potential at gate 14 controls the potential in that area of the semiconductor body 11, which is located immediately below this gate, and it therefore controls the transmission of the electrical Charges, which are stored in the potential wells below the photo gate 15, from the area below the photo gate 15 to Sink diode 12. The mode of operation of this exposure control is described in the aforementioned US patent application serial no. 362.131 (Amelio).

In the previous three-phase linear arrangements, such as those in the aforementioned US patent application 343,759 (Kim and Dyck), three charge storage areas of the transport assembly are used to carry the light sensitive in each Element of the photosensitive arrangement to read out stored charge. Works in accordance with the present invention however, only one charge storage area of the CCD transport assembly with each photosensitive element of the photosensitive assembly together. Therefore, three times as many photosensitive elements can be accommodated in the photosensitive assembly

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than was possible with Kim and Dyck, the resolution of the photosensitive arrangement being increased by a factor of "3". This increase in resolution is achieved, however, in that the ^{read-out frequency is increased by the factor M} 3 ^M and the charge packets interacting with every third light-sensitive element are read out only once. For example, charge packets stored in elements 15a, 25a, 35a (FIG. 1a) (electrons in an η channel) are read out once by lowering the potential at the overpass gate and further lowering the potential (i.e. increasing the voltage) of the bus line ^ ₁ , whereby a low potential energy is generated in the areas of the semiconductor material below the electrodes 17a, 27a, 37a ... At the same time, the potential energies at the collecting lines "fL" and "fL" are kept high in order to avoid the charge in the photosensitive elements 15b, 15c, 25b, 25c, 35b, 35c etc. being transferred under the corresponding electrodes in the transport arrangement .

The charge packets leading to the storage areas in semiconductor bodies 11 are forwarded under the electrodes 17a, 27a, 37a etc., are then read out by conventional known methods, but at a frequency three times that which would normally be used. at The readout of these charge packets is completed by those stored in the light-sensitive elements 15b, 25b, 35b Charge packages in the same way as described above-under the electrodes 17b, 27b, 37b, etc. transferred. These cargo packages are then removed from the transport arrangement in the same way as the previously transferred charge packages are read out.

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Finally, the charge packets stored in the light-sensitive elements 13c, 25c, 35c ... are transferred under the electrodes 17c, 27c, 37c ... These charge packets are then in turn forwarded along the transport arrangement in a known manner by changing the potentials on the busbars "^ ₁ ", "^ ₂ "

The dead motor 15 is preferably made of transparent material, for example doped polycrystalline silicon. The electrodes 17a, 17b, 17c, 27a ··· etc. are preferably covered with a non-translucent material such as aluminum in order to avoid light incident on the arrangement from adversely affecting the charge packets read from the arrangement. The electrodes mentioned are separated from the non-translucent material by insulation.

Figure 2 shows schematically one with six photosensitive elements equipped linear imaging array constructed using the charge coupling technique according to the invention is. In operation, phototor 22 is held at a direct current potential, which is an array of potential wells 1-6 generated corresponding to the photosensitive elements 24a-24f. The potential wells 1-6 are separated from each other through arms 21a-21e of a channel barrier diffusion 21. Channel barrier diffusions are known per se, and this diffusion, which partially delimits the potential wells, and leakage currents from one Potential well on the other hand essentially prevented, therefore does not need to be described in detail.

When light falls on the phototor 22, minority carriers from the semiconductor body 11 are caused to settle in the semiconductor material to collect, which is located under the phototor 22,

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but is isolated from this. These minority carriers collect in a given potential well in a quantity which is proportional to the intensity of the light which strikes the area of the photo gate 22 superimposed on this potential well.

The collection or "integration" of charge in a potential well ends when the charge collected in the potential well is read out from it into the adjacent transport arrangement. As is shown in Figure 2, the transport arrangement contains charge storage regions 25a to 25f, which in the semiconductor material are formed, which is located under corresponding electrodes 26a to 26f, but insulated from these electrodes is.

The six-element linear imaging arrangement shown in FIG. 2 is three-phase. The electrodes 26a and 26d are controlled by the signal fL, the electrodes 26b and 26e by the signal φ 2 and the electrodes 26c and 26f by the signal φ * * . The transfer of charge from the potential wells 16, which work together with the light-sensitive elements 24a - 24f, is controlled in part by the potential φ ".to transfer gate 23.

For example, the charge packets collected in potential wells 6 and 3 are transferred to potential wells 25f and 25c by increasing the voltage on transfer gate 23 (i.e. lowering the potential), while at the same time increasing voltage ff on electrodes 26f and 26c (see FIG. 3b). At the same time, the voltages φ ~ and φ * on the electrodes 26a, 26e and 26f are kept at low values (cf.

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Figures 3c and 3d). The charge packets in the photosensitive elements 2, 3 »5 and 6 therefore remain under the phototor 22.

The charge packets located in the potential wells 25c and 25f are now read out from the transfer arrangement to the output diode 27. This reading is carried out by controlling the signals φ *, φ2 ^and ^ 3 * which are applied to the electrodes 26a-26f in the manner shown in FIGS ).

Figure 3e shows that the charge packet from potential well 6 first at the output diode 27 arrives. Then the cargo package arrives from potential well 3 the diode 27

To read out the charge packets stored in the potential wells 5 and 2, the signal φ η is raised ^to a high voltage (FIG. 3c), while the signals ^ and fL are kept at a low voltage (FIGS. 3d and 3b). At the same time, the signal jL on the overpass gate 23 becomes high voltage

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raised (Figure 3a). Correspondingly, charge packets stored in the potential wells 5 and 2 are transferred to the potential wells in the areas 25e and 23b under the electrodes 26e and 26b. These two charge packets are read out to the output diode 27 by changing the potentials φ ^, φ ^ and φ- ao as shown in Figures 3b - 3d

As can be seen from FIGS. 3a-3d, those in the potential wells 4 and 1 collected charging packages (which subsequently are referred to as charge packets 4 and 1) are read out in the same way

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Figure 3f shows the horizontal deflection signal as used is used to control an electron beam through a cathode ray tube. The charge packages 6 and 3 control the display the point shown by arrows 6 and 3 in Figure 3g

Because the charge packets collected in potential wells 5 and 2 (which are referred to below as charge packets 5 and 2) arrive at the output diode 27 somewhat later than the charge packets 6 and 3 in relation to the horizontal deflection according to FIG. 3f, the charge packets 5 and 2 are shown in the illustration shifted to the right according to FIG. 3g · The charge packets 5 and 2 are lower than the charge packets 6 and 3 in this illustration due to the rotation of the object, which is relative to the linear alternating element imaging arrangement is scanned between the reading out of the charge packets 6 and 3 and the reading out of the charge packets 5 and 2. Such a relative movement occurs in image transfer scanners of a type in which the linear array according to the invention can be used

The charge packets 4 and 1 are opposite the charge packets 5 and 2 lower, and they are shifted further to the right, as shown in Figure 3g, for the same reasons' as described above in connection with charge packages 5 and 2 in relation to charge packages 6 and 3

FIG. 4a shows the relationship between the integration time for a given light-sensitive element 1-6 and the control signal ff applied to the transfer gate 23 (FIG. 2). Each photosensitive element collects charge, which of the over about three Periods of the signal jL. radiation impinging on the element is proportional · However, the integration period is the

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light-sensitive elements 6, 3 offset by one period of the signal φ with respect to the integration period of the light-sensitive elements 5, 2, which in turn is offset by one period of the signal * L with respect to the integration period of the light-sensitive EIemente 4, 1; this can be seen from FIG. 4a. As shown in FIG. 3g and the representation in FIG. 4b, these offset integration times are appropriately taken into account by its shifts in the vertical direction, as can be seen in FIG. 4b. "

The linear connected charge coupling display system according to FIG Invention enables the manufacture of a linear display device with a considerably high packing density, so that a high resolution is achieved with an appropriate device length. With the current state of photo masking (and this technique will be improved in the future) it is possible to use a 12.5 micrometer (0.5 mil) pitch charge coupled device Manufacture each light-sensitive element (i.e. each goal). if the system uses an array of photo elements with a three-phase sliding glass on either side of the array of photo elements the packing density is effectively two photo elements per bit (one "bit" containing three charge storage areas of a three-phase shift register), and this gives, for example about 2.85 cm (1.125 inches) for a 1,500 element array (about 19 micrometers »0.75 mils per photo element by 1,500 elements). However, using the switch structure according to the invention, the length of the assembly is only about 1.9 cm * 0.75 inches (12.5 microns «0.5 mil per photo element times 1,500 elements), with a three-phase shift register. This reduction in length has been achieved with little complication Timing and an unusual readout sequence, which can be easily compensated, as already described.

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In the photosensitive elements 15 (Figure 1) or 24a The charge packets collected 24f (FIG. 2) are all read out from the same side of the light-sensitive elements. the the other side of the photosensitive elements can therefore be used for exposure control and / or for anti-blooming control by adding a diode, for example a diode 12 (Figure 1a) and a control gate 14. Details of this arrangement can be found in the aforementioned US patent application Ser. 362, 131 (Amelio).

The system according to the invention does not have one, but three light-sensitive elements per three-phase CCD element in the Transport arrangement (where the three-phase CCD element has three gates, thus, for example, the gates 17a, 17b and 17c shown in Figure 1a). The resolution is therefore given at a Length of a photosensitive array increased by a factor of N by using each electrode in the CCD tresport array allows photosensitive element to work together. In a three-phase system, however, reading out the accumulated charge representing the captured image now requires three full Scans of the CCD transport arrangement 17 · This gives a video signal which is similar to that used in video systems 2: 1 interlace is completely analog, especially if a two phase CCD & array is used

♦ Transport-The density of the photosensitive CCD array is no longer limited by the CCD elements in the transport arrangement, but rather by the spread of the diffused contaminants (e.g. in the sink endlode 12 and the canal restricted areas 16a, 16b, 16c, 26a. ··) during normal semiconductor processing · It is quite conceivable that photo element spacings of about 5 micrometers (0.2 mil) can be achieved by carefully monitoring and

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Control of the processing (corresponding to about 100 line pairs per millimeter) can be achieved.

The disadvantage with this new linear charge-coupling imaging system (charge coupled interlaced linear imaging device - CCILID) is a threefold Increase in the shift register frequency without a corresponding increase in the possible switching speed of the shift register occurs when the CCD system is a three-phase system. If the CCD system is an N-phase system, this corresponds to Difficulty increasing shift register frequency N times, where N is a chosen positive integer.

When the distance of the photosensitive devices of the arrangement decreases, the possible switching speed of the photosensitive device will normally be increased. Considered However, one does not consider the existing charge coupling capability and the generally slow scanning of linear imaging systems with high resolution, the disadvantage should not be considered too severe.

Further advantages of the described linear imaging arrangement over the previous arrangements of this type are the elimination of the odd / even noise, which results from the bilateral reading of the photo charge in the previous linear Imaging arrangements resulted in which two CCD transport arrangements for reading out the collected in the imaging arrangement The simplicity of the device and the electrical timing are also advantageous, which result from the fact that only a single CCD shift register is required and not three, the third shift register of the previous arrangements for combining the opposite Signals from the two transport arrangements

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was used. The dark current is also reduced due to a more favorable (i.e. higher) ratio of the light-sensitive Area to the shift register area.

In the imaging arrangements shown in FIGS a transport arrangement works together with a linear imaging arrangement. A system in which two Transport arrangements cooperate with a single imaging arrangement, also corresponds to that of the present invention underlying inventive concept. This is particularly advantageous when the linear imaging system is a Is two or four phase system. If the imaging arrangement works as a two-phase system, it is omitted due to its use of two transport arrangements the need for doubling the readout frequency in order to obtain an alternating operation (interleaved operation or interlaced operation). In this In a given charge coupling arrangement, two potential wells (and two electrodes) work with a single one Potential well (charge storage area) in the row of light-sensitive Elements together. FIG. 5 shows a schematic plan view of such a linear imaging system according to the invention. A series of photosensitive elements 54a through 54j contains such areas 50 of semiconductor material beneath a radiation-permeable, conductive phototor 52. The phototor is separated from the semiconductor material underneath by an insulating layer (which, to simplify the illustration in Figure 5 is not shown) separately. The pot, which one cooperates with the photosensitive element 54p (where ρ is an integer between a and j and j is the number of the in the arrangement represents existing photosensitive elements) is formed in a semiconductor area, which on two Pages is surrounded by parts of the channel restricted area 51. The potential well in the photosensitive element 54p is therefore from

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the potential wells of the adjacent photosensitive elements 54 (p-1) and 54 (p + 1) by parts of the channel block diffusion separately, i.e. parts 51a-51i. The parts 51a - 51i of the Channel barrier diffusions are not interconnected. The channel barrier diffusion therefore surrounds each one containing a potential well Area of the semiconductor material on two sides, while the two sides which are to the shift registers 55 and 56, stay open.

A charge packet collected in a certain light-sensitive element 54p can therefore be read out to the corresponding charge storage area either in shift register 55 or shift register 56. In operation, however, those charge packets which are in the light-sensitive elements 54a, 54g, 54e, 54g and 54i (in the present context as "odd ¹¹ light-sensitive elements) cooperating potential wells are collected, read out to the right side of the figure 5 in the corresponding charge storage regions of the shift register 55, while those charge packets, which in the light-sensitive to the elements 54b, 54d, 54f, 54h and 54j (referred to as "straight" light-sensitive elements in the present context) of interacting potential wells are collected to the left to the corresponding charge storage areas in shift register 56. even "light-sensitive element, the charge packet of this element is read out to the left by lowering the potential φ * on electrode 56b, while at the same time the potential fL on electrode 55b is increased. In the process, the potential at the transfer gate 53a is lowered in order to allow this charge packet from the light-sensitive

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Element 54b to the charge storage meter in the transport assembly 56 is transferred under electrode 56b. The potential at Overpass gate 53b is maintained at its normal level.

Simultaneously with the transfer of the charge packet from the photosensitive one Element 54b is the charge packets in all straight lines light-sensitive elements in the corresponding charge storage areas transferred to shift register 56. The charge packets collected in the odd photosensitive members become the corresponding charge storage areas in a similar manner transferred to transport arrangement 55. No charge is transferred from an odd photosensitive element to the corresponding charge storage area in transport arrangement 55 at the time in which the charge is from a straight element is transferred to its corresponding charge storage area in transport assembly 56, since the potential is on the Overpass gate 53b (or 53a) held high when the potential at the overpass gate 53a (or 53b) is lowered.

Accordingly, charge packets from the odd photosensitive Elements removed by the potentials at transfer gate 53b and the electrodes in both shift registers 55 and 56 are controlled accordingly, and by the straight light-sensitive elements by corresponding control the potentials at the transfer gate 53a and the electrodes in both shift registers 55 and 56.

The electrodes 55a-553 and 56a-56j are through a two-phase (or four-phase) signal driven in a manner known in the art of charge coupled devices

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is. A charge packet transferred from the photosensitive element 54a to the charge storage area of the semiconductor material below electrode 55a is then passed along the transport arrangement 55 to the output diode 58b, while at the same time a charge packet stored in the photosensitive element 54b is transferred to an adjacent charge storage area in the semiconductor material below the electrode 56b and then passed to output diode 58a. The Jluslesefrequenz of the signal used in the arrangement according to Figure 5 is therefore exactly _s that which according to the previous state of the art used wtird ©.

The arrangement shown in Figure 5 has the advantage that a charge packet from a given photosensitive element in a corresponding charge storage area either in a transport arrangement 55 or transport arrangement 56 thereby passed on can be that the to the transfer gates 53a and 53b and the cooperating with the shift registers 55 and 56 electrodes applied potentials are controlled in a corresponding manner. If such flexibility is not required, it is an alternative also possible, for example an additional channel blocking area on the left (or right) side of each odd light-sensitive Element and on the right (or left) side of each straight photosensitive element to form. The canal exclusion area then has a serpentine shape, and charge from a particular photosensitive element can only be transferred to one of the two Transport arrangements are transferred.

The system shown in Figures 1a and 2 discharges a linear one Arrangement. There can also be several linear arrangements in a planar arrangement on a semiconductor plate

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be formed. In this case, the principles of alternating work or interleaving principles or interlacing principles) according to the present invention are applied in the same way to the signals to be read from the planar arrangement.

In one embodiment of the invention, a linear imaging device was used made with 255 elements, which had exposure control and anti-blooming control. The middle the photosensitive elements were spaced 14 micrometers apart and became a three-phase transport arrangement used with a CCD shift register, its doped polycrystalline Silicon electrodes (also known as "gates" or "gates") have a width of 8 microns and are undoped polycrystalline silicon interstices were 6 micrometers wide; the transport arrangement had a length of 87 bits, each bit having three charge storage areas, three electrodes and three spaces. The photosensitive one The area of the assembly was delimited by a second layer of aluminum covering almost the entire area of the chip covered, except for the central strip of the photo gate, which was located above the light-sensitive elements. The output amplifier The circuit included a double gate MOS transistor to minimize coherent reset noise. A dummy output amplifier was used to create coherent Generate noise. The arrangement was read out in in the same way as is described in connection with FIGS. 1a and 2.

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Claims (1)

2445A9Q Expectations ( 1 *! Linear imaging system with several light-sensitive elements for collecting or storing a corresponding number of charge packets, the amplitude of which is proportional to the amount of light that strikes the light-sensitive element in which the charge packet is stored, characterized by: several in one Light-sensitive elements arranged in a row, a first shift register which is arranged on one side of the row of light-sensitive elements and has several storage areas for storing charge packets, a first control device for controlling the transfer of charge packets stored in the light-sensitive elements to corresponding storage areas in the first shift register, and first shifting means for shifting from the photosensitive elements to the first shift register transferred charge packets along the first shift register to an output, the storage areas corresponding to the photosensitive elements in a ratio of 1: 1. 2. Imaging system according to claim 1, characterized in that that the first shifting device for shifting the charge packets along the first shift register generates N control signals, the amplitude of each control signal being substantially 509816/0738 2A45490 is identical to that of the other control signals, but with respect to the other control signals by 1 / N of the period of the control signals is delayed in time, where N is a chosen positive integer. 3ο imaging system according to claim 2, characterized in that that there are N sets of photosensitive elements, each photosensitive element being one set of the next each light-sensitive element of the set is separated by a light-sensitive element of the other sets. 4. Imaging system according to claim 3, characterized in that the first control device contains a transfer device, which simultaneously charge packets from a given set of photosensitive elements to the first shift register transferred and thereby prevents the charge packets in the remaining sets of light-sensitive elements in the first shift register be convicted. 5. Imaging system according to claim 2, characterized in that that N = 2. 6. Imaging system according to claim 2, characterized in that N = 3. 7. Imaging system according to claim 2, characterized in that N = 4. 8. An imaging system according to claim 1, characterized in that each of the photosensitive elements comprises the following components contains: 50 9 816/0 7 38 2U549Q a first semiconductor area, an insulation arranged on the first semiconductor region, an insulation arranged on the insulation and the first semiconductor region Radiation-permeable electrode, and a channel restriction area, which the lateral extent of the first semiconductor area limited on three sides, 9. Imaging system according to claim 8, characterized in that that the semiconductor material contains silicon » 10. Imaging system according to claim 9 _9, characterized in that the insulation contains silicon oxide " 11. An imaging system according, to claim 8, characterized in that the first control means comprises a conductive gate which is narrow arranged on the insulation and to ^ ny on the first semiconductor region located strahlwngsdurchlässige electrode adjacent but _t is not conductively connected thereto, said conductive to the Gate, a potential for controlling the potential in the semiconductor material located under the gate can be applied and the semiconductor material below the conductive gate on the fourth side limits the lateral extent of the first semiconductor region. 12. Imaging system according to claim 11, characterized in that the storage areas for storing charge packets in the first shift register having second semiconductor regions, each of which is connected to a first semiconductor region in a corresponding one photosensitive element is adjacent, but separated from it by the semiconductor material under the conductive gate 50 9 816/0 7 38 is, wherein the second semiconductor region is arranged so that there is a charge packet from the first semiconductor region in the corresponding can accommodate photosensitive element. 13. Imaging system according to claim 12, characterized in that the first shift register over every second semiconductor region additionally has a special electrode, the potential of which can be changed by control signals. 14. Imaging system according to claim 13, characterized in that an output is arranged at one end of the first shift register is. 15. Imaging system according to claim 14, characterized in that the output is one formed in the semiconductor material Has output diode and an output electrode which is on the insulation over the semiconductor material between the Output diode and the last storage area in the first shift register is arranged so that it is the transfer of Can control charge packets from the last storage area to the output diode. 16. The imaging system according to claim 8, characterized by a charge sink which is adjacent to the light-sensitive elements is trained. 17. Imaging system according to claim 16, characterized in that the charge sink contains an area whose conductivity the prevailing conductivity in the semiconductor body is opposite and which in the semiconductor body to the photosensitive elements is formed adjacent. 5 09816/0738 2U5490 18o imaging system according to claim 17, characterized by Gates for controlling the potential of the semiconductor material between the photosensitive elements and the charge sinks to control the flow of charge from the photosensitive elements to the charge sinks. 19e imaging system according to claim 12, characterized in that that the potential at the electrodes, which are located above the storage areas in the first shift register, with a frequency is changeable, which is equal to N times the frequency with which the stored in all light-sensitive elements Charge packets are read out. 20. Imaging system according to claim 1, characterized by one arranged on another side of the photosensitive elements second shift register with several storage areas for storing charge packets, the storage areas correspond to the photosensitive elements in a ratio of 1: 1, by a second control device for controlling the transfer from charge packets stored in the photosensitive elements to corresponding storage areas in the second Sliding register, and by a second shifting device for shifting from the photosensitive elements to the second shift register transferred charge packets along the second shift register to a second output. An imaging system according to Claim 20, characterized in that the photosensitive elements form N sets, each photosensitive element in a set from the next photosensitive element in the same set by a photosensitive Element of every other sentence is separated. 50981 6/0738 2U549Q 22. Imaging system according to claim 21, characterized in that the first and second control devices transfer devices for simultaneously transferring charge packets from a set of photosensitive elements to the first or second Have shift registers, the charge packets in the remaining sets of light-sensitive elements at a transfer to the first or second shift register are prevented. 23. Imaging system according to claim 21, characterized in that, that N = 2. 24. Imaging system according to claim 22, characterized in that N = 4. 25. Imaging system according to claim 20, characterized in that each photosensitive element comprises the following parts: a first semiconductor area, an insulation arranged on the first semiconductor region, an insulation arranged on the insulation and the first semiconductor region radiation-permeable electrode, and a channel block area, which the lateral extent of the first Semiconductor area limited on two sides. 26. Imaging system according to claim 25, characterized in that the semiconductor material contains silicon. 27. Imaging system according to claim 26, characterized in that the insulation contains an oxide of silicon. 28. Imaging system according to claim 25, characterized in that that the first controller has a first conductive gate 509816/0 738 2U5490 contains, which is applied to the insulation and to every radiolucent, the electrode located above each first semiconductor region is arranged adjacent but non-conductive, that a potential can be applied to the first conductive gate to the potential in the semiconductor material below the first control conductive gate, that the semiconductor material under the first conductive gate the lateral extent of each first semiconductor region on the third page limited, that the second control device includes a second conductive gate, which is on the insulation and on each radiation-transmissive, the electrode located above each first semiconductor region is arranged adjacent but non-conductive, that a potential can be applied to the second conductive gate to the potential in the semiconductor material below the second control conductive gate, and in that the semiconductor material under the second conductive gate extends to the lateral extent of each first semiconductor region the fourth page limited. 29. Imaging system according to claim 28, characterized in that the storage areas for storing charge packets in the first shift register having second semiconductor regions, each of which is connected to a first semiconductor region in a corresponding one photosensitive element is adjacent, but separated from it by the semiconductor material under the first conductive gate is arranged, and which a charge packet from the first semiconductor region in the corresponding light-sensitive Can accommodate element, and that the storage areas for storing charge packets in the second shift register third Have semiconductor regions, each of which is connected to a first 509816/07 3 8 2U549G Semiconductor area in a corresponding light-sensitive element adjoins, but is arranged separated from it by the semiconductor material under the second conductive gate, and which Can accommodate charge packets from the first semiconductor region in the corresponding light-sensitive element. 30. Imaging system according to claim 29, characterized in that the first shift register additionally has a special electrode which lies over every second semiconductor region, but is insulated from it, the electrode potential can be changed by control signals. 31. Imaging system according to claim 29, characterized in that the second shift register additionally has a special electrode which lies over every third semiconductor region, but is insulated from it, the electrode potential can be changed by control signals. 32. Imaging system according to claim 31, characterized by a first output at one end of the first shift register and a second output at one end of the second shift register. 33. Imaging system according to claim 32, characterized in that the first output is one formed in the semiconductor material has first output diode and a first output electrode which is on the insulation over the semiconductor material is arranged between the first output diode and the last storage area in the first shift register so that it has the Transfer of charge packets from the last storage area to the output diode can control, and that the second output one 509816/0738 second output diode formed in the semiconductor material
has and a second output electrode which is on the
Isolation is arranged over the semiconductor material between the second output diode and the last storage area in the second shift register so ■ that it can control the transfer of charge packets from the last storage area to the second output diode. 509816/0738 5 / ί blank page