DE2044008C - Switching arrangement controlled by a gate circuit - Google Patents

Description

I /

either to open or to block the circuit element connected to the starting point.

Various methods have been proposed for overcoming the problem caused by the threshold voltage Vt of the gate transistor of a gate circuit containing only one transistor. One is to use two transistors for the gate element, while according to another method the gate element is overdriven by pulses whose amplitude is at least equal to the sum of the signal and the threshold voltage. However, the use of two transistors per gate section contradicts the requirement to reduce the number of components per function to a minimum. However, overdriving the gate transistor is not always feasible and may require more than one power source in order to generate control signals with a large amplitude. In addition, the overload increases the power dissipation and the noise level in the circuit. These are major drawbacks.

The invention is based on the task of transmitting a signal through a gate member with only one amplifier element due to its threshold voltage occurring amplitude losses without the Need to prevent overdrive.

This task is bui by a gate controlled switching arrangement with at least one amplifier element, the control electrode of which is supplied by the gate circuit with an input signal which controls the amplifier element in the conduction state after a threshold value is exceeded, and whose one main electrode is connected as the output electrode, and in which the gate circuit the main current stray of a gate transistor which is controlled by gate signals at its control electrode and which is conductive in both directions and, in one conduction direction, shifts the signal transmitted from its input electrode to its output electrode; h ti i a reference level around its threshold voltage to be overcome for control in the conduction state, the threshold voltage of the gate transistor g. is greater than the threshold voltage of the amplifier element, achieved according to the invention in that a bias circuit is connected to the second main electrode of the amplifier element, which is a the signal shift caused by the threshold voltage of the gate transistor supplies counteracting bias voltage.

In this way, the effect of the threshold voltage for signal transmission is canceled, see above that the full input signal is available at the starting point. Appropriately, one chooses them wisely The amount of the bias voltage generated by the bias circuit is practically equal to the threshold voltage of the gate transistor, so that an amplitude-accurate transmission of the input signal takes place.

In a particular embodiment of the invention, the bias circuit can be the main current path of a contain additional transistor, which has a threshold voltage and between a reference voltage terminal UDd the second main electrode of the Amplifier element is connected, on which it generates the bias. Furthermore, both the gate transistor as well as the transistor of the bias circuit field effect transistors with an isolated control electrode be, the main current path of the gate transistor the coupling between an input signal source and the control electrode of the VersiSrkerelementes represents and the source-discharge route of the Transistor of the bias circuit between the reference voltage terminal and the second main elec-

trode of the amplifier element, which can also be a transistor, for example, is connected. in the In operation, the control electrode of the gate transistor can be supplied with signals at levels which correspond to its main current path block or make conductive.

ίο The switching arrangement according to the invention can use with particular advantage to form a multi-stage shift register, which is composed of several gated switching arrangements connected in series, the second main electrodes being the

Amplifier elements of the individual stages are connected to a common bias circuit. The amplifier element of each stage of the shift register may, for example, be a signal inverter be switched. The shift register can be adjusted with the help of

ao operate two controlling clock pulse sources whose first clock pulses are supplied to the control electrodes of the gate transistors every second stage, true ' the second clock pulses to the control electrodes of the gate transistors of the intermediate stages to be delivered.

A preferred exemplary embodiment of the invention will now be explained in more detail in conjunction with the drawing will. The drawing shows in

FIGS. 1A and 1B show the schematic circuit arrangement of circuits with a gate element according to the state of the art,

2A and 2B show the schematic circuit arrangement of gate member circuits according to the invention, F i g. 3 shows the schematic representation of a shift register according to the invention,

Figure 4 shows a shift register employing a double bias arrangement in accordance with the invention.
To explain the invention, field effect transistors with an insulated control electrode (IGFET transistors) of the current increasing type are used in the drawing for the sake of simplicity. It goes without saying, however, that other known transistor types can also be used to implement the invention,

z. B. IGFET transistors of the current choke type, bipolar transistors or junction field effect transistors. The following introductory discussion of the transistors shown in the drawing ropes the ins detailed description of the circuits

5 »lighten.

1. The components used have a first and a second electrode, which act as a source and drain and determine the ends of a current path, as well as a control electrode. The potential applied to the control electrode determines the conductivity of the current path. For the p-type IGFET transistor, the source is considered to be that of the two electrodes to which the higher potential is applied. For an IGFET transistor of the η type the source is defined as the electrode to which the lower potential is applied.

2. The components used are bidirectional, which means that in the current path between the first and second electrodes a current can flow in either direction when applied to the control electrode a control signal is applied.

3. In order for the transistor to conduct, the control

5 6

electrode source voltage KrJ ₁ -in such a (V _a -OVoIt) and that the movable arm of the

Direction are applied that the control electrode switch 14 is connected to the terminal 18 (+ V volts). for

with respect to the source in the forward direction before the specified voltage conditions, the

is tensioned, and is larger than a given transistor 32 in the source circuit, the elec-

Value which defines the threshold voltage Vt . 5 trode 34 is the source and electrode 36 is the drain.

is. When the applied voltage Vas a Rieh- Since the source is at + V volts, exists between the

has device in which the transistor in the pass-source electrode 34 and the control electrode 38 a

direction is biased, but a smaller constant voltage difference of V volts (Γ « _Α · - \ - V),

Amplitude than Vt, the tran- and the current path of the transistor remains in the supply

sistor blocked, and practically io flows in the current channel. Low impedance or high conductivity

no electricity. It should be noted that this is also biased for a as long as the switch and slcucrelck

Bipolar component applies, which only conducts if terminal voltages maintain the stated values,

the base with respect to the emitter by a signal The capacitor 28 can therefore pass through the

is forward biased, the larger current path of transistor 32 fully charge, and the

is as the base-emitter junction voltage Vi ". 15 Voltage at the receiving terminal 24 is on

4. If the transistor increases as a source follower (or -f V volts. In this mode of operation of the gate-

Emitter follower) works, "follows" the voltage V _s element or transistor 32 is thus used to receive

the full voltage of the transmitter terminal 12 at the source that is connected to the control electrode

applied signal Vg. but it is transmitted with respect to the.

Control electrode shifted by a voltage, ao Now it is assumed that the movable switching whose amplitude is transferred to terminal 16 equal to the threshold voltage Vt arm and that the gate is transistor (V _s = V ₀ - V ₇ ) - this transistor32 is either already conductive is or is in the shift by V _T represents a major problem in the conduction state is switched. The voltage at the transmission use a gate element with a single terminal 12 and the control voltage at the control transistor. * 5 electrode 38 are now set to ground potential. The problem solved by the invention is solved and the initial voltage at the electrode 36 understandable when one looks at FIG. 1, which is a be | V VoIi, since the capacitor 28 shows a fully charged configuration with a gate. is. The transistor 32 is now operating. An input or transmission signal source 10 generates, namely as a source follower, the electrode 36 now being the source of its output terminal 12 signals by means of a switch 30.

ters 14, whose switching arm can either be connected to a terminal 16, if the transistor 32 can initially be connected to the control or to a terminal 18. When the state is switched, the voltage V ₂₁ at terminal 16 is directly connected to ground, while that of terminal 24 + V volts, and between the source terminal 18 with the positive pole of a battery 20, electrode 36 and the control electrode 38 exists one is bound, the negative pole of which is connected to ground. Depending on the 35 potential difference of KVoIt. While the switching arm is in the Konder position, the signal at the transmitter capacitor 28 is discharged, the potential difference point or terminal 12 is a potential that decreases between the source and the control electrode, which is neither ground potential nor a voltage an increase in the impedance of the current path has value -j K, w «, at + K the voltage value that leads. When the capacitor 28 is discharged that far. Battery 20 is. _{The 40 that K 2} , the value of the threshold voltage V _{T of} the end voltage should optionally be to a receiving transistor 32 (K ₇₃₂ ), appears at the transmitting terminal 12, so the transistor 32 will be transmitted to terminal 24. A load 26, whose blocked, and the capacitor 28, apart from the input impedance, contains a (distributed or punctiform reverse currents, no further discharging. Weighing) capacitor 28 Terminal 24 connected. According to the illustration, 45 contains gear at a potential which is equal to the voltage of the load 26, for example a complementary circuit ₃₂ .

kehrstufc 27, which is formed by an η-conducting transistor It has been shown that for one conduction direction 27a and a p-conducting transistor 27b is formed. The output electrodes of the transistors 27a and 27 are charged to the value of the input voltage together at a starting point 30, but the output is closed for the other direction. Their sources are at ground or at f K, voltage around the threshold voltage Y _{T of} the gate and their control electrodes are interconnected. sistors is spared. The incomplete discharge A gate element consists of a p-conducting field at the terminal 24 causes the transistors 27a effect transistor 32, whose electrodes 34 and 36 and 276 are simultaneously conductive, as the following limited current path between the transmitting terminal 12 ss is refined.

and the receiving terminal 24 is switched. The control electrode38 of the field effect transistor is assumed to have gone with one of the following typical values: + »'- = 10 volts; K _Tm = V _{T b} - = V _T
Connected to terminal 40, to which a control signal is applied- = 3 volts, and K _Tt7O = V _T , _npn) = 2 * volts Since the one whose potential value is either 0 or - \ - V F ^: ngang after a voltage jump from - f V is V. The transistor 32 is blocked when 6r is ground and the transistor 32 is switched on, its control electrode voltage is at + V volts, the transistor 27a is still at a voltage Va and it is turned on or conductive when the control - Equal to V _Tn (3 volts) in the forward direction biased voltage at the control electrode 38 by an amount, and highly conductive, because its threshold spinning I> which is greater than the threshold voltage V _{T of} the Tran- (2 volts). The transistor TIb is exceeded is also transistor 32, is lower than the potential at the source 65 if forward biased because its chip electrode, raing Vas, which is equal to 7VoIt (+ K-3 volts)

Assume now that the capacitor 28 exceeds the threshold voltage V _T (3 volts)

is initially discharged that the transistor 32 is blocked. The transistors 27a and 27 * thus form one

SKSäSSS «S

conductive transistors somewhere

_{in the follow-up company} , and the potential

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^Zero1 ' ^{and transistor 27fl isl ßC} -

one has a ^^ shown

described above only that, now ^d «E ™ P ™ ^ _f .

not on the potential + V of the send voltage

loaded "^ fJ ^ SL ^^ Jl and the transmission control state gescha tet vrajden Bl unajii

terminal au 12 Massepotentia · ^"e g · ^β ™ ^ ™ £ _{s will,} and the Stemme" stor in source development scarf, discharged to zero potential when be de J r sistor42 .n the ^ ™ *** ¹ "'^ potential at the

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_the Spanaer P

uk. 1 Λΐι «νιιν.« | ~ Ο

_{Arbdttweisc of the} circuit arrangement

_{extremely unstable} . _{If the} input terminal 12 is connected to β _{wjrd wjrd} ^ _{TransistQr2? Fl locked rl>}

and the output voltage of the circuit at terminal 30 rises to a potential known in advance

_{, whose} value by the impedance of Las "58, not

^ _by ^ _Behavior , _{len dcs Stro κ dcs Tran} .

^. ^. ^ _If ^ ^. _{ieIswejse the}

Load 58 a WidenUands member or an active building _{clement like e (wa the} transistor 276 is, the output rs- * "" ^{im Mlichc} " ^8leich ' ^{KV <1} " ^te "

₃ o

40

Currently ei; -V. . Tr

If in this case V _Til ß ^{Ieicn is} greater than the threshold voltage Ir. the transistor 276, the transistors 2a and 276 conduct simultaneously. This again means an excessive power loss and an (runs.chtl.cn of the potential) undefined output F i g. 2λ now shows a

fnuiung, in which the _.: _η7 : _ο . _η

parts of the known gate members with a single one Transistoi are avoided. "Art- ^ nrl"

The circuit arrangement contains «n amplifying B,, element, namely the "-conducting Trans.slo ^. * The drain is present via a load 58, and is located St,, erelectrode through the Torlrans.stor 32 rn.td.rn e., cn end of the line path coupled .st. .DkEmga; ssignalquelle 10 and the gate transistor 32 are like that to switch and work as inFig-1A. but the source of the transistor 27a is also included r SdbstVorsinnunglaltung ^ connectedD:, ese

elo rode 54 is grounded together with its A «lu ^». With such a circuit, the AMU.B source voltage Vos of the ¹ ^ f ^ ^{5S is at} most equal to my control electrode sources bpan

of the component is. _- ·, d-her

The source electrode of the transistor 27a. * Then, at r _r "volts above ground potential, proceeded in such a direction that its control electrode is stretched or made more positive." + V Voit gcicgi and the Transisiui 27a is controlled into saturation, the output voltage at terminal 30 is clamped to the voltage developed across the bias circuit 50, ie set to V _Ts z or +3 volts. As a function of the two potential values of the input signal + V and zero so the output voltage switches between a low Wet ^ r of ₅₂ volts and a high value of 4 V volts. If you want, the voltage _shift (V Tii) can also be eliminated and the output signal swing increased to the difference between + V and ground, as described below in connection with FIG. 3 will be explained.

Fig. FIG. 2B shows an exemplary embodiment of the invention which, analogously to the circuit according to FIG. 2A, but in which η-type transistors are used for the gate transistor 42 and for the circuit 60. If the potential at the transmission terminal 12 is 4- V volts, the transistor 42 works after its gating in the follow-up mode, and K ₁₄ , the control electrode potential of the transistors 27a and 276, is at most equal to (V - ^ r ₄₁ ). With these signal and voltage ratios, it is desirable that transistor 276 be off.

The bias circuit 60 coupled to the source of the transistor 276 lowers the source potential of the transistor 276 by the threshold voltage i> of the transistor 62 (V _T » _t ) · The transistor 62 is n-conductive <] and has its control electrode and its drain at + V while its source is connected to the source "of the transistor 276th The transistor 6i is connected like a diode, so that V _T “ the voltage across its drain and control electrode! is. The source potential V _{s of} the transistor 27 is equal to the power supply voltage V subtracted from the voltage drop or the voltage V-, - - ^! * "* be, ie

V _s - + V - - » _T

209 684MH

Ρ ". '. ^{2 and} ^ p.nahezugle.chs.nd.

EÜm rft? Mf ^ v "f ^m , ^{n tC} Ä ^Trans ; ^storen acts that are formed in the same process and, so .st eineuii SJrfS ΐ S

Lent »! f? wtv ΤΤ τ · ί "
potential + V volts is the transistor

ge

The control electrodes of the transistors 32 «and ^{326 si} " ^{d are} each coupled to a source for the first and second clock pulses Φ, or Φ _2, where Φ. And Φ, ^ «« »« r'rind. If, for example, Φ * + VVoU ^{is Betra} · ^l * 8. 0 volts, and vice versa This ensures that at the same time only one of

sas ™ - ^ * = *

Transistor 276 conducts and the output signal at terminal 30 reaches a potential which is equal to V - Kr ₆₂ .

In the circuit arrangements according to the invention explained above, the disadvantage is that in the "blocking state" of the input signal not being able to block an amplifier controlled by a gate element is avoided. The output potentials are precisely defined functions of the input signal. To neutralize ao any biasing device may be used for the threshold voltage of the gate member but has the use of transistors of the same conductivity type for the gate member and for the bias function the advantage that they behave similarly. This means that the Transistors are in synchronism, i.e. depending on changes in the ambient conditions, such as the ambient temperature, change in the same sense, so that the operation of the switching ; due to such changes relatively un-

FIG. 3 shows a shift register which has N stages, where N is an integer greater than 1, and which has a single bias circuit according to the invention. Since all stages of the register are identical, only the circuit arrangement of a single such stage 120 is shown. It contains a gate transistor 32i> whose current path between an input signal node 122 and the input terminal 24 "of an inverter stage 27 is connected. A second gate element with a gate transistor 326 is connected in a similar manner between the output terminal 30 of the inverter stage 27 and the input terminal of the next stage.

The substrate of the transistors is indicated by an arrow for the p-type components from Body points away and points to the body for η-conductive components.

The sources of the p-type transistors 276 and 1276 of the inverter stages are at ■ + ■ V, and the sources of the transistors 27a and 127a and all other η-type transistors of the inverter stages of the register are connected together with a bias terminal 56, which is is a bus and the potential of which is determined by the bias circuit 50. The bias circuit 50 is identical to that in FIG. 2A and consists of a transistor 52 whose source drain path is connected between the pre-voltage terminal 56 and ground, whose control electrode is connected to ground and whose substrate is connected to -f V. The source of the n-type transistor of each inverter stage is held at a bias potential equal to Vt _m . Assuming I'tm equals 3 volts, the bias terminal 56 and the source of each n-type transistor are held at 3 volts.

Value U volts

sistor ^ f

_1n Ii _n dir KlemÄ " ⁸ " ^?, ^ T Λ * " ⁸ ^ nfng JEe" de? vTs ™! ^ I ', ^ "ΐη ^ tf" i is made Da Φ + Π f I f · "L ⁵⁰ ^ ν7, ί is de du ch the Τ, ί, Γ ι c ^ ^ ΊΓ ° °' spannfe Transisto ^ lÄ '? ^Spe ™ ^chtl ! ^{Ng V} ° ^r "

f, _u fe? 27 vertldht? ih ^ locked, and the inverter.

_Now w.chsJh the next state 0 volts over tractor iT ^ ⁸ 'ü ", ² ^

general notes 122 iS 1? Λ u ^ T ' ^U J ^{d der} ? ί "get _renn J Se iJverteJ 5ΪΓ77
stood η cht ändS 5? ΐ ρ ^ ί

high is and αΓκΐπ Vt ^ Γ ^ Γ ^ "^ ', T

stay, if necessary ^> Τκ /? ° 1 * "μ ^S ιϊ h ,, 1 -..-". A """ ^b . ^le '. ^{bt the} output ^{terminals 5} " ^ H "Arr ^ι ί ^

fer ^ femme A'Fi ^ ^A " ^s f" ^ Pf "" »^» ■> «

level 27 ίΛ ^ Ζ ^^ · "? ^M * ^ i"''?
gung g, _s , _uer 5 ^{Γ Wd} T ^m J

Spanmmo y Zl , λ ^Aus f "^ 'emme 130 du

127 "ßesoerrt Ut ⁸ T · 'set ^{During the TranMSt01} sSanlne! (Φ V *?' ^W? '' ^ - ^{S euere |!} Ektrode annune V Z * ■ ^{2 r52) practically} ß ^{'custody of the S} P ^to' ( νΛφ) "in a similar way ³ \ ^ ^{Quellc 3η} ε ^ε1ε ε ^{ι wirc} Tak imDuken dir ^ ' ^{Wrd bd} " ^ach f °' g ^ender

gdeSaSLnl ™ ^ · * " ^d ' ^{C KIemme 122 at} register levelsΖ ^ Γ ^ch . ^{one other through} the following

If Φ again ^ h η v ", 'u
Assumption dßh ". ^{SU and under}

if at MasJ ^ 'f · 1 7- ^{ISe the} data input just opens and ^P , κ,' ^ ' ^{IS the} transistor 32. Capacitor Μ «, η ^ ^{Fo |} in ^operation · ^{around the} iSS 7 ·, u,? ^u _ft ^discharged so that V ^ a to ai

zur Fohte ^ that ί? ^ ^{i Vt} * "™ ^ta - ^{This ha} change the TrJ, ^lnv JL rterstufe ** '« «" Z »« ^{& n} < ^{Control ElectroH} ^ n η ° ^Γ · Γ ^{St now} S ^ P ^erTt ^ ** ^{scin <} equalOVohS "" . ^{Q. Uell} ™ ^s P ^ann «ng Vos practical feet to the K Pm« in ^ · i? ^{Nsistor 27fi is conductive and <} tSuS, S SfT " ^d * ^voltage t ^{V VoIt an} ^ ₁ remains discharged nl · I ^ \ ^{and the terminal Ui} 130 on y Vf ₁ ^ tZt Ju,? ^X) ' ^while *> * clamp «clamp 130 v ^ rH, S ^1- , ^{as +} V- ⁵ W * ^{1 an de}

?. desTesten ToSSL ^TO. '"!^" ^ ends level medium restellrt eekonfJ, j I ^fo teenden stage (not represent in alternately ™' 7 "u * · ^'ψ ι ™ * ^η ^ ^Γα -?. ^{u (stages} des sSLf ·. ^de _t ^r . ^Taklim P ^{ulse becomes β ώ <}

It was pushed som ^ I ^ "* J ^Imunter.
dune eiws rinriüJp " ⁶ ' ⁸¹ '. ^{030 K by the use}

Preload moSchk »" ⁸¹⁸¹⁰ ? - ^z " ^r ^« f ^{ung 6} ^ of a oneS- ^Is !: J; ^{grow strong} n ^d e stages medium

The presnannun «^ !! ^{CS ρΓ} ° ^{Stüfe zu koppC} ' ⁿ

ensures a ni

11th

Power dissipation and eliminated

SUE Af _Sr ££ ^ ₁ SA?

turn. Early tune of 5 is disabled, and when the clock signal is 0 volts, is

In accordance with the honor ^ the ρ _ransistor , _{eitend and the n} .Tortrans.stor

F i g. 2 B and ^{blocked with regard to d} «^""""g ¹⁰ ^. By using p-» nd n-expansion according to _fig Bias shift register complementary inverter ⁵ ^ ^{εη circuits} have become necessary, the e.ne (60) to hold, which are coupled by 'TortraasJ ⁰ ™ ™? Ju * £ - «compensating the threshold voltage Vr of the n-line, in connection with ener Vo ^ «* ^P _{de n transistors and the} other (SO) for Kompenschaltung, wherein the Vorspjnnu" ξ ^ ™ ^"8" _{of the smoldering ens} i p _in voltage of the p-Trans.storen _Jeren η-type is also. In such a ^ w'ung * ^ amplifying stage a gate element arrangement - the bias voltage trans ^ orzw, ^ P ^. ^ ^. _lndem ^. see the positive potential + K and a like gate transistors and to the pre-source line, so a ^ "» "gJEffirX * tension the amplifying stages two bias line, are switched, ^di % f. ^al ^ f ^^ m- bodice of the first or second conductivity type, Iep-conductive ^ ™ ^s «™ ² ™ 'J ^ J ™ _st , a single clock signal is sufficient, the data are connected to complementary inverter stages. Shift register through.

F i g. 4 shows a Sch.ebereg.ster with a Uoope ^ ^ ^ _{Eri] naung was indeed on} circuit arrangement

preload arrangement, explained at oem au, in which the preload _circuit

ziger phase clock pulse ^ forderhch is De current path g _{Til m} ^ _{calibrate Leit} f _AEHI glc _e itstyp

preload _faults explained in which the preload

ziger phase clock pulse is ^ forderhch De current path _{from Transislor} g ^ f _{calibrate Leit AEHI} glc _e itstyp

Itf st on * ™ J ^^ X% £ i jdh on it

ziger Phasentaktpul _{Transislor from} ^ _{calibrate Leit} f _AEHI glc _e Ityp

each inverter stage is included on the * ™ J ^^ X ™% £ like the gate transistor. But be on it

p-leuenden Trans.stor ^ ^ι * ^ ^η ^ * ™ ^. _pointed out that the invention also works with some

circuit 50 and * ^ma "^ ren JEnde ™ t e. J ^ _bias circuit can be realized

attitude 60 from η ¹ JJ _{i ii} i _i Zdid dr resistance

circuit 50, and * ^ma "^ ren Jende ™ J ^ _{Vorspannuilgsschaltung realized} voltage circuit 60 from η ¹ JJ ^ _{can Step Example} i _sweise Zener diodes or Widerlnverter are may contain means« «itiansisior β ■. stands voltage divider prakkoppelt a. yet f. ^be f ^ 'iSigkeSyps alternately to provide constant bias. However, in relation to the ^ « ^m 8" _tn / ^ _{m pr} , _ten, the use of transistors ensures to be. So if the first one »y» · """; ^ _de " _r ' _next 3 ° of the same type and of the same conductivity type for ate conductivity type .st, e.g. P " ¹⁶ ', ¹ ^ l _{conductive) etc.} The bias circuit and that Gate link a sehi from the second L ^^ '^ Jf''t Glihlf d Tturhaben we schor

Conductive type, ^ l _{conductive) etc.} The bias circuit and the gate member

from the second L ^^ '^ Jf'e' of contrary-good synchronism and temperature behavior, w.e schor

ÜSrä ^ iSSSSSi working with one was mentioned.

1 sheet of drawings

Claims (7)

and that the second main elec- tric is the Jbr V «. Patent claims: 1. The switching arrangement controlled by a gate circuit according to an arrangement with at least one amplifier _{element, 5 "." Nwc "β indicates} that the control electrode from the gate circuit em stricter (27α) of each stage (120) of the sliding is supplied to input signal strong after top * a = "I ^^ c ^ t ^ L a threshold value which Verstarker- ^reg ₀ ^iS tnwendS of the switching arrangement according to Anelement in the conduction state controls and whose * · ™ ^w"; "" .? w is characterized by two, the overall one main electrode as the output electrode spniJ ⁷ or »· S clock pulse pool cues (Φ switched ,, and wherein the gate, the ^ i ^ SeTaktiripulseandieSteuerelektroden main current path of each of its control electrode? ^A f ^ SSoren (32a) second stage (120) gate transistor controlled with gate signals um- rr I send the second clock pulse to the sums, which is conductive in both directions and in 'f ^ Ji of gate transistors (32b) of one conduction direction a shift of 15 J ^ ÄJKdai stages supplies its input electrode to its output intermediate ο electrode transmitted signal with regard to a
Reference level around its for control in the
Conduction state causes the threshold voltage to be overcome, the threshold voltage of the ao ■ - Gate transistor greater than the threshold voltage
of the amplifier element is characterized in that the second main electrode of the Verstärkerelemenies (27a) a pre- Frfindune ifft at / a by a gate voltage circuit (50, 60) which comprises a ₅ J «^ switching arrangement having at least one, one of the by the threshold voltage of the gate Sr "" ¹ ! ¹ /, - ^ _n , the control electrode of which de, transistor (32) caused signal _{shift ent- ™ f a} ,, _un - _an input signal is supplied, ve, - provides counteracting bias. _che i after exceeding a threshold value the Ve- 2. Switching arrangement according to claim 1, characterized cnes ' ™. _{controls the} conduction state, characterized in that the bias voltage generated by the bias voltage 30 ^ "ereiem, _{electrode as an} output electrical circuit (50, 60) amounts to ^de " f \ ^e ™ ¹ ^ _{at which} the gate circuit dt moderately practically the same the Suiwave voltage ^^^^ e one at its control electrode n, ·. (Vr) of the gate transistor (32, 42). TorsKen driven gate transistor includes, d -r 3. Switching arrangement according to claim 1 or 2, ^ S _{n directions} is conductive and in a Le, do _t v characterized in that the biasing 35 ⁱⁿ ? ^e ° ^en * | JT _e shift of the additional transistor (52, 62) transmitted from its input circuit (50, 60) the main current path of a reftwng «ne _output selector diode, which" 5 ^? "; ^, ^ of a reference level around its to has a threshold voltage (V _T ) and between! ' ⁸ ^ " ⁿ ' ⁿ ?' _the conduction state to be overcome a reference voltage terminal (ground, + K) and control ^ mden g _where ^ _welding . the second main electrode of the amplifier element 40 lf ™ ^ l ^ * _xmu « _O n ^ r as the threshold the second main electrode of the amplifier element l ^^ l ^ _xmu « _O n vöter Is connected (27a) to which it oltage the bias of the ^^^ _is. t ^S P | l Is connected (27a) to which it _is pag the bias ^^^. generated. ^S P - | _{f of} circuits one looks for a 4. A circuit arrangement according to claim 3, characterized "j- ^ in circuit operation with a minimum in that both the gate transistor (32, ^" Jf ™ _Build iementen get on. In particular, 42) and the transistor (52, 62) of the pre- 45 ^Ana "f ^ SSertM circuits on this voltage circuit (50, 60) increase field rect transistors ^? ^ J ^^^ _m and are through with an isolated control electrode that the main ^^ iSÄuÄlarf of the individual circuit current path of the gate trans stors the coupling ^e ^ ^e _k ^ ™ f _e S; _{Generating circuit parts of} which more between an input signal source and the predetermined plate area under the control electrode of the amplifier element (27a) are on a pre-geoc represents and that the source-discharge route of the ^to ? f _n ⁿ ^ ⁿ _{d point of} view of the reduction of Transistors of the bias ^{circuit between U} "^ J _{are dar} £ _{r for} signal transmission the reference voltage terminal (ground, -f- K) and the ^ ° .χ ^ _η ^ _1η6 η circuit parts gate elements with only second main electrode of the amplifier element ™ ^ ™ Nahrungsmittel ^η £ ^ _{5ΐοΐ binder} suitable. In the- is switched. . _ΛΑΑ u «rtiaen Tordiedern changes the circuit» · 5. Switching arrangement according to claim 4, characterized in that the amplifier element e, n type de ^ T ₌ to «m ^ b ^ ^ g ^ ^ transistor (27a) ar igen lorgueaern a ^ ^" ^. * _{Value of the} input signal in the source circuit 6. Switching arrangement according to claim 4 or 5, ^ J ^ SiS ^ and for another value of the characterized in that the control electrode 6o g ^ J ^ g ^ Stenfo, ^ or emitter follower of the gate transistor (32) S _Ig signals with levels can be supplied "PS ^ pSgerbetrieb reaches the output levels, which block its main current path or make ^^^ Zvoltage because of the threshold voltage of the gate that acts in the passage. 7. Use of the switching arrangement according to a ~! ™ ^b ] 3J ^ _ollen value of the input voltage, or several of the preceding claims, because 6 ₅ «store not open ν. ^O1 ' ^c "" ° _{γ of the gate} . Characterized in that several gate-controlled JgJ ^^^ i ^ cfcend ^ & am A * switching arrangements are connected in series to form a multi-stage shift register .