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DE19983517T1 - Verfahren und Einrichtung zur Abzweigvorhersage unter Verwendung einer Abzweig-Vorhersagetabelle einer zweiten Stufe - Google Patents

Verfahren und Einrichtung zur Abzweigvorhersage unter Verwendung einer Abzweig-Vorhersagetabelle einer zweiten Stufe

Info

Publication number
DE19983517T1
DE19983517T1 DE19983517T DE19983517T DE19983517T1 DE 19983517 T1 DE19983517 T1 DE 19983517T1 DE 19983517 T DE19983517 T DE 19983517T DE 19983517 T DE19983517 T DE 19983517T DE 19983517 T1 DE19983517 T1 DE 19983517T1
Authority
DE
Germany
Prior art keywords
branch prediction
stage
prediction table
stage branch
prediction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19983517T
Other languages
English (en)
Other versions
DE19983517B4 (de
Inventor
Tse-Yu Yeh
Harshvardhan Sharangpani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE19983517T1 publication Critical patent/DE19983517T1/de
Application granted granted Critical
Publication of DE19983517B4 publication Critical patent/DE19983517B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3804Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • G06F9/3844Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE19983517T 1998-09-08 1999-08-26 Verfahren und Einrichtung zur Abzweigvorhersage unter Verwendung einer Abzweig-Vorhersagetabelle einer zweiten Stufe Expired - Fee Related DE19983517B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/149,885 1998-09-08
US09/149,885 US6553488B2 (en) 1998-09-08 1998-09-08 Method and apparatus for branch prediction using first and second level branch prediction tables
PCT/US1999/019892 WO2000014628A1 (en) 1998-09-08 1999-08-26 A method and apparatus for branch prediction using a second level branch prediction table

Publications (2)

Publication Number Publication Date
DE19983517T1 true DE19983517T1 (de) 2002-07-11
DE19983517B4 DE19983517B4 (de) 2006-12-07

Family

ID=22532208

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19983517T Expired - Fee Related DE19983517B4 (de) 1998-09-08 1999-08-26 Verfahren und Einrichtung zur Abzweigvorhersage unter Verwendung einer Abzweig-Vorhersagetabelle einer zweiten Stufe

Country Status (8)

Country Link
US (1) US6553488B2 (de)
KR (1) KR100411529B1 (de)
CN (1) CN1302376C (de)
AU (1) AU5699299A (de)
DE (1) DE19983517B4 (de)
GB (1) GB2357871B (de)
TW (1) TW455810B (de)
WO (1) WO2000014628A1 (de)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6546481B1 (en) 1999-11-05 2003-04-08 Ip - First Llc Split history tables for branch prediction
US7107437B1 (en) * 2000-06-30 2006-09-12 Intel Corporation Branch target buffer (BTB) including a speculative BTB (SBTB) and an architectural BTB (ABTB)
JP4027620B2 (ja) * 2001-06-20 2007-12-26 富士通株式会社 分岐予測装置、プロセッサ、及び分岐予測方法
US7024545B1 (en) * 2001-07-24 2006-04-04 Advanced Micro Devices, Inc. Hybrid branch prediction device with two levels of branch prediction cache
US7343397B2 (en) * 2002-03-29 2008-03-11 Lucent Technologies Inc. Method and apparatus for performing predictive caching of DNS requests by correlating IP addresses
US6978361B2 (en) * 2002-09-20 2005-12-20 International Business Machines Corporation Effectively infinite branch prediction table mechanism
US7831817B2 (en) * 2003-04-15 2010-11-09 Arm Limited Two-level branch prediction apparatus
JP2007527050A (ja) * 2003-07-09 2007-09-20 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 分岐予測の方法およびシステム
US20050015578A1 (en) * 2003-07-14 2005-01-20 Kimming So Two-bit branch prediction scheme using reduced memory size
JP2005149297A (ja) * 2003-11-18 2005-06-09 Renesas Technology Corp プロセッサおよびそのアセンブラ
US7243219B2 (en) * 2003-12-24 2007-07-10 Intel Corporation Predicting instruction branches with a plurality of global predictors using varying amounts of history instruction
US20050149680A1 (en) * 2003-12-30 2005-07-07 Intel Corporation Fast associativity collision array and cascaded priority select
US20050283593A1 (en) * 2004-06-18 2005-12-22 Vladimir Vasekin Loop end prediction
US7890735B2 (en) * 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
US7752426B2 (en) * 2004-08-30 2010-07-06 Texas Instruments Incorporated Processes, circuits, devices, and systems for branch prediction and other processor improvements
US7428632B2 (en) * 2004-09-14 2008-09-23 Arm Limited Branch prediction mechanism using a branch cache memory and an extended pattern cache
US7836288B2 (en) * 2004-09-14 2010-11-16 Arm Limited Branch prediction mechanism including a branch prediction memory and a branch prediction cache
DE102005001679B4 (de) * 2005-01-13 2008-11-13 Infineon Technologies Ag Mikroprozessor-Einrichtung, und Verfahren zur Branch-Prediktion für conditional Branch-Befehle in einer Mikroprozessor-Einrichtung
US8255745B2 (en) 2005-08-29 2012-08-28 The Invention Science Fund I, Llc Hardware-error tolerant computing
US7779213B2 (en) * 2005-08-29 2010-08-17 The Invention Science Fund I, Inc Optimization of instruction group execution through hardware resource management policies
US7877584B2 (en) * 2005-08-29 2011-01-25 The Invention Science Fund I, Llc Predictive processor resource management
US8214191B2 (en) 2005-08-29 2012-07-03 The Invention Science Fund I, Llc Cross-architecture execution optimization
US7725693B2 (en) * 2005-08-29 2010-05-25 Searete, Llc Execution optimization using a processor resource management policy saved in an association with an instruction group
US7627739B2 (en) * 2005-08-29 2009-12-01 Searete, Llc Optimization of a hardware resource shared by a multiprocessor
US7493516B2 (en) * 2005-08-29 2009-02-17 Searete Llc Hardware-error tolerant computing
US8516300B2 (en) 2005-08-29 2013-08-20 The Invention Science Fund I, Llc Multi-votage synchronous systems
US7739524B2 (en) * 2005-08-29 2010-06-15 The Invention Science Fund I, Inc Power consumption management
US8423824B2 (en) 2005-08-29 2013-04-16 The Invention Science Fund I, Llc Power sparing synchronous apparatus
US8402257B2 (en) * 2005-08-29 2013-03-19 The Invention Science Fund I, PLLC Alteration of execution of a program in response to an execution-optimization information
US7647487B2 (en) * 2005-08-29 2010-01-12 Searete, Llc Instruction-associated processor resource optimization
US7512842B2 (en) * 2005-08-29 2009-03-31 Searete Llc Multi-voltage synchronous systems
US20070050605A1 (en) * 2005-08-29 2007-03-01 Bran Ferren Freeze-dried ghost pages
US7539852B2 (en) * 2005-08-29 2009-05-26 Searete, Llc Processor resource management
US8181004B2 (en) 2005-08-29 2012-05-15 The Invention Science Fund I, Llc Selecting a resource management policy for a resource available to a processor
US8209524B2 (en) 2005-08-29 2012-06-26 The Invention Science Fund I, Llc Cross-architecture optimization
US20070288732A1 (en) * 2006-06-08 2007-12-13 Luick David A Hybrid Branch Prediction Scheme
US8301871B2 (en) * 2006-06-08 2012-10-30 International Business Machines Corporation Predicated issue for conditional branch instructions
US7487340B2 (en) * 2006-06-08 2009-02-03 International Business Machines Corporation Local and global branch prediction information storage
US8935517B2 (en) * 2006-06-29 2015-01-13 Qualcomm Incorporated System and method for selectively managing a branch target address cache of a multiple-stage predictor
US7472264B2 (en) * 2006-06-30 2008-12-30 Sun Microsystems, Inc. Predicting a jump target based on a program counter and state information for a process
US20080040591A1 (en) * 2006-08-11 2008-02-14 Moyer William C Method for determining branch target buffer (btb) allocation for branch instructions
US20080040590A1 (en) * 2006-08-11 2008-02-14 Lea Hwang Lee Selective branch target buffer (btb) allocaiton
US7533252B2 (en) * 2006-08-31 2009-05-12 Intel Corporation Overriding a static prediction with a level-two predictor
TW200816282A (en) * 2006-09-27 2008-04-01 Promos Technologies Inc Method for reducing stress between a conductive layer and a mask layer and use of the same
US8782384B2 (en) * 2007-12-20 2014-07-15 Advanced Micro Devices, Inc. Branch history with polymorphic indirect branch information
US8909907B2 (en) * 2008-02-12 2014-12-09 International Business Machines Corporation Reducing branch prediction latency using a branch target buffer with a most recently used column prediction
US7890739B2 (en) * 2008-02-19 2011-02-15 Oracle America, Inc. Method and apparatus for recovering from branch misprediction
US9021240B2 (en) * 2008-02-22 2015-04-28 International Business Machines Corporation System and method for Controlling restarting of instruction fetching using speculative address computations
US20110093658A1 (en) * 2009-10-19 2011-04-21 Zuraski Jr Gerald D Classifying and segregating branch targets
CN102306094B (zh) * 2011-08-16 2014-03-26 北京北大众志微系统科技有限责任公司 实现现代处理器间接转移预测的装置及方法
US8739186B2 (en) 2011-10-26 2014-05-27 Autodesk, Inc. Application level speculative processing
US8959320B2 (en) * 2011-12-07 2015-02-17 Apple Inc. Preventing update training of first predictor with mismatching second predictor for branch instructions with alternating pattern hysteresis
US9009734B2 (en) * 2012-03-06 2015-04-14 Autodesk, Inc. Application level speculative processing
US9235419B2 (en) * 2012-06-11 2016-01-12 International Business Machines Corporation Branch target buffer preload table
US9262169B2 (en) 2012-06-11 2016-02-16 International Business Machines Corporation Branch prediction table install source tracking
US9250909B2 (en) 2012-06-12 2016-02-02 International Business Machines Corporation Fast index tree for accelerated branch prediction
US9250912B2 (en) * 2012-06-12 2016-02-02 International Business Machines Corporation Fast index tree for accelerated branch prediction
US9430241B2 (en) 2012-06-15 2016-08-30 International Business Machines Corporation Semi-exclusive second-level branch target buffer
US9298465B2 (en) 2012-06-15 2016-03-29 International Business Machines Corporation Asynchronous lookahead hierarchical branch prediction
US9280351B2 (en) 2012-06-15 2016-03-08 International Business Machines Corporation Second-level branch target buffer bulk transfer filtering
US9563430B2 (en) 2014-03-19 2017-02-07 International Business Machines Corporation Dynamic thread sharing in branch prediction structures
US20150268961A1 (en) * 2014-03-21 2015-09-24 Samsung Electronics Co., Ltd. Decoupling l2 btb from l2 cache to accelerate search for miss after miss
US10241800B2 (en) * 2015-06-16 2019-03-26 International Business Machines Corporation Split-level history buffer in a computer processing unit
US10592248B2 (en) * 2016-08-30 2020-03-17 Advanced Micro Devices, Inc. Branch target buffer compression
US10747539B1 (en) 2016-11-14 2020-08-18 Apple Inc. Scan-on-fill next fetch target prediction
US10613867B1 (en) * 2017-07-19 2020-04-07 Apple Inc. Suppressing pipeline redirection indications
US10929136B2 (en) * 2018-04-11 2021-02-23 Futurewei Technologies, Inc. Accurate early branch prediction using multiple predictors having different accuracy and latency in high-performance microprocessors
US10817299B2 (en) * 2018-09-07 2020-10-27 Arm Limited Handling multiple control flow instructions
CN111209044B (zh) * 2018-11-21 2022-11-25 展讯通信(上海)有限公司 指令压缩方法及装置
US11163573B2 (en) * 2019-02-13 2021-11-02 International Business Machines Corporation Hierarchical metadata predictor with periodic updates
US11614944B2 (en) * 2020-11-09 2023-03-28 Centaur Technology, Inc. Small branch predictor escape
US12236244B1 (en) * 2022-06-30 2025-02-25 Apple Inc. Multi-degree branch predictor

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5230068A (en) * 1990-02-26 1993-07-20 Nexgen Microsystems Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence
US5163140A (en) * 1990-02-26 1992-11-10 Nexgen Microsystems Two-level branch prediction cache
US5608886A (en) * 1994-08-31 1997-03-04 Exponential Technology, Inc. Block-based branch prediction using a target finder array storing target sub-addresses
US5732253A (en) * 1994-10-18 1998-03-24 Cyrix Corporation Branch processing unit with target cache storing history for predicted taken branches and history cache storing history for predicted not-taken branches
US5815700A (en) * 1995-12-22 1998-09-29 Intel Corporation Branch prediction table having pointers identifying other branches within common instruction cache lines
AU3666697A (en) * 1996-08-20 1998-03-06 Idea Corporation A method for identifying hard-to-predict branches to enhance processor performance
US5995749A (en) * 1996-11-19 1999-11-30 Advanced Micro Devices, Inc. Branch prediction mechanism employing branch selectors to select a branch prediction
US5903750A (en) * 1996-11-20 1999-05-11 Institute For The Development Of Emerging Architectures, L.L.P. Dynamic branch prediction for branch instructions with multiple targets
US6119222A (en) * 1996-12-23 2000-09-12 Texas Instruments Incorporated Combined branch prediction and cache prefetch in a microprocessor
US5802602A (en) 1997-01-17 1998-09-01 Intel Corporation Method and apparatus for performing reads of related data from a set-associative cache memory
US5805878A (en) * 1997-01-31 1998-09-08 Intel Corporation Method and apparatus for generating branch predictions for multiple branch instructions indexed by a single instruction pointer
US5978909A (en) * 1997-11-26 1999-11-02 Intel Corporation System for speculative branch target prediction having a dynamic prediction history buffer and a static prediction history buffer

Also Published As

Publication number Publication date
US6553488B2 (en) 2003-04-22
US20010047467A1 (en) 2001-11-29
GB0105285D0 (en) 2001-04-18
KR100411529B1 (ko) 2003-12-18
WO2000014628A1 (en) 2000-03-16
CN1302376C (zh) 2007-02-28
CN1328664A (zh) 2001-12-26
GB2357871A (en) 2001-07-04
DE19983517B4 (de) 2006-12-07
TW455810B (en) 2001-09-21
GB2357871B (en) 2003-09-24
AU5699299A (en) 2000-03-27
KR20010074978A (ko) 2001-08-09

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Legal Events

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OP8 Request for examination as to paragraph 44 patent law
8607 Notification of search results after publication
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20110301