DE19844418A1 - Protective layer, useful for protecting complementary metal oxide semiconductor circuits during wet alkali etching of micromechanical silicon elements, comprises a plasma deposited carbon-containing layer or plasma treated photoresist layer - Google Patents

Abstract

A (complementary metal oxide semiconductor) CMOS compatible protective layer, obtained by plasma deposition of a carbon-containing layer or by plasma treatment of a photoresist layer, is new. An Independent claim is also included for production of the above protective layer by (i) treating a photoresist layer with a halocarbon-containing plasma; (ii) depositing a hydrogen-containing amorphous carbon layer from a halocarbon plasma; or (iii) sputter depositing an amorphous carbon, hydrogen-containing amorphous carbon or nitrogen-containing amorphous carbon layer. Preferred Features: The protective layer is 100-2000 nm thick. The photoresist treatment plasma contains a sulfur halide and the deposition plasma contains up to 50 vol.% halocarbon, especially a fluorocarbon.

Description

The invention relates to a CMOS-compatible protective layer for microstructure technology and manufacturing processes such a protective layer.

When integrating CMOS technology (CMOS Complemen tary metal oxide semiconductor) in the conventional micro mechanics there is the problem that when wet etching micromechanical silicon elements one before manufactured CMOS circuit by the alkaline etching medium can be damaged. In micromechanics namely structured silicon nitride protective layers used to to cover those areas that are not etched should. However, such a protective layer should the wet etching would be removed again, then protection would be layer advantageous which is selective towards silicon nitride is etchable. Silicon nitride is often used as a cover layer of CMOS circuits and this layer would then also be removed.

To avoid such problems, and also from procedural reasons, the wafers are usually ge from the back etches; the front of the wafer is covered by a special complex device protected from the etching medium. This means, however, that only a single wafer process is possible. A cover layer that can be removed again in a simple manner would protect the CMOS circuit and cost one enable cheaper batch process.

It is known that silicon carbide layers or silicon Layers with implanted carbon against alkaline etching solutions are stable (see: "Nuclear Instruments and Methods in Physics Research ", Vol. B79 (1993), pages 668 to 671,  and "Journal of the Electrochemical Society", vol. 138 (1991), No. 5, pages L3 and L4). However, such layers are not selective with respect to silicon nitride remove.

Organic materials, such as polyethylene, are in principle stable against alkaline etching solutions. For very thin films however, the etching solution can diffuse through the layer because such polymers are not really dense, except in the high networked state. In this case, the problem is there but in that highly cross-linked polymer films on a substrate bring to; highly cross-linked polymers are insoluble. If the polymers are first to be crosslinked on the substrate, then this requires functional groups. Layers out such polymers are not sufficiently alkali resistant. For example, by tempering ent speaking polymer precursors in common solvents are soluble and therefore, for example, by spin coating can be applied to the substrate in thin films, completely insoluble polybenzoxazole and polyimide films be put. Such layers are in hot con centered alkaline silicon etching solutions not resistant.

The object of the invention is to provide CMOS-stable protective layers to provide for microstructure engineering which is a very have high stability to alkaline etching solutions, especially against hot alkali solutions, such as potassium hydroxide solution (KOH), sodium hydroxide solution (NaOH) and tetramethylammonium hydroxide (TMAH).

According to the invention, this is achieved by protective layers, by plasma deposition of a carbon-containing layer or obtained by plasma treatment of a photoresist layer can be.

The protective layers according to the invention, which are preferably a Have layer thickness of 100 to 2000 nm are due to the  Plasma deposition or by plasma treatment (plasma modification) so compressed that they can be used even in hot conc alkaline silicon etching solutions are stable. The have highly cross-linked layers - at least on the surface - no partial structures attackable by hydroxyl ions, rather, they only show C-C-, C-F-, C-Cl- or C-H bonds.

The production of the protective layers according to the invention can done in different ways. There is a possibility rin, a layer of photoresist with a halocarbon treat substance-containing plasma, d. H. to modify. The Photoresist layer is on a substrate, on a silicon substrate, the CMOS circuits having. Photoresists are light-sensitive, film-forming Materials (photoresists) whose solubility behavior changes changes by exposure or radiation. To make the Protective layers can be both positive and negative processing photoresists can be used. Preferably be Novolak-based photoresists are used. More suitable Resists are those based on phenolic resins, poly vinylphenol and its derivatives as well as copolymers with Vinylphenol.

As halogenated hydrocarbons, compounds such as trifluoromethane (CHF ₃ ), chlorotrifluoromethane (CClF ₃ ), dichlorodifluoromethane (CCl ₂ F ₂ ), 1,2-dichlorotetrafluoroethane (C ₂ Cl ₂ F ₄ = ClF ₂ C-CClF ₂ ), 1, 1,1-trichlorotrifluoroethane (C ₂ Cl ₃ F ₃ = Cl ₃ C-CF ₃ ), 1,1,2-trichlorotrifluoroethane (C ₂ Cl ₃ F ₃ = Cl ₂ FC-CClF ₂ ) and chlorine trifluoroethene (C ₂ ClF ₃ = ClFC = CF ₂ ) or mixtures of such compounds are used; Many other chlorofluorocarbons (CFCs) are also suitable. The plasma can also contain sulfur halides, especially sulfur hexafluoride (SF ₆ ).

A further possibility for producing the protective layers is to deposit a layer of amorphous hydrogen-containing carbon (aC: H) from a hydrocarbon plasma on a substrate; the substrate is a silicon substrate that has CMOS circuits. Examples of hydrocarbons are methane (CH ₄ ), ethane (C ₂ H ₆ ), ethene (C ₂ H ₄ ), ethine (C ₂ H ₂ ), hexane (C ₆ H ₁₄ ), cyclohexane (C ₆ H ₁₂ ) and toluene (C ₆ H ₅ -CH ₃ ) or a mixture of such compounds. The plasma can also contain a halogenated hydrocarbon such as trichlorotrifluoroethane (C ₂ Cl ₃ F ₃ ), in particular a fluorohydrocarbon such as trifluoromethane (CHF ₃ ), tetrafluoromethane (CF ₆ , hexafluoropropene (C ₃ F ₆ = CF ₂ = CF- CF ₃ ) and octafluorocyclobutane (C ₄ H ₈ ). The proportion of halogenated hydrocarbon in the plasma is up to 50% by volume, preferably up to 30% by volume. In this way, aC: H (F) layers are formed , ie layers of amorphous carbon, which contain both hydrogen and fluorine.

It is also possible to use a substrate, i. H. a CMOS circuit silicon substrate with a sputter layer made of amorphous carbon (a-C), amorphous hydrogen-containing Carbon (a-C: H) or amorphous nitrogenous carbon to coat fabric (a-C: N). This is done using a Carbon targets in a plasma, in particular from argon, the - up to 20 vol .-% - hydrogen or a hydrocarbon substance, such as methane, or halogenated hydrocarbon, such as tri fluoromethane (formation of a-C: H (F) layers), or nitrogen can be added.

The invention is intended to be based on exemplary embodiments are explained in more detail.  

example 1 Treatment of a photoresist with a plasma ("Modification tion ")

A silicon substrate having CMOS circuits is coated with a commercial positive photoresist, for example based on novolak. The areas intended for wet etching with an alkali solution are defined by means of photolithography, ie the resist is exposed through a mask and then developed, the CMOS circuits to be protected remaining covered. The remaining resist structures are then treated with a CCl ₂ F ₂ / CHF ₃ or C ₂ Cl ₃ F ₃ / SF ₆ plasma. The surface of the resist is converted into a polytetra fluorethylene-like layer by reactive ion etching (RIE = Reactive Ion Etching) (see Table 1). This layer material has a very high alkali resistance, so that in the subsequent wet etching step (20% KOH, 60 ° C, 60 min) all areas that were covered by the modified resist are protected. After the wet etching, the modified resist can easily be removed in an oxygen plasma (asher) without metal, silicon oxide or silicon nitride layers of the CMOS circuits being attacked.

Table 1

Composition of the photoresist surface before or after the reactive ion etching in a C ₂ Cl ₃ F ₃ / SF ₆ plasma

Using XPS examinations (X-Ray Photoelectron Spectroscopy) it was found that the C-H groups of the resist were replaced by the  Plasma treatment in polytetrafluoroethylene-like C-F compound be converted.

The alkali resistance of the modified resist in etching solutions at various temperatures was investigated in a series of experiments. The test results are summarized in Table 2.

Example 2 Deposition of an a-C: H or a-C: H (F) layer from one plasma

A silicon substrate having CMOS circuits is produced all over with an approx. 300 nm thick a-C: H- or a-C: H (F) - Layer. This is done with a hydrocarbon Plasma from methane or ethane, which - with a share up to 30 vol% - a fluorocarbon such as trifluoromethane or octafluorocyclobutane. This will be a Plasma CVD system (4 inch reactor, area ratio anode: Cathode = 2: 1) used, first with an argon plasma (10 sccm, 0.2 mbar, 100 W RF power, 120 s) cleaned and then the a-C: H or a-C: H (F) layer from the hydrocarbon Substance or hydrocarbon / fluorocarbon plasma (approx. 75 sccm, 0.2 to 0.4 mbar, 200 to 50 W RF power, approx. 150 s) is deposited. At the beginning of the deposition, a higher performance set to good adhesion of the layer to achieve. After approx. 30 to 60 s, the power is reduced selt and the pressure increases to the self-stress of the layer too minimize. The coated substrate is then used a commercial positive photoresist, for example Novolak-based, coated; the resist thickness should be min at least 4 times the a-C: H or a-C: H (F) layer thickness be. The pre-for wet etching with an alkali solution areas are defined using photolithography, d. H. the resist is exposed through a mask and then ent wraps, covering the CMOS circuits to be protected stay. Then the remaining structure is transferred resist structures in an oxygen RIE plasma (RIE = Reactive Ion Etching) in the a-C: H or a-C: H (F) layer. The polyethylene-like layer has a very high alkali resistance so that in the following wet etching step (20% KOH, 60 ° C, 60 min) all areas that are structured by the amorphous carbon were protected. After wet etching, the a-C: H or a-C: H (F) protection can  layer easily in an oxygen plasma (ashing) can be removed without metal, silicon oxide or silicon nitride layers of the CMOS circuits are attacked.

Example 3 Deposition of an a-C or a-C: N sputter layer

A silicon substrate having CMOS circuits is provided with an approximately 300 nm thick aC or aC: N sputter layer by means of a carbon target. A sputtering system (Z5 / Leybold) is used for this, first cleaning with an argon plasma (25 sccm, 0.002 mbar, 500 W RF power, 180 s) and then the aC or aC: N layer made of an argon or argon / nitrogen plasma (35 sccm Ar or 30 sccm Ar and 5 sccm N ₂ , 0.004 mbar, 500 W DC power, approx. 1500 s) is sputtered on. The coated substrate is subsequently coated with a commercial positive photo resist, for example based on novolak; the resist thickness should be at least 4 times the aC or aC: N layer thickness. The areas intended for wet etching with an alkali solution are defined by means of photolithography, ie the resist is exposed through a mask and then developed, the CMOS circuits to be protected remaining covered. The remaining resist structures are then transferred to the aC or aC: N layer in an oxygen RIE plasma (RIE = Reactive Ion Etching). This layer has a very high alkali resistance, so that in the subsequent wet etching step (20% KOH, 60 ° C, 60 min) all areas that were covered by the structured amorphous carbon are protected. After the wet etching, the aC or aC: N layer in an oxygen plasma (asher) can be removed without problems without attacking metal, silicon oxide or silicon nitride layers of the CMOS circuits.

Claims (9)

1. CMOS-compatible protective layer for the microstructure technology, obtainable by plasma deposition of a coal substance-containing layer or by plasma treatment of a Photoresist layer. 2. Protective layer according to claim 1, characterized ge indicates that they have a thickness of 100 to 2000 nm. 3. Protective layer according to claim 1 or 2, characterized characterized in that the photoresist Novolak-based resist. 4. Process for producing a protective layer according to a of claims 1 to 3, characterized records that the photoresist layer with a Halogenated hydrocarbon-containing plasma is treated. 5. The method according to claim 4, characterized records that the plasma ent a sulfur halide holds. 6. Process for producing a protective layer according to An saying 1 or 2, characterized net that from a hydrocarbon plasma on a Substrate a layer of amorphous hydrogen-containing Koh lenstoff is deposited. 7. The method according to claim 6, characterized records that the plasma is a halogenated hydrocarbon Contains substance, in particular a fluorocarbon. 8. The method according to claim 7, characterized records that the proportion of halogenated hydrocarbon material in the plasma is up to 50 vol .-%.   9. Process for producing a protective layer according to An saying 1 or 2, characterized net that a substrate with a sputter layer amorphous carbon, amorphous hydrogen-containing carbon Coating material or amorphous nitrogen-containing carbon is tested.