DE19650599A1 - Power semiconductor device with trench-IGBT cells - Google Patents

Abstract

A power semiconductor device, in the form of a trench insulated gate bipolar transistor (TIGBT) with adjacent identical cells, has a first conductivity type substrate region (1), a second conductivity type back face emitter (12), a vertical MOS structure and a stripe, island or grid arrangement of trench structures (5) which have a gate insulation (6) on all sides facing the silicon and which are provided with a polysilicon filling (7) and a covering passivation layer (8). The novelty is that each cell includes two narrow trench structures (5) which are (a) provided, at each cell exterior-facing vertical side, with a vertical MOS structure consisting of a second conductivity type bulk region (2), connected to the emitter electrode by a second conductivity type connection region (4), as well as a first conductivity type source or emitter region (3), located within the bulk region (2) and optionally connected to the emitter electrode; and (b) provided, between the cell interior-facing vertical sides, with a second conductivity type doped region, an insulation region (17) or a first conductivity type substrate region.

Description

The invention describes an IGBT (insulated gate bipolar transistor) with a trench Gate structure (also called trench gate structure) according to the features of the generic term of claim 1.

IGBTs with a trench gate structure have recently been known in the prior art become. Trench structures themselves are widely used for the manufacture of Memory cells used for highly integrated memory circuits. Are also known Power semiconductor components with trench structures, in particular they become Realization of the gate complex used for some time. Here are vertical examples DMOS transistors (double diffused MOS transistors) for the lower one Voltage range (<100 V).

For these trench MOS transistors, narrow trench trenches with little vertical Depths used, e.g. B. about 1.5 microns deep and about 1.5 microns wide for 50 V MOSFET. Doing so a high density of these trench structures is aimed at a high channel width per Area unit to achieve. The production of the trench-gate complex for this trench MOS transistors correspond to the state of the art according to EP 0698 919 A2.  

The technical background of trench technology should first be based on an example of a Application are explained in more detail, since trench gate structures are also already for IGBT were proposed and used (IEDM, Techn. Digest., pp. 674-677, 1987).

Fig. 1 shows such an arrangement according to the prior art in a not-to-scale cross-section of a cell as a sketch. First of all, a distinction is made in principle between a non-punch-through IGBT structure, characterized by a thick n⁻ substrate ( 1 ) and a thin p-emitter ( 12 ) implanted on the rear as a collector of the overall component, as shown in FIG. 1. A second variant, not shown, is formed by a punch-through IGBT structure, which is characterized by a p⁺ substrate, on which a first n-doped intermediate layer and a second lightly doped epitaxially deposited n⁻ layer have been applied.

The cell structure on the top of the wafer is the same for both types. It consists of a p-bulk region ( 2 ), the n⁺-source regions ( 3 ) and the p⁺-bulk connection regions ( 4 ), which are interrupted by vertical etched trenches or trenches ( 5 ) arranged in strips or grids. These trench structures ( 5 ) are provided on all sides with silicon with a gate insulator ( 6 ), filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ) towards the aluminum ( 9 ).

Polysilicon ( 7 ), gate insulator ( 6 ) and p-region ( 2 ) form a MOS capacitor of the internal MOSFET, whose channel ( 11 ) between the n⁺-source region ( 3 ) and the n⁻-substrate ( 1 ) on vertically the side wall of the trench is created. The trench gate structures arranged in strips or in the form of a grid are connected to one another in the z direction to form a common gate connection ( 15 ).

The n + source regions ( 3 ) and the p + connection regions ( 4 ) of all cells formed in this way are connected to one another via an aluminum metallization ( 9 ). The metallization represents the emitter connection ( 14 ) of the IGBT. With the exception of the bond areas, the entire structure is covered with a passivation layer ( 10 ). The collector ( 16 ) of the IGBT is formed by a further metallization ( 13 ) on the back of the wafer.

Mitsubishi (Proc. ISPSD'94, pp. 411-416, Davos, 1994), derived from the Trench MOSFET structures, trench gates with a depth of approx. 3 µm and a full width approx. 1 µm for 600 V IGBT presented. The spacing of the striped trenches was varies between 3.5 µm and 14 µm. For small distances you get for this trench IGBT (TIGBT) also a high density of the trench structures.

TIGBT of this type achieve a significantly reduced rate compared to IGBT with a planar gate Forward voltage. This reduction is particularly due to the low channel resistance achieved due to the high channel width per unit area. The disadvantage, however, is that the high channel width the saturation current level compared to IGBT with a planar gate Is increased several times. This significantly shortens the time span in which the component survive a short circuit without destruction.

More recent improvements and changes to the structure of the trench Gate complex proposed. A deepening of the trench gates, e.g. B. of 3 microns to 5 µm or 9 µm a further reduction in the forward voltage. The corners of this narrow and deep structures, however, are significantly stressed when reverse voltage is applied, resulting in a reduction in the static blocking capacity and the avalanche strength dynamic load leads.

However, an improved compromise for all important parameters is achieved if the Trench gate complex is very wide. Broadly stated here means that the Trench width assumes a multiple of the trench depth. Such structures were created in Colloquium "Semiconductor Components and Material Quality Silicon" Freiburg, 1995 and in ISPSD, by Yokohama 1995, pp. 224-229.

This design variant is shown in FIG . The wide trench structures ( 5 ) are provided with a gate insulator ( 6 ) on all sides towards the silicon, completely filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ) towards the aluminum ( 9 ). Between the strip-like or grid arrangement wide trench gate structures 1, the p-Bulkgebiete (2), the n + source regions (3) and the p + bulk terminal areas (4) are similar to FIG. Arranged.

Due to the greatly enlarged trench width, there are large cells and thus a significantly reduced channel width per unit area compared to the structure in FIG. 1. Although this increases the channel resistance of the internal MOSFET, a trench depth that is only slightly greater than the penetration depth of the p -Bulk area is, a lower river voltage for the overall component than achieved with narrow and very deep structures. Due to the reduced channel width, the saturation current level drops considerably and is in the range of the values for IGBT with planar gate. The load on the trenches is also significantly lower in the event of a lock compared to narrow and deep trenches.

Practical applications for a TIGBT with a wide trench-gate complex are not known. In particular, the filling and planarization of the trenches is conventional pure separation process not so easy to implement, there are combinations between Deposition processes and mechanical-chemical planarization processes necessary.

In addition, the so-called miller capacity increases with the increased gate area. The knowledge about the mode of action and properties of IGBT with such a trench gate Complex are considered to be state of the art.

The present invention has set itself the task of a power semiconductor device in the shape of a trench gate IGBT, which in addition to high reverse voltages and low transmission losses also has low switching losses and small saturation currents.

The task is performed in the case of power semiconductor components with an IGBT trench gate structure illustrated type solved by the measures of the characterizing part of claim 1, preferred further developments are presented in the subclaims.

The invention will hereinafter be described by the description of the trench-gate complex shown. The essential inventive idea exists in connection with others yet descriptive measures in it, the effect of the wide trench gate by two narrow to reproduce specific trench structures that are technologically easier to implement.

The inventive ideas are explained below with reference to FIGS. 3 to 9.

Fig. 3 shows the cross section of a variant of the inventive structure in sketch.

FIG. 4 describes a further variant in a further development analogous to FIG. 3.

Fig. 5 presents the complex application of the inventive concept in a similar sketch.

FIG. 6 gives an example of a possible external circuitry according to FIG. 5.

FIG. 7 describes the electrical effect of the measures according to FIG. 5.

FIG. 8 explains a further variant of an exemplary circuit arrangement according to FIG. 5.

Fig. 9 illustrates the total losses as a function of the switching frequency is different trench-gate structures.

Fig. 3 shows a to FIGS. 1 and 2 the analog section of an IGBT cell structure which is the basic repeat structure of the overall device and will be described on the basis of the inventive content. The distance between the two narrow trench structures corresponds to the most favorable width of the trench gate complex from FIG. 2. In contrast to the prior art, the vertical MOS channel ( 11 ) is only produced on the respective outer sides of the two narrow trench structures.

There is first substrate material ( 1 ) between the two trench structures ( 5 ). The trench structures ( 5 ) are provided with a gate insulator ( 6 ) on all sides towards the silicon, completely filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ) towards the aluminum ( 9 ). Between the stripe or lattice-shaped trench gate structures are alternating on one side the p-bulk regions ( 2 ), the n⁺-source regions ( 3 ) and the p⁺-bulk connection regions ( 4 ) and on the one on the other side, the substrate region ( 1 ) is arranged.

The same forward voltages and saturation currents are achieved with this structure as with the structure in FIG. 2. An advantage compared to the structure in FIG. 2 is the simpler technological feasibility, especially the etching and filling of the narrow trenches. However, there is an inhomogeneous charge carrier distribution in the n⁻ region ( 1 ) between the trench cells, which has a disadvantageous effect on the dynamic properties of the component. A reduction in the miller capacity and thus a reduction in switching losses and an improvement in the homogeneity of the charge carrier distribution is achieved by realizing the further inventive ideas presented below.

A first possibility is to partially or completely remove the n⁻ substrate region ( 1 ) between the trench structures and to replace it with a thick insulation region. The thickness of the insulator is chosen so that the upper extent of the insulator either ends below the former substrate surface, lies at the same height as it or projects beyond it.

FIG. 4 describes a further development analogous to FIG. 3. Again, an IGBT cell structure is shown. In this embodiment, the upper limit of the insulator ( 17 ) is at the level of the former substrate surface and the substrate area ( 1 ) between the trench structures was almost completely removed. The trench structures ( 5 ) are provided with a gate insulator ( 6 ) on all sides towards the silicon, completely filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ) towards the aluminum ( 9 ).

Between the stripe or lattice-shaped trench gate structures are alternating on one side the p-bulk regions ( 2 ), the n⁺-source regions ( 3 ) and the p⁺-bulk connection regions ( 4 ) and on the other Side the insulator region ( 17 ) arranged.

The thicker the isolator region ( 17 ) between the trenches is chosen, the smaller the miller capacity, the homogeneity of the charge carrier distribution improves. However, the load on the corner checks on the side of the isolator area ( 17 ) increases in the event of a blockage.

Fig. 5 illustrates the complex application of the inventive concept in a manner analogous to the previous figures section of an IGBT cell structure before. The idea is to insert a p-region ( 18 ) instead of the isolator region ( 17 in FIG. 4). The p-region ( 18 ) has a smaller or the same penetration depth in relation to the p-bulk region ( 2 ).

The penetration depth can alternatively be selected so that the inner door check of the structure is enclosed. The trench structures ( 5 ) are in turn provided with a gate insulator ( 6 ) on all sides towards the silicon, completely filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ) towards the aluminum ( 9 ). Between the trench gate structures arranged in the same way in strips or in a lattice arrangement, the p-bulk regions ( 2 ), the n⁺-source regions ( 3 ) and the p⁺-bulk connection regions ( 4 ) and the p-region ( 18 ) is arranged on the other side.

In the electrical sense, the p-region, the connection ( 19 ) and the metallization ( 20 ) can be operated in a floating manner or connected directly to an external potential or via further elements. Other elements can be, for example, a fixed resistor, a controlled resistor or an external or integrated electronic circuit.

With the structure according to FIG. 5, the forward voltages are just as low as with the previously presented ones of FIGS . 2 to 4. Here, however, the miller capacity is reduced and thus the switching losses are reduced. Furthermore, the inserted p-area provides protection against undesired avalanche regeneration when the barrier is loaded at the corner checks on the side of the p-area ( 18 ). The best effectiveness is given here when these corners are enclosed by the additional p-region. All sketch areas that are no longer described are shown with the same numbering in earlier figures.

FIG. 6 shows an example of a possible external wiring of the structure according to FIG. 5. The basic circuit, such as the p-region, directly or via additional components to an external potential, such as, for example, connected to the emitter potential via the resistor (R _P ) can be outlined. The freewheeling diode (D _F ), the load consisting of L ₁ and R _L , and a leakage inductance L _{2 are also shown} . The leakage inductance L _{2 combined} almost all parasitic wiring inductances.

FIG. 7 shows the electrical effect of the circuitry according to FIG. 6 using the example of a 1200 V IGBT (structure according to FIG. 5, current density 80 A / cm ² , chip area 1 cm ² ) in switch operation. As can be seen here, with a variation in the resistance (R _P ) between the p-region ( 18 ) and the emitter ( 14 ) within the limits of 0.01 to 10 ohms, the size of the three essential loss components, the switch- _on losses W _on , the turn-off losses W _off and the forward voltage U _CE . This influences the losses of the overall component via the p-area and its external wiring.

Furthermore, it can be concluded from FIG. 7 that a further improvement in the electrical properties is achieved by connecting a controlled resistor to the p-region. A certain resistance value when switching off results in a reduction in the switching-off losses and increased robustness, a changed resistance value when switching on minimizes the switching-on losses and causes a low forward voltage. The resistance can be controlled by an electronic circuit, as is shown below in FIG. 8.

FIG. 8 explains a further variant of an exemplary circuit arrangement according to FIG. 6. A variable resistor (R _P ) is realized here by connecting an n- and p-channel MOSFET (T ₁ , T ₂ ) in parallel between the p-region and the emitter whose R _on corresponds to the optimal values for switching on and off and whose gates are connected to the IGBT gate.

FIG. 9 shows the total losses of different trench gate structures as a function of the switching frequency. It is the dependence of the average power loss on the frequency for the structures in FIGS. 2 and 4 and the structure in FIG. 5 as a function of the external wiring shown in summary. In principle, the same static state losses (U _CE) for all 4 variants, the reduced overall losses P _total expression for the lower switching losses by the inventive measures in the structures of Fig. 4 and Fig. 5 with respect to the starting structures of the prior art (FIG . 2).

Claims (4)

1. Power semiconductor component as a trench gate IGBT (insulated gate bipolar transistor) with a substrate region of the first conductivity type ( 1 ), with a vertical MOS structure, with strip, island or lattice-shaped trench structures ( 5 ), which on all sides to silicon back with a gate insulator ( 6 ), filled with polysilicon ( 7 ) and covered with a passivation layer ( 8 ), characterized in that the trench structures ( 5 ) alternately on one vertical flank of vertical MOS structures consisting of bulk areas ( 2 ) of the second conduction type, its connection regions ( 4 ) of the second conduction type and the source or emitter regions ( 3 ) of the first conduction type, and on the other vertical flank of insulator regions ( 17 ), doping regions ( 18 ) of the second conduction type or are surrounded by substrate regions of the first conductivity type ( 1 ). 2. Power semiconductor component according to claim 1, characterized in that the insulator region ( 17 ) consists of silicon dioxide and / or silicon nitride. 3. Power semiconductor component according to claim 1, characterized in that the trench structures ( 5 ) have a trench depth of 1 µm to 15 µm and a trench width between 1 µm and 4 µm, and the distance between the trench structures on one side, the side with the vertical MOS structure, i.e. the MOS transistor connection area ( 3 ) and ( 4 ), depends on the lithography level used to implement the emitter connection ( 14 ) and the distance between the trench structures on the other side, the side with the insulator ( 17 ), Doping ( 18 ) or substrate area ( 1 ), is determined by the specified reverse voltage class of the TIGBT and its trench geometry. 4. Power semiconductor component according to claim 3, characterized in that for a 1200 V TIGBT with a p-bulk region ( 2 ) from 3 µm to 5 µm the trench depth is 4 µm to 6 µm and the trench width is 1 µm to 2 µm, the distance the trench structures on the one hand, the side with the vertical MOS structure, that is to say the MOS transistor connection region ( 3 ) and ( 4 ), is between 4 μm and 10 μm wide and the distance between the trench structures on the other side, the side with the subsequent insulator ( 17 ), doping ( 18 ) or substrate area ( 1 ) is between 15 µm and 25 µm.