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DE19625386A1 - Multilayer, double-sided, flexible or rigid electrical and optical circuit board production avoiding chemicals recovery - Google Patents

Multilayer, double-sided, flexible or rigid electrical and optical circuit board production avoiding chemicals recovery

Info

Publication number
DE19625386A1
DE19625386A1 DE1996125386 DE19625386A DE19625386A1 DE 19625386 A1 DE19625386 A1 DE 19625386A1 DE 1996125386 DE1996125386 DE 1996125386 DE 19625386 A DE19625386 A DE 19625386A DE 19625386 A1 DE19625386 A1 DE 19625386A1
Authority
DE
Germany
Prior art keywords
conductors
circuit board
carrier
depressions
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE1996125386
Other languages
German (de)
Inventor
Raouf Ben Ameur
Helmut Vogel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Priority to DE1996125386 priority Critical patent/DE19625386A1/en
Publication of DE19625386A1 publication Critical patent/DE19625386A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1258—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Manufactures of a circuit board to connect and carry electrical and/or optical components and circuitry is claimed. A conductive paste, which makes the interconnections (6,7,8; 14, 15, 16), is deposited into depressions (3, 4, 5; 10, 11, 12) in an insulating substrate (1, 9) forming at least one layer of the circuit board. The substrate is preferably a flexible sheet e.g. of glass fibre-reinforced epoxy resin. The substrate (1, 2) may be a film-coated (1) board (2) of glass fibre-reinforced epoxy resin. Depressions penetrate the board, to interconnect conductors in different layers, using conductive paste. Further conductors may be produced on upper and lower surfaces. Further similarly formed substrates and circuits may be connected. These may be pressed together to form a multilayer circuit board. Depressions (19-22) are provided for external circuit connection. The board is hardened by heating.

Description

Die Erfindung betrifft ein Verfahren zur Herstellung einer Leiterplatte nach dem Oberbegriff des Anspruchs 1.The invention relates to a method for producing a Printed circuit board according to the preamble of claim 1.

Bei der Herstellung von Leiterplatten zur elektrischen Ver­ bindung von Bauelementen werden üblicherweise subtraktive Verfahren eingesetzt. Dabei wird als Ausgangsmaterial bei­ spielsweise ein sogenannter Kern, der aus einer beidseitig mit Kupfer kaschierten, glasfaserverstärkten Epoxidharzplatte besteht, verwendet. Die Dicke des ganzflächigen Kupfers liegt häufig zwischen 18 und 35 µm. Auf diese Platte wird positiv mit einer Ätzresistfarbe das Leiterbild im Siebdruckverfahren aufgebracht. Die so präparierte Platte wird mittels Chemi­ kalien sauer abgeätzt. Bei diesem Vorgang wird an den Be­ reichen, an denen sich keine Leiter befinden sollen und die daher nicht mit Ätzresistfarbe abgedeckt sind, die Kupfer­ kaschierung entfernt. Lediglich etwa 20% der Kupferschicht werden für die elektrischen Leiter genutzt. Die verbleibenden 80% des Kupfers sind in den Ätzchemikalien gelöst und können nur durch aufwendige Wiederaufbereitung zurückgewonnen wer­ den. Subtraktive Verfahren sind daher zwangsläufig mit hohen Kosten für Umweltschutz verbunden.In the manufacture of printed circuit boards for electrical ver Binding components are usually subtractive Process used. It is used as the starting material for example, a so-called core, which consists of a bilateral with copper-clad, glass fiber reinforced epoxy resin plate exists, used. The thickness of the all-over copper is often between 18 and 35 µm. This plate is positive with an etch resist paint the conductor pattern in the screen printing process upset. The plate prepared in this way is chemi acid etched away. In this process, the Be range where there should be no ladder and which therefore not covered with etch resist paint, the copper lamination removed. Only about 20% of the copper layer are used for the electrical conductors. The remaining 80% of the copper is dissolved in the etching chemicals and can who can only be recovered through extensive reprocessing the. Subtractive procedures are therefore inevitably high Related to environmental protection costs.

Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zur Herstellung einer Leiterplatte zu finden, bei welchem auf ein derartiges subtraktives Verfahren zur Bildung der Leiter ver­ zichtet werden kann.The invention has for its object a method for Making a printed circuit board to find which one such subtractive method of forming the ladder ver can be waived.

Zur Lösung dieser Aufgabe weist das neue Verfahren der ein­ gangs genannten Art die im kennzeichnenden Teil des An­ spruchs 1 genannten Merkmale auf. In den Unteransprüchen sind vorteilhafte Weiterbildungen des Verfahrens angegeben. To solve this problem, the new method of gangs mentioned in the characterizing part of the An claim 1 mentioned features. In the subclaims are advantageous developments of the method specified.  

Das neue Verfahren zur Herstellung einer Leiterplatte hat den Vorteil, daß die Leiter positiv auf einen Träger aufgebracht werden und nicht in einem subtraktiven Verfahren das leitende Material an den Stellen, an denen keine Leiter verbleiben dürfen, entfernt werden muß. Dadurch wird bereits mit der Menge leitenden Materials, die tatsächlich zur Ausbildung der Leiter erforderlich ist, das Leiterbild erstellt und es wird nur so viel Material eingesetzt, wie auch auf der fertigen Leiterplatte vorhanden ist. Schadstoffe, die bei subtraktiven Verfahren immer entstehen, fallen bei dem neuen Verfahren in erheblich verminderter Menge an. Damit entfällt auch ein Großteil des Aufwands für die Schadstoffbeseitigung.The new process for producing a printed circuit board has the Advantage that the conductors are positively applied to a carrier and not the leading in a subtractive process Material in places where no conductors remain may be removed. This is already with the Amount of conductive material that is actually used to train the Leader is required, the ladder pattern is created and it will only as much material used as on the finished one PCB is present. Pollutants at subtractive Procedures always arise, fall with the new procedure significantly reduced amount of. This also eliminates one Most of the effort for pollutant removal.

Das neue Verfahren ist sowohl für elektrische als auch für optische Leiterplatten einsetzbar. Im Falle elektrischer Leiterplatten wird als Träger ein elektrisch isolierendes Material verwendet und in die Vertiefungen eine elektrisch leitende Paste eingebracht. Für optische Leiterplatten wird ein optisch isolierendes Material verwendet, d. h. ein Mate­ rial, das für die jeweilige Lichtfrequenz undurchlässig ist. Die Lichtleiter werden beispielsweise mit einer lichtleiten­ den Kunststoffpaste gebildet.The new process is for both electrical and optical circuit boards can be used. In the case of electrical Printed circuit boards become an electrically insulating base Material used and in the wells an electrical conductive paste introduced. For optical circuit boards uses an optically isolating material, d. H. a mate rial, which is opaque to the respective light frequency. The light guides are for example with a light guide the plastic paste formed.

Anhand der Figuren, in denen verschiedene Phasen einer Lei­ terplattenherstellung dargestellt sind, werden im folgenden die Erfindung sowie Ausgestaltungen und Vorteile näher er­ läutert.Based on the figures, in which different phases of a lei plate production are shown below he the invention and refinements and advantages purifies.

In den Figuren werden für gleiche Teile in den verschiedenen Herstellungsphasen gleiche Bezugszeichen verwendet. Sie sind nicht maßstabsgetreu, d. h., Schichten, die in den Figuren gleiche Abmessungen besitzen, können diesbezüglich bei realen Leiterplatten stark voneinander abweichen.In the figures, the same parts in the different Manufacturing phases used the same reference numerals. they are not to scale, d. i.e., layers shown in the figures have the same dimensions, can be real PCBs differ greatly from one another.

Fig. 1 zeigt einen Träger, der aus einer mit einer Isolier­ folie 1 beschichteten, glasfaserverstärkten Epoxidharz­ platte 2 besteht. Fig. 1 shows a carrier which consists of a coated with an insulating film 1 , glass fiber reinforced epoxy resin plate 2 .

Zur Herstellung einer flexiblen Leiterplatte kann diese glas­ faserverstärkte Epoxidharzplatte 2 ohne weiteres durch einen vorzugsweise dehnungsfesten Folienträger ersetzt werden. So­ fern bereits die Isolierfolie 1 oder die Epoxidharzplatte 2 günstige Fertigungseigenschaften aufweist, kann auch völlig auf die zusätzliche Schicht 2 bzw. 1 verzichtet werden.To produce a flexible printed circuit board, this glass fiber-reinforced epoxy resin board 2 can easily be replaced by a preferably stretch-resistant film carrier. As far as the insulating film 1 or the epoxy resin plate 2 already has favorable manufacturing properties, the additional layer 2 or 1 can also be dispensed with entirely.

Wie in Fig. 2 gezeigt, werden in der Isolierfolie 1 Ver­ tiefungen 3, 4 und 5 als Depots für eine Leiterpaste erzeugt. Geeignete Verfahren hierfür sind beispielsweise Ätzen, Foto- oder Laserstrukturieren. Bei den beiden erstgenannten Ver­ fahren ist zuvor ein Film auf die Oberfläche der Isolierfolie aufzutragen, der an den Stellen, an denen keine Vertiefungen erzeugt werden sollen, ätzresistent bzw. lichtundurchlässig ist. Das Fotostrukturieren setzt die Verwendung lichtempfind­ licher Kunststoffe für die Isolierfolie 1 voraus. Für das Laserstrukturieren oder -schneiden ist kein derartiger Film erforderlich, da der Laser rechnergesteuert abgelenkt werden kann, so daß er nur die Bereiche der Vertiefungen 3, 4 und 5 überstreicht. Bei gröberen Strukturen ist auch ein Form­ stempel zum Einprägen der Vertiefungen 3, 4 und 5 geeignet.As shown in Fig. 2, 1 Ver wells 3 , 4 and 5 are generated as deposits for a conductor paste in the insulating film. Suitable methods for this are, for example, etching, photo or laser structuring. In the case of the first two processes mentioned, a film is to be applied beforehand to the surface of the insulating film, which is etch-resistant or opaque at the points where no depressions are to be produced. Photo structuring requires the use of photosensitive plastics for the insulating film 1 . No film of this type is required for laser structuring or cutting, since the laser can be deflected under computer control so that it only sweeps over the regions of the depressions 3 , 4 and 5 . In the case of coarser structures, a shape stamp is also suitable for impressing the depressions 3 , 4 and 5 .

Entsprechend Fig. 3 wird in die Vertiefungen eine Leiter­ paste zur Ausbildung von Leitern 6, 7 und 8 eingebracht. Bei einer Leiterplatte für elektrische Anwendungen wird eine elektrisch leitende Paste, beispielsweise eine Paste mit Partikeln eines Metalls, z. B. Kupfer, oder von Metallegie­ rungen, verwendet. Für optische Leiterplatten werden licht­ leitende Materialien eingesetzt, beispielsweise eine licht­ leitende Kunststoffpaste. Das Einbringen der Paste kann in einem Gießverfahren bei geringer Viskosität der Paste er­ folgen, wobei ein Pastenüberschuß gegebenenfalls mit einem Rackel abzuziehen ist. Die Vertiefungen 3, 4 und 5 können aber auch in dosierter Weise mit einem Dispenser ausgefüllt werden. According to FIG. 3, in the wells of a conductor paste for forming conductors 6, 7 and 8 introduced. In a printed circuit board for electrical applications, an electrically conductive paste, for example a paste with particles of a metal, for. B. copper, or of metal alloys, used. Light-conducting materials are used for optical circuit boards, for example a light-conducting plastic paste. The paste can be introduced in a pouring process with a low viscosity of the paste, an excess of paste possibly being deducted with a squeegee. The wells 3 , 4 and 5 can also be filled in a metered manner with a dispenser.

Für weitere Lagen wird, wie in Fig. 4 gezeigt, eine weitere Isolierfolie 9 als weiterer Träger auf die im vorherigen Schritt fertiggestellte Lage aufgelegt.For further layers, as shown in FIG. 4, a further insulating film 9 is placed as a further carrier on the layer completed in the previous step.

Auch in der Folie 9 werden gemäß Fig. 5 Vertiefungen 10, 11 und 12 für Leiter der weiteren Lage erzeugt. Eine Öffnung 13, welche die Isolierfolie 9 völlig durchdringt, dient zur Durchkontaktierung von Leitern verschiedener Lagen. Bei Er­ zeugen der Vertiefungen durch Ätzen oder Fotostrukturierung kann die Öffnung 13 durch einen zusätzlichen Schritt, bei Laserstrukturieren durch eine längere Verweilzeit des Lasers erzeugt werden.Also in the film 9 5 recesses 10, 11 and 12 are shown in FIG. Generated for conductors of the other layer. An opening 13 , which completely penetrates the insulating film 9 , serves for through-contacting conductors in different layers. When he create the wells by etching or photo structuring, the opening 13 can be generated by an additional step, in laser structuring by a longer dwell time of the laser.

In die nun geschaffenen Vertiefungen 10 . . . 12 und Öffnung 13 wird wiederum Leiterpaste zur Ausbildung von Leitern 14, 15 und 16 sowie einer Verbindung 17 zwischen den Leitern 15 und 7 eingebracht, wie es in Fig. 6 dargestellt ist. Damit wurde eine zweite Lage von Leitern geschaffen.In the wells 10 . . . 12 and opening 13 , in turn, conductor paste is introduced to form conductors 14 , 15 and 16 and a connection 17 between conductors 15 and 7 , as shown in FIG. 6. This created a second layer of ladders.

Auch diese Lage wird gemäß Fig. 7 mit einer Isolierfolie 18 abgedeckt.This layer is also covered with an insulating film 18 according to FIG. 7.

In der Folie 18 werden entsprechend Fig. 8 Vertiefungen 19, 20 und 21 erzeugt. Da die Isolierfolie 18 die oberste Lage der Leiterplatte bildet, dienen nun die Vertiefungen 19 . . . 21 als Depots für Lot, das zum Anlöten der Bauelemente­ anschlüsse an elektrische Leiter erforderlich ist. Eine Öff­ nung 22, die auf ähnliche Weise wie die Öffnung 13 (Fig. 5) einer inneren Lage erzeugt wurde, stellt die Verbindung des Lotdepots 20 zum darunterliegenden Leiter 15 dar.According to FIG. 8, depressions 19 , 20 and 21 are produced in the film 18 . Since the insulating film 18 forms the uppermost layer of the printed circuit board, the depressions 19 now serve. . . 21 as a depot for solder, which is required for soldering the components to electrical conductors. An opening 22 , which was produced in a manner similar to the opening 13 ( FIG. 5) of an inner layer, represents the connection of the solder deposit 20 to the conductor 15 underneath.

Obwohl in dem Ausführungsbeispiel lediglich die Herstellung einer Leiterplatte mit zwei Lagen elektrischer Leiter auf ei­ ner Seite eines Trägers beschrieben wurde, ist die Erfindung ohne Einschränkung auch zur Herstellung von Leiterplatten beliebiger Lagenanzahl sowie mit Leiterlagen auf beiden Sei­ ten eines Trägers anwendbar. Although in the exemplary embodiment only the manufacture a circuit board with two layers of electrical conductors on egg ner side of a carrier has been described, the invention without limitation also for the production of printed circuit boards any number of layers and with conductor layers on both sides ten of a carrier applicable.  

Je nach Art der verwendeten Leiterpaste wird diese durch Wärmeeinwirkung in einem Ofen oder durch Bestrahlung, nachdem sie in die jeweiligen Vertiefungen eingebracht wurde, aus­ gehärtet.Depending on the type of conductor paste used, this is indicated by Exposure to heat in an oven or by radiation after it was introduced into the respective wells hardened.

Claims (9)

1. Verfahren zur Herstellung einer Leiterplatte zur Aufnahme und elektrischen oder optischen Verbindung von Bauelementen, dadurch gekennzeichnet, daß zur Ausbildung von Leitern (6, 7, 8; 14, 15, 16) zumindest einer Lage der Leiterplatte Vertiefungen (3, 4, 5; 10, 11, 12) in einem isolierenden Träger (1, 9) erzeugt werden, in die eine Leiterpaste ein­ gebracht wird.1. A method for producing a circuit board for receiving and electrical or optical connection of components, characterized in that for forming conductors ( 6 , 7 , 8 ; 14 , 15 , 16 ) at least one layer of the circuit board depressions ( 3 , 4 , 5th ; 10 , 11 , 12 ) are generated in an insulating carrier ( 1 , 9 ) into which a conductor paste is brought. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß der Träger eine flexible Folie ist.2. The method according to claim 1, characterized in that that the carrier is a flexible film. 3. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß der Träger eine Platte aus glasfaserverstärktem Epoxid­ harz ist.3. The method according to claim 1, characterized in that the carrier is a plate made of glass fiber reinforced epoxy resin is. 4. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß der Träger (1, 2) eine mit Folie (1) beschichtete Platte (2) aus glasfaserverstärktem Epoxidharz ist.4. The method according to claim 1, characterized in that the carrier ( 1 , 2 ) is a sheet ( 1 ) coated plate ( 2 ) made of glass fiber reinforced epoxy resin. 5. Verfahren nach einem der vorhergehenden Ansprüche, da­ durch gekennzeichnet, daß zur Ausbildung von ersten Leitern auf der Oberseite und von zweiten Leitern auf der Unterseite des isolierenden Trägers Vertiefungen in der Ober- bzw. Unterseite erzeugt werden, die an den Stellen, an denen Verbindungen zwischen ersten und zweiten Leitern auszubilden sind, den Träger durchdringen.5. The method according to any one of the preceding claims characterized in that for training first Conductors on the top and of second conductors on the Underside of the insulating carrier depressions in the top or Bottom are generated in the places where Form connections between first and second conductors are penetrate the wearer. 6. Verfahren nach einem der vorhergehenden Ansprüche, da­ durch gekennzeichnet,
  • - daß zur Ausbildung weiterer Leiter (14, 15, 16) in zumin­ dest einer weiteren Lage Vertiefungen (10, 11, 12) in einem weiteren Träger (9) auf der der einen Lage abgewandten Seite erzeugt werden, die an den Stellen, an denen Verbin­ dungen (17) zu den Leitern (7) der einen Lage auszubilden sind, den weiteren Träger (9) durchdringen, und
  • - daß in diese Vertiefungen (10, 11, 12, 13) ebenfalls eine Leiterpaste eingebracht wird.
6. The method according to any one of the preceding claims, characterized in that
  • - That for the formation of further conductors ( 14 , 15 , 16 ) in at least one further layer recesses ( 10 , 11 , 12 ) are produced in a further carrier ( 9 ) on the side facing away from the one layer, which in places which connec tions ( 17 ) to the conductors ( 7 ) of one layer to be formed, penetrate the further carrier ( 9 ), and
  • - That a conductor paste is also introduced into these recesses ( 10 , 11 , 12 , 13 ).
7. Verfahren nach einem der vorhergehenden Ansprüche, da­ durch gekennzeichnet, daß Lotdepots (19, 20, 21, 22) als außenliegende Vertiefungen in einem Träger (18) aus­ gebildet werden, die diesen zur Verbindung mit benachbarten elektrischen Leitern (15) durchdringen.7. The method according to any one of the preceding claims, characterized in that solder deposits ( 19 , 20 , 21 , 22 ) are formed as external depressions in a carrier ( 18 ), which penetrate this for connection to adjacent electrical conductors ( 15 ). 8. Verfahren nach Anspruch 6 oder 7, dadurch gekenn­ zeichnet, daß zur Herstellung einer Mehrlagenleiterplatte mehrere Träger (1, 2, 9, 18) miteinander verpreßt werden.8. The method according to claim 6 or 7, characterized in that a plurality of supports ( 1 , 2 , 9 , 18 ) are pressed together to produce a multilayer printed circuit board. 9. Verfahren nach einem der vorhergehenden Ansprüche, da­ durch gekennzeichnet, daß die Leiterpaste durch Wärme­ einwirkung gehärtet wird.9. The method according to any one of the preceding claims, since characterized in that the conductor paste by heat action is hardened.
DE1996125386 1996-06-25 1996-06-25 Multilayer, double-sided, flexible or rigid electrical and optical circuit board production avoiding chemicals recovery Withdrawn DE19625386A1 (en)

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Application Number Priority Date Filing Date Title
DE1996125386 DE19625386A1 (en) 1996-06-25 1996-06-25 Multilayer, double-sided, flexible or rigid electrical and optical circuit board production avoiding chemicals recovery

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DE1996125386 DE19625386A1 (en) 1996-06-25 1996-06-25 Multilayer, double-sided, flexible or rigid electrical and optical circuit board production avoiding chemicals recovery

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000052975A1 (en) * 1999-03-04 2000-09-08 Sigtronics Limited Circuit board printer
WO2002031566A1 (en) * 2000-10-10 2002-04-18 Siemens Aktiengesellschaft Printed circuit board with optical layers consisting of glass
DE10061831A1 (en) * 2000-12-12 2002-06-13 Wuerth Elektronik Gmbh Multilayered optical conductor plate, comprises at least one layer of optically conductive material and at least one carrier layer, with both layers joined as a laminate by means of an adhesive foil
EP2003939A1 (en) * 2007-06-14 2008-12-17 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Method for preparing a pattern for a 3-dimensional electric circuit
DE102005020332B4 (en) * 2005-04-26 2012-02-02 Reinz-Dichtungs-Gmbh Method for making a supply plate for electrochemical systems, supply plate and their use
US8927899B2 (en) 2004-01-29 2015-01-06 Atotech Deutschland Gmbh Method of manufacturing a circuit carrier and the use of the method
WO2015041870A1 (en) * 2013-09-20 2015-03-26 Eastman Kodak Company Imprinted multi-level micro-wire circuit structure
US9417385B2 (en) 2013-03-05 2016-08-16 Eastman Kodak Company Imprinted multi-level micro-wire circuit structure method

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DE3507341A1 (en) * 1982-12-06 1986-09-04 Fine Particle Technology Corp., Camarillo, Calif. Method for forming electrically conductive tracks on a substrate
DE3832299A1 (en) * 1988-09-20 1990-03-22 Schering Ag Method for producing a three-dimensional conductor moulding having a recessed conductor-track layout
EP0679052A1 (en) * 1994-04-23 1995-10-25 Lpkf Cad/Cam Systeme Gmbh Process for structured metallizing of the surface of substrates

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000052975A1 (en) * 1999-03-04 2000-09-08 Sigtronics Limited Circuit board printer
WO2002031566A1 (en) * 2000-10-10 2002-04-18 Siemens Aktiengesellschaft Printed circuit board with optical layers consisting of glass
DE10061831A1 (en) * 2000-12-12 2002-06-13 Wuerth Elektronik Gmbh Multilayered optical conductor plate, comprises at least one layer of optically conductive material and at least one carrier layer, with both layers joined as a laminate by means of an adhesive foil
DE10061831B4 (en) * 2000-12-12 2014-02-13 Würth Elektronik Rot am See GmbH & Co. KG Optical multilayer printed circuit board
US8927899B2 (en) 2004-01-29 2015-01-06 Atotech Deutschland Gmbh Method of manufacturing a circuit carrier and the use of the method
DE102005020332B4 (en) * 2005-04-26 2012-02-02 Reinz-Dichtungs-Gmbh Method for making a supply plate for electrochemical systems, supply plate and their use
EP2003939A1 (en) * 2007-06-14 2008-12-17 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Method for preparing a pattern for a 3-dimensional electric circuit
WO2008153398A1 (en) * 2007-06-14 2008-12-18 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Method for preparing a patterned electric circuit
US9000303B2 (en) 2007-06-14 2015-04-07 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Method for preparing a patterned electric circuit
US9417385B2 (en) 2013-03-05 2016-08-16 Eastman Kodak Company Imprinted multi-level micro-wire circuit structure method
US9423562B2 (en) 2013-03-05 2016-08-23 Eastman Kodak Company Imprinted micro-wire circuit multi-level stamp method
WO2015041870A1 (en) * 2013-09-20 2015-03-26 Eastman Kodak Company Imprinted multi-level micro-wire circuit structure

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