DE19624698C2 - Semiconductor memory device and method for producing a semiconductor memory device - Google Patents

Description

The present invention relates generally to a semiconductor storage device or semiconductor device. In particular, the present invention to a semiconductor memory device which ver is improved that the effective capacitance of a capacitor can be increased can without increasing the row area of a memory cell.

The present invention also relates to a method of manufacture development of such a semiconductor memory device. It also relates the present invention relates to a method for producing a semiconductor Storage device that is improved so that damage to one cylindrical condenser through megasonic cleaning or the like can be prevented.  

Figs. 16 to 21 illustrate cross-sectional views of a semiconductor spoke means in the order of the steps which are performed in a Herstellungsverfah the semiconductor memory device ren according to a first example which is disclosed 6-196649 A, JP.

Reference is made to Figure 16.. An interlayer insulating film 2 is formed on a semiconductor substrate 1 . A silicon oxide film 3 is formed by CVD (chemical vapor deposition) on the interlayer insulating film 2 , with no impurities being supplied. A contact hole 100 is formed in the interlayer insulating film 2 and the silicon oxide film 3 and penetrates these films such that a portion of the surface of the semiconductor substrate 1 is exposed. A lower electrode 4 of a capacitor, which consists of a phosphorus-doped polycrystalline silicon film, is formed so that it is connected to the surface of the semiconductor substrate 1 via the contact hole 100 . The lower electrode 4 consists of an axis section or axial section 4 a which extends upwards from the surface of the semiconductor substrate 1 , a bottom surface section 4 b which extends horizontally over the silicon oxide film 3 and a right-angled section 4 c, which is provided along the outside of the bottom surface section 4 b and extends upward. A cylinder is formed by the horizontal section 4 b and the rectangular section 4 c. A BPSG (Boron Phosphorus Silicate Glass) film 5 , the foreign atoms such. B. boron and phosphorus are added, is buried in the cylinder of the lower electrode 4 .

Reference is made to FIGS. 16 and 17 referred to. The BPSG film 5 is removed by a gas phase hydrogen fluoride treatment, so that the inner surface of the cylinder of the lower electrode 4 is exposed.

Reference is made to FIG. 18. A dielectric film (ON film) 6 , which is formed by a silicon oxide film and a silicon nitride film, is applied to the entire surface of the semiconductor substrate 1 , and an upper electrode 7 of the capacitor, which is formed from a phosphorus-doped polycrystalline silicon film, is ON thereon -Film 6 stacked. This completes the capacitor.

Reference is made to Figure 16.. The gas phase hydrogen fluoride treatment is carried out when the BPSG film 5 is removed in the semiconductor memory device manufacturing method described above. If the BPSG film 5 is removed, hydrogen fluoride shows a very high selectivity in comparison to the silicon oxide film 3 , which contains no impurities or foreign atoms. As a result, the amount of the etched BPSG film would be extremely large compared to the amount of the etched silicon oxide film 3 , so that the inner surface of the cylinder of the lower electrode 4 can be exposed without the silicon oxide film 3 being etched.

Figs. 19 to 21 represent cross-sectional views of a semiconductor device representing the respective steps in a method for the manufacture development of a semiconductor memory device according to a second example which is disclosed in JP 2-219264 A discloses performed.

Reference is made to FIG. 21. A gate oxide film 8 is formed on a semiconductor substrate 1 , and a gate electrode 9 is formed on this gate oxide film 8 . The gate electrode 9 is covered with an insulating film 10 . A pad 11 made of polycrystalline silicon is formed on the semiconductor substrate 1 so that it is in contact with an active region of the semiconductor substrate 1 . Subsequently, an interlayer insulating film 2 , a silicon nitride film 12 and a BPSG film 5 are formed on the semiconductor substrate 1 . A contact hole is formed in the BPSG film 5 , the silicon nitride film 12 and the interlayer insulating film 2 , and penetrates through these films such that the surface of the pad 11 made of poly crystalline silicon is exposed. A lower electrode 4 , which is connected to the terminal surface 11 of polycrystalline silicon via the contact lock, is formed. The lower electrode 4 consists of a cylindrical portion and a horizontal portion which is attached to the upper end of this cylindrical portion so that it extends horizontally.

It is 19 and 20 Referring to FIGS.. The BPSG film 5 is subjected to etching under conditions where the etching ratio of the BPSG film 5 with respect to the lower electrode 4 is higher. The BPSG film 5 is removed by this etching.

Reference is made to FIG. 21. The lower electrode 4 is covered with a dielectric film 6 . Subsequently, an upper electrode (opposite electrode) 7 is placed on the semiconductor substrate 1 such that the lower electrode 4 is covered with the dielectric film 6 therebetween. This completes the capacitor.

In this method, the upper and lower surfaces of the horizontal portions of the lower electrode 4 and the outer and inner sides of the cylindrical portion of the lower electrode 4 contribute to the capacitance of the capacitor, so that the effective capacitance of the capacitor can be increased.

The method of manufacturing a semiconductor memory device is as performed above and thus sees an approach to increasing the Capacitance of the capacitor. Taking into account the fact that the Cell areas can be made smaller if DRAMs are more integrated there is a need to further increase the capacity of the Capacitor without increasing the cell area of the memory cell.

However, since, as shown in Fig. 20, the horizontal portion of the lower electrode 4 is separated from the interlayer insulating film 2 in the second manufacturing technique, the strength of a connecting portion 4 d that the connection between the horizontal portion of the lower Electrode 4 and the cylindrical portion of the capacitor, which is given in the contact hole, provides, reduced or deteriorated. Since the connecting portion is made entirely of silicon, which is filled with crystal grains, a megasonic cleaning or the like due to the vibrations between the crystal grains would exert such a force that the lower electrode 4 would break at the connecting portion 4 d.

DE 41 09 299 A1 discloses a semiconductor memory device
a semiconductor substrate,
a source / drain region which is formed in a main surface of the semiconductor substrate,
an interlayer insulating film formed on the semiconductor substrate,
a contact hole formed in the interlayer insulating film for exposing the surface of the source-drain region, and
a lower electrode of a capacitor connected to the source / drain region via the contact hole, the lower electrode having an axial portion provided in the contact hole and extending upward from the surface of the source / drain region extends, being separated by a distance from an inner wall surface of the contact hole,
one end of the axial section is connected to the source / drain region and the other end of the axial section protrudes from the contact hole, and
the lower electrode further has a horizontal portion which is connected to the other end of the axial portion and which extends in the horizontal direction, and
which further includes a capacitor insulating film covering an outer upper surface of the axial portion of the lower electrode of the capacitor and an outer surface of the horizontal portion of the lower electrode of the capacitor with its upper and lower electrodes, and
an upper electrode of the capacitor which is provided above the semiconductor substrate so that the outer surface of the axial portion of the lower electrode of the capacitor and the outer surface of the horizontal portion of the lower electrode of the capacitor is covered with the intermediate capacitor insulating film. The capacitor insulating film does not cover an inner wall surface of the contact hole.

It is an object of the present invention to provide a semiconductor Storage device that is improved so that the capacity without increasing the cell area and avoiding the above  Problems can be increased, and a method of manufacture to specify such a semiconductor memory device.

This problem is solved by a semiconductor memory device device according to claim 1 or a method according to claim 3.

Further developments of the invention result from the dependent claims chen.

An advantage of the present invention is that a Semiconductor memory device is specified that a condens sator with a lower electrode that does not break.

Another advantage of the present invention is that in a method of manufacturing a semiconductor memory breaking device with a cylindrical capacitor of the capacitor is prevented.  

Further features and practicalities result from the following description of exemplary embodiments with reference to Characters. From the figures show:

Fig. 1 shows a cross section of a semiconductor memory device according to a first embodiment;

Fig. 2 to 13 cross-sections of a semiconductor device, the through twelfth step in the order of steps showing the first to be carried out in a process for manufacturing the semiconductor memory device according to a first embodiment;

Fig. 14 to 15 cross-sections of a semiconductor device, the first and second steps in the order of steps, show the conductor means in a method for the preparation of a modified example of a half are carried out according to the first embodiment;

. 16 to 18 are cross sections of a semiconductor device to third steps in the order of steps showing the first to be executed in a method of manufacturing a semiconductor memory device according to a first example;

Fig. 19 to 21 cross-sections corresponding to the first to third steps in the series of the steps as they are carried out in a method of manufacturing a semiconductor memory device according to a second example follow.

Fig. 1 shows a cross section of a semiconductor memory device is according to a first embodiment.

On a main surface of a semiconductor substrate 1 , a field oxide film 13 is provided for isolating an active area from other active areas. A gate electrode 9 is provided on the semiconductor substrate 1 . Source / drain regions 14 are formed in the main surface of the semiconductor substrate 1 on both sides of the gate electrode 9 . A bit line 15 is connected to one of the source / drain regions 14 . An interlayer insulating film covering the gate electrodes 9 and 16 is provided on the semiconductor substrate 1 . A contact hole 17 is formed so that the surface of the other of the source / drain regions 14 is exposed. A lower electrode 4 of a capacitor is connected to the other source / drain region 14 via a contact hole 17 . The lower electrode 4 of the capacitor consists of an axial section 4 a, a horizontal section 4 b and a right-hand section 4 c. The axial section 4 a extends from the surface of the other source / drain region upwards. The axial portion 4 a extends upwards while it is separated from the inner wall surface of the contact hole 17 by a distance and one end of which is connected to the other source / drain region 14 and whose other end protrudes from the contact hole 17 . The horizontal portion 4 b, which extends in the horizontal direction, is connected to the other end of the axial portion 4 a ver. Along the periphery of the horizontal section 4 b, the upwardly extending, rectangular section 4 c is provided. An inner surface of the contact hole 17 , the outer surface of the axial section 4 a, the outer surface of the horizontal section 4 b including their upper and lower surfaces and the outer surface of the right-angled section 4 c are covered by a capacitor insulating film 6 or covered. An upper electrode 7 of the capacitor is provided above the semiconductor substrate with the capacitor insulating film 6 interposed so that the outer surface of the axial portion 4 a, the outer upper surface of the horizontal portion 4 b and the outer surface of the right angled portion 4 c covered become. If a semiconductor memory device is formed in this way, then the surface of the axial portion 4 a of the lower electrode 4 of the capacitor may also be the surface of the electrode of the capacitor, and accordingly, it is possible to increase the capacitance without increasing the cell area increase.

A method for producing the semiconductor device is described below described in the first embodiment.

As shown in FIG. 2, the field oxide film 13 for isolating an active area from other active areas is formed on the main surface of the semiconductor substrate 1 by thermal oxidation. The gate oxide film 8 is formed on the semiconductor substrate 1 . Then the gate electrodes 9 and 16 made of polycrystalline silicon are formed on the semiconductor substrate 1 . Foreign atoms such as B. phosphorus and boron are implanted in the surface of the semiconductor substrate 1 and by performing a thermal diffusion of the foreign atom ions, the source / drain regions 14 are formed. An insulation layer (not shown) is stacked on the semiconductor substrate 1 so that the gate electrodes 9 and 16 are covered. By performing an aniostropic etching of the insulation layer, an insulation layer 2 a is formed, which only covers the electrodes 9 and 16 . At closing, a bit line 15 , which is connected to one of the source / drain regions 14 , is formed on the semiconductor substrate 1 by photolithography.

As shown in FIG. 3, the interlayer insulating film 2 is formed from an undoped silicon oxide film on the semiconductor substrate 1 to cover the bit line 15 . A BPTEOS (boron-phosphorus-tetraethyl-orthosilicate) film 5 a is formed on the interlayer insulating film 2 .

As shown in FIGS. 3 and 4, a contact hole 17 is formed in the interlayer insulating film 2 and the BPTEOS film 5 a, penetrating these films and defines a surface of the other source / drain region 14 is exposed. The diameter of the opening of the contact hole 17 is preferably not larger than 300 nm (3000 Å).

As shown in FIG. 5, a BPTEOS film 18 having a uniform thickness is formed on the semiconductor substrate 1 so that the inner side surface of the contact hole 17 is covered.

As shown in Fig. 6, by performing an anisotropic etching on the BPTEOS film 18 to expose the other source / drain region 14, a side wall spacer 18 a consisting of the doped silicon oxide film with a cylindrical shape on the inner side surface of the Kon tact hole 17 formed.

As shown in Fig. 7, a polycrystalline silicon film 40 containing foreign atoms is formed on the semiconductor substrate 1 for filling the contact hole 17 which extends horizontally. A BPTEOS film 5 b is formed on the polycrystalline silicon film 40 .

As shown in FIGS. 7 and 8, the polycrystalline silicon film 40 and the BPTEOS film 5 b for forming the lower electrode 4 of the capacitor with an axial portion 4a extending at a right angle and with a horizontal section 4 b, which extends horizontally, samples.

As shown in FIGS. 8 and 9, a polycrystalline silicon film 41, the impurity is comprises, formed on the semiconductor substrate 1 so that it is connection with the horizontal portion 4b of the lower electrode in contact or in Ver.

As shown in Figs. 9 and 10, the polycrystalline silicon film 41 is subjected to anisotropic etching using the BPTEOS film as an etch stop. This forms a right-angled portion 4 c, which extends upward along the periphery of the horizontal portion 4 b, which is made of a conductor and is provided as a portion of the lower electrode.

Although reference numerals 4 a and 4 b denote polycrystalline films in this embodiment, amorphous silicon films could also be used.

As shown in Fig. 10 and 11, the BPTEOS film 5 b, the BPTEOS film 5 a and the sidewall spacers 18 a of the BPTEOS film which is present within the contact hole 17, selectively by a gas phase Hydrogen fluoride treatment removed. By the gas phase hydrogen fluoride treatment, the axial section 4 a of the lower electrode is separated from the inner wall surface of the contact hole 17 by a distance. The conditions for these gas phase hydrogen fluoride treatments are such that they are carried out in an almost anhydrous state and that the partial pressure of the hydrogen fluoride is preferably several tens to several hundred Pa. Under these conditions, the selectivity of the BPTEOS film with respect to a TEOS film can be at least several tens or more times higher.

As shown in FIGS. 11 and 12, the outer surface of the right-angled portion 4 a of the lower electrode 4, the outer surface of the horizontal portion 4b of the lower electrode 4, including the lower and upper surface of the horizontal portion 4b and the outer surface of the rectangular section 4 c covered by a capacitor insulating film 6 . The capacitor insulating film 6 is preferably formed from an ON film and has a two-layer structure including an oxide film and a nitride film. Preferably, this ON film is formed so that the total thickness of the oxide film and the nitride film is about 6 nm (60 Å) or less when converted to the thickness of the oxide film.

As shown in Fig. 13, by forming the upper electrode 7 of the capacitor on the semiconductor substrate 1 , so that the outer surface of the rectangular portion 4 c of the lower electrode 4 and the outer surface of the horizontal portion 4 b of the lower electrode 4th finally, its lower and upper surfaces are covered with the capacitor insulating film 6 therebetween, the semiconductor memory device completed.

According to this method, it is possible to produce a semiconductor memory device to deliver in which the capacitance of the capacitor can be increased without the cell area is increased and so it is possible a semiconductor Get storage device with better performance.

If there is a restriction to increase the height of the semiconductor memory device, the manufacturing method shown in FIGS . 14 and 15 is preferred.

This is described below.

First, the process steps shown in FIGS . 2 to 8 are performed. The BPTEOS films 5 a, 5 b and the side wall spacer 18 a are then removed by a gas phase hydrogen fluoride treatment. Then, as shown in Fig. 14, the surface of the lower electrode 4 of the capacitor is covered with the capacitor insulating film 6 .

As shown in Fig. 15, the capacitor is completed by forming an upper electrode 7 of the capacitor on the semiconductor substrate such that the outer surface of the lower electrode 4 of the capacitor is covered with the capacitor insulating film 6 therebetween.

Although the BPTEOS film was shown representatively as the substance described in the embodiment described above by a gas phase hydrogen Fluoride treatment has been etched away, the present Erfin is limited not on this. Any insulating film that can be used can be used has at least phosphorus as foreign atoms.

Claims (4)

1. Semiconductor memory device with:
a semiconductor substrate ( 1 ), a source / drain region ( 14 ) which is formed in a main surface of the semiconductor substrate ( 1 ),
an interlayer insulating film ( 2 ) formed on the semiconductor substrate ( 1 ), a contact hole ( 17 ) formed in the interlayer insulating film ( 2 ) for exposing the surface of the source / drain region ( 14 ), and
a lower electrode ( 4 ) of a capacitor, which is connected to the source / drain region ( 14 ) via the contact hole,
in which
the lower electrode ( 4 )
has an axial section ( 4 a) which is provided in the contact hole ( 17 ) and which extends upwards from the surface of the source / drain region ( 14 ),
wherein the axial section ( 4 a) extends upwards while being separated by a distance from an inner wall surface of the contact hole ( 17 ),
one end of the axial section ( 4 a) is connected to the source / drain region ( 14 ) and the other end of the axial section ( 4 a) protrudes from the contact hole ( 17 ),
the lower electrode ( 4 ) further comprises a horizontal section ( 4 b) which is connected to the other end of the axial section ( 4 a) and which extends in the horizontal direction, the device further comprising:
a capacitor insulating film ( 6 ), the inner surface of the contact hole, the outer surface of the axial section from ( 4 a) of the lower electrode ( 4 ) of the capacitor and the outer surface of the horizontal portion ( 4 b) of the lower electrode ( 4 ) of Capacitor covered with its upper and lower surface and
an upper electrode ( 7 ) of the capacitor, which is provided above the semiconductor substrate ( 1 ) so that the outer surface of the axial portion ( 4 a) of the lower electrode ( 4 ) of the capacitor and the outer surface of the horizontal portion ( 4 b ) the lower electrode ( 4 ) of the capacitor is covered with the capacitor insulating film ( 6 ) in between. 2. A semiconductor memory device according to claim 1, characterized in that the lower electrode ( 4 ) of the capacitor further has a rectangular section ( 4 c) which is seen along the periphery of the horizontal section ( 4 b) and extends upwards and the capacitor insulating film ( 6 ) and the upper electrode ( 7 ) also cover an outer surface of the rectangular section ( 4 c). 3. Method for producing a semiconductor memory device with the steps:
Preparing a semiconductor substrate ( 1 ) with a source / drain region ( 14 ) formed in its surface,
Forming an undoped silicon oxide film ( 2 ) on the semiconductor substrate ( 1 ),
Forming a first doped silicon oxide film ( 5 a) containing phosphorus on the undoped silicon oxide film ( 2 ),
Forming a contact hole ( 17 ) in the first doped silicon oxide film ( 5 a) and the undoped silicon oxide film ( 2 ), which penetrates these films and exposes a portion of the source / drain region ( 14 ),
Forming a second doped silicon oxide film ( 18 ) containing phosphor on the semiconductor substrate ( 1 ) to cover an inner side surface of the contact hole ( 17 ),
Performing an anisotropic etching on the second doped silicon oxide film ( 18 ) such that a surface of the source / drain region ( 14 ) is exposed to form a side wall spacer ( 18 a), which is formed from the doped silicon oxide film, with a cylindrical shape, on the inner side surface of the contact hole ( 17 ),
Forming a first conductive film ( 40 ) buried in the contact hole and extending horizontally on the semiconductor substrate 1 ,
Patterning the first conductive film ( 40 ) to form a lower electrode ( 4 ) of a capacitor with an axial portion ( 4 a) which extends at a right angle and with a horizontal portion ( 4 b) which extends in the horizontal direction extends
Performing a gas phase hydrogen fluoride treatment on the surface of the semiconductor substrate ( 1 ) to remove the first doped silicon oxide film ( 5 a) and the side wall spacer (18a), which is formed from the doped silicon oxide film, whereby an outer surface of the Axial section ( 4 a) of the lower electrode ( 4 ) and upper and lower surfaces of the horizontal section ( 4 b) of the lower electrode ( 4 ) are exposed,
Covering the outer surface of the lower electrode ( 4 ) with a capacitor insulating film ( 6 ), and
Form an upper electrode ( 7 ) of the capacitor above the semiconductor substrate ( 1 ) to cover the outer upper surface of the axial portion ( 4 a) of the lower electrode ( 4 ) and the outer surface of the horizontal portion ( 4 b) of the lower electrode ( 4th ) including its upper and lower surfaces with the intervening capacitor insulating film ( 6 ). 4. A method for producing a semiconductor memory device according to claim 3, comprising the further steps:
Form a rectangular section ( 4 c), which is electrically connected to the horizontal section ( 4 b), extends upwards, is formed from a conductor and as a section from the lower electrode ( 4 ) along the periphery of the horizontal section ( 4 b) is provided after the first conductive film ( 40 ) has been formed and before the gas phase hydrogen fluoride treatment is carried out.