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DE19581595T1 - Signalübertragungsvorrichtung mit mehreren LSIs - Google Patents

Signalübertragungsvorrichtung mit mehreren LSIs

Info

Publication number
DE19581595T1
DE19581595T1 DE19581595T DE19581595T DE19581595T1 DE 19581595 T1 DE19581595 T1 DE 19581595T1 DE 19581595 T DE19581595 T DE 19581595T DE 19581595 T DE19581595 T DE 19581595T DE 19581595 T1 DE19581595 T1 DE 19581595T1
Authority
DE
Germany
Prior art keywords
transmission device
signal transmission
multiple lsis
lsis
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19581595T
Other languages
English (en)
Other versions
DE19581595C2 (de
Inventor
Shigeru Matsushita
Kazuo Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE19581595T1 publication Critical patent/DE19581595T1/de
Application granted granted Critical
Publication of DE19581595C2 publication Critical patent/DE19581595C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DE19581595T 1995-01-31 1995-01-31 Signalübertragungsvorrichtung mit mehreren LSIs Expired - Fee Related DE19581595C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1995/000122 WO1996024208A1 (en) 1995-01-31 1995-01-31 System for signal transmission between plurality of lsis

Publications (2)

Publication Number Publication Date
DE19581595T1 true DE19581595T1 (de) 1997-03-27
DE19581595C2 DE19581595C2 (de) 2003-10-09

Family

ID=14125603

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19581595T Expired - Fee Related DE19581595C2 (de) 1995-01-31 1995-01-31 Signalübertragungsvorrichtung mit mehreren LSIs

Country Status (3)

Country Link
US (1) US5987083A (de)
DE (1) DE19581595C2 (de)
WO (1) WO1996024208A1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583737B2 (en) 1999-09-03 2003-06-24 Infineon Technologies Ag Device and method for compensating for propagation delay
DE10221156A1 (de) * 2002-05-13 2003-12-04 Infineon Technologies Ag Verfahren und Schaltungsanordnung zur Takt- und Datenrückgewinnung

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3173457B2 (ja) * 1998-03-23 2001-06-04 日本電気株式会社 データ通信装置
US6535045B1 (en) * 1998-07-09 2003-03-18 Intel Corporation Integrated circuit interconnect routing using double pumped circuitry
US6172540B1 (en) * 1999-08-16 2001-01-09 Intel Corporation Apparatus for fast logic transfer of data across asynchronous clock domains
DE19944895C2 (de) 1999-09-09 2002-01-31 Infineon Technologies Ag Optischer Steckverbinder
US6297702B1 (en) * 2000-01-10 2001-10-02 Honeywell International Inc. Phase lock loop system and method
GB2372599B (en) * 2001-02-27 2003-04-30 3Com Corp Clocking scheme for asic
US7512201B2 (en) * 2005-06-14 2009-03-31 International Business Machines Corporation Multi-channel synchronization architecture
JP2009044489A (ja) * 2007-08-09 2009-02-26 Panasonic Corp 転送性能最適化機能付非同期吸収回路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1129036A (en) * 1978-05-30 1982-08-03 Colin R. Betts Digital data transmission
JPH0620204B2 (ja) * 1983-03-07 1994-03-16 株式会社東芝 ル−プ形情報伝送方式
JPS61139139A (ja) * 1984-12-11 1986-06-26 Toshiba Corp 半導体装置の同期化方法およびこれに用いる半導体装置
JPH0620196B2 (ja) * 1985-08-29 1994-03-16 日本電気株式会社 バ−スト変換回路
US5712883A (en) * 1996-01-03 1998-01-27 Credence Systems Corporation Clock signal distribution system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583737B2 (en) 1999-09-03 2003-06-24 Infineon Technologies Ag Device and method for compensating for propagation delay
DE10221156A1 (de) * 2002-05-13 2003-12-04 Infineon Technologies Ag Verfahren und Schaltungsanordnung zur Takt- und Datenrückgewinnung
DE10221156B4 (de) * 2002-05-13 2007-05-03 Infineon Technologies Ag Verfahren und Schaltungsanordnung zur Takt- und Datenrückgewinnung

Also Published As

Publication number Publication date
US5987083A (en) 1999-11-16
WO1996024208A1 (en) 1996-08-08
DE19581595C2 (de) 2003-10-09

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8125 Change of the main classification

Ipc: H04L 7/00

8607 Notification of search results after publication
8304 Grant after examination procedure
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20110802