DE1591150C - Data processing device for the video quanta in radar systems for the detection of clutter - Google Patents

Description

The invention relates to a datenverarbei- vall available, and it is in turn when this tendes device for radar systems that exceeds the number of a predetermined number, a signal radar system for each range scan generated as the final signal for a long echo th video signals and this video signals to serve. This signal is processed as a control signal of a video quanta following one another, which is fed to the circuit, in order to block this gate circuit in the event of the presence (hit) or lack of a long echo, so that the echoes in the echoes in one of the corresponding distance intervals falling signals that are characteristic of a target for other distance intervals are not passed on, with a shift register for continuous, because they come from an interference area and not from the storage of a predetermined number on each other - io an interesting target,
following video quanta, one with the shift The disadvantage of the logic arrangement coupled from the French register mentioned, the data processing device known for the patent specification number of hits contained in the shift register is that only the frequency of hits generates characteristic signals, and one with the one area is determined, which is connected to a plurality of logic arrangements, in which the 15 distance intervals and in azimuth extends over several of the same distance interval but several successive distance scans, successive distance scans - but not the type of distribution, so that even with an ordered output signals of the logic arrangement grain such a distribution of hits for a long binary echo characteristic of a control signal for a gate circuit, the gate circuit blocking can be processed, the 20 control signal for the presence of a target nal is generated if no long characteristic signals are supplied at all, the echo is present, but only an accumulation of targets. Purpose of detecting interference areas (“clutter”). In the known arrangement, it is sufficient if a signal for a long echo is generated in a main problem with automatic recognition systems, two out of ten successive azimuth position recording and digital path tracking systems. If the automatic processing of all of the echoes 25 hits that lead to such a display is long video signals from the surveillance radar. Echo «lead, at the first and the tenth azimuth. In order to determine locating objects, there will generally be a scan, there are eight azimuth scans between the video signal of each individual distance range, which are quantized or“ digitized ”as hits counted as part of the interference area, and are registered as hits those of interesting targets if its amplitude can be a preselected threshold hit, so that such value, also called limit level, exceeds. If hits are lost and corresponding targets are not considered the number of hits in a predetermined number of.

Samples exceeds a preselected value, To avoid the difficulty of differentiating then the presence of a location object between real and fake location objects increases or reduce the target in the corresponding range 35, d. i.e., to the presence of not inter-area accepted. Unfortunately, such signals from tracking objects will be recognized by them not only caused by real locating objects, so commonly referred to as clutter, is still that there is a need between real and un- a system has been developed that is able to to distinguish between real goals. For example, clutter can be digitalized due to certain predetermined Reflection on the earth, on water surfaces and 40 ized video hit patterns to be recognized. Normal weather-related atmospheric conditions, by wise hits are those of real locating objects Radar interferences and radar jammers interference signals are generated over one or two distances, which in their entirety are designated as clutter areas and in azimuth to the width of the radiation network and which are limited to a certain distance lobe of the antenna. The well-known clutter area Generate a sufficient number of hits, 45 detection system will find out if that's a character then erroneously viewed as real locating objects an- tistically for a real locating object will see. Hit pattern does not exist, and then causes the detection and elimination of such interference that these hits are considered to be from a significant or signals is used by a data processing device that is not recognized as originating from a real locating object described kind, from the French 5 ° den.

U.S. Patent 1,365,972 is known. In short, with this device, the well-known clutter detection system detects the logic circuit determines in how many of the levels the sequence of hits (hit pattern) in of the shift register for echoes characteristic video successive distance ranges of each quantum, that is, there are “hits”, and the radar scan becomes fixed, that is, for each range scan set whether this number has a predetermined value 55 by means of a single pulse, and from in azimuth exceeds or not. Is a predetermined consecutive passes. Due to pre-minimum number of hits, the system will automatically show that for a selected criteria "Long echo" characteristic signal generated indicating the presence of clutter when hit in a indicates that the hits are not the given number of consecutive range echoes is about real targets, but about echoes 60 areas in successive passes extensive disturbance areas. It is these for a be catch. For example, if there are three long echo characteristic output signals, the successive distance ranges at each during several successive azimuths of three successive azimuths through-range scans get saved. Again, running will occur a hit pattern of three times it is then determined again how many of these are generated for a 65 three, which in a system of the previous type the long echo of characteristic signals in a loading indicates the presence of clutter. On similar ones A correct number of consecutive distance ways show a hit pattern of four by two scans in a certain distance yielding hits in four consecutive

3 4

distance ranges in the case of two successive ones the hit pattern in this distance range as well Go through the presence of clutter. take into account in the adjacent distance ranges Other patterns indicating clutter emerge when viewed. This information becomes the decision Hit in five consecutive distances - whether the used in a certain area areas that hit three or more consecutive hits - 5 existing hits from clutter or from a real one Follow the following distance ranges or ahead of the location object comes from. In general it is necessary or hits six or more in a row to pick up multiple clutter patterns before that following distance ranges for a single presence of clutter in a given Ent pass. . The reason why such a clutter detection system has proven itself at io is that noise occurs in every radar system the detection of a fixed or connected and always a finite probability, clutter covering the area is found to be quite useful in that noise creates the hits that are so distributed proven to be able to detect clutter for the hits - that they generate hit patterns that are falsely pattern criteria are used that can be viewed as clutter on solid surfaces. To the truth-based like three times three, four times two etc. This 15 probability to reduce that to a minimum The system has therefore proven itself in the detection of distribution hit patterns that come from clutter Clutter proven effective in solid areas. hen are actually generated by noise However, it has been found that it will not be used in the new system according to the invention Is able to trace the "history" of previous radar runs to interrupted or incomplete clutter, to recognize. For example, hits out of five 20 will indicate the existence of clutter even if it is present or to discover fewer successive ranges of noise. The system also uses range, which no hits from neighboring distance information about the clutter to the distance ranges of subsequent runs best estimate of the presence of ten, not interpreted as a hit of a clutter pattern to achieve clutter.

Although such hits are sketchy rather than 25 in short, according to the present invention A multi-digit counter comes from a gapless clutter area for each distance area be able. Because patchy clutter patterns are common, mapped. Every time the radar runs, this will be there is a need for a system that can produce hit patterns in every distance range as well as in is able to automatically analyze the presence of one of the 'adjacent distance areas, To recognize incomplete clutters by evaluating 30 and the status of the respective area is shown this information to prevent the ordered counter depending on the je-radar system occasional hit patterns received from such an area are changed. When the counter hits as an indication of the presence of real stand a preselected limit has been reached, he shows Looks at tracking objects in this area. hence the presence of clutter in the ent- der The object of the present invention is the corresponding distance range. The reason a data processing device of the input from Clutter is used for the rest described type to improve so that the radar system to prevent in the concerned Criteria according to which the presence of interference areas indicates real locating objects it is determined not only the number of signals to be supplied in one. Is in a certain detuned Area contained hits, but also 40 distance area the presence of clutter once record their distribution in this area, thereby recognizing that the counter reading the predetermined on the one hand, has not reached the limit number in the case of an incomplete interference area, the hit pattern for Parts of this interference area are processed as targets, this distance range is monitored, can, but on the other hand also not between disruptive The new features that characterize the invention Real goals or clusters of real goals are set out in detail in the claims. Targets are eliminated as disruptive areas. The system according to the invention itself is both this The object is, according to the invention, its structure and its function as well solved that the memory for each distance interval with respect to additional features and their advantages has a multi-digit storage location, in which a by the following description in connection with best to understand for the contents of the shift register during the previous 5 ° of the drawing. It shows going distance scans in one of the design F i g. 1 shows an azimuth distance diagram for distance interval associated time character- explanation of the invention,

ristic binary number is stored that the logic F i g. 2 is a table to illustrate

arrangement for the number and arrangement of the. patchy clutter in distance areas.

hits contained in the shift register of characteristic 55 successive runs,

generated static code numbers and a specific Fig. 3 is a block diagram of an inventive

Distance interval assigned code number in Ab-Systems,

dependence on the widths of two parameters, namely F i g. 4 and 5 tables to explain the effect

Lich the content of the shift register and the state of the system when determining the beginning and

the most significant bit of the 60 contained in the memory of the end of a clutter area,

Binary number, given certain combinations F i g. 6 is a table for explaining the manner in which in

these parameters are added to this binary number and a variable limit number for the counter as

If other combinations of these parameters are present, a function of various factors is formed,

is subtracted from this binary number, and that from F i g. 7 and 8 tables similar to the table according to

the most digit bit of this binary number the control 65 F i g. 4,

signal for the gate circuit is derived. F i g. 9 shows a block diagram of the decoding logic according to

In the device according to the invention, for each F i g. 3 and

Distance range the "history" of the previous Fig. 10 to 14 block diagrams of circuit

5 6

share, as shown in the in Fig. 3 counter range shown .R _{1 are} not immediately considered to be included by a real location write control. object evoked viewed-as long as not the

To fully understand the clutter condition according to the invention in the area R _{1 of} the azimuth G _{1 of the} new system, reference is first made to F i g. 1 that was intended. As explained briefly above, the method of operation of previous clutter detection systems, 5 other known clutter detection systems, which was referred to above, was described. The presence of clutter is assumed when explanation is assumed that an unspecified hit in three successive distance shown, located in a point 11 radar areas were received during three successive transmitters successive beams or radar runs, whereby a hit pattern impulses O ₁ bis b ₉ sends out when the not shown io of three times three was generated, or when hits from the radar antenna take the azimuth positions G ₁ to Θ ₉ in four successive distance ranges. In reality, the azimuth difference is two consecutive traverses or if, between consecutive pulses, only the hit from five consecutive distance fractions of an angular degree, for example 0.1 °. areas in one and hits out of three on top of one another - for better clarity, FIG. 1 shows the azimuth 15 following distance ranges in a previous difference enlarged. received the or subsequent pass.

Anyone skilled in the art knows that for every one also sent out there were hits from six or more radar pulses or pass an echo signal to the other successive range ranges during one Radar receiver is reflected. The echo signal passed through is viewed as indicative of clutter. at contains those of various objects or substances, 20 all other hit patterns were assumed to be which show an absence of clutter at different distances from them, so that a transmitter energy reflected to the receiver. more hits than from a real locating-in F i g. 1 represents a line 12 that was considered to come from such an object.

Echo signal derived video signal or video For example, a hit pattern was made up of five

run, which is then quantized 25 successive hits, followed by three aufkanrr to get signal quanta that hit the video successive hits, evaluated as the presence of a signal in a distance range, such as clutter pattern 25α. Therefore, those in the range A ₁ to R _{9 have been} represented. The signal quanta hits 15 and 16 blocked and not as from real ones can then be compared with a threshold value "hits originating from locating objects are treated. Since that shown in FIG Only if the signal quantum of a range hit pattern does not exceed the threshold value in any of the usual system areas, a used clutter criteria is met, since it did not record hits that included the possibility of a hit pattern indicating the possibility of a clutter ahead The presence of a locating object in the relevant area indicates the distance range as of real locating objects by signals 17 and 18. For explanation purposes, incoming signals are further processed, although it is assumed that the signals reproduced by line 12 quantized 256 from a fragmentary CIutter pattern The video signal of pass b ₁ can originate in the, which together with the C Lutter areas R ₁ to R ₅ exceed the threshold value 13, pattern 25a is part of a large-scale clutter pattern25. Therefore, for each of these distances are calculated.

areas hits recorded in FIG. 1 through 40 In a similar way, the previously known short lines 15 represent systems perpendicular to the pulse O _{1 which} are arriving as an echo on the pulse b _1. Each line is arranged in a different one of the distance hits 20, which have a hit pattern of hits in only areas. As is well known to those skilled in the art, four successive distance ranges A ₁ can be analyzed in each azimuth a series of successive runs formed by R _t , not as hits of a clutter pattern, around the 45, although they are in reality from the presence of a locating object to determine. Gaps in the CIutter pattern 25c may have been generated. Similarly, hits 21, which are considered to be a hit hand, if a predetermined number of patterns of hits in five successive hits are found during a preselected number of distance ranges without associated hits in adjacent runs, for example seven 50 bearded runs, have been found in the previous clutter - Hit during eleven runs. In order to simplify the explanation of recognition systems themselves, leaving out of consideration, it is assumed, however, that if such hits 21 might have originated from a CIutter pattern 25d hits due to their number during a single one, which are determined together with the run. Clutter patterns 25a, 25b and 25c are part of a wider figure. 1, it is similarly assumed that 55 spatial clutter pattern could be 25. The clutter hit 16 for the distance ranges R ₁ , R ₂ and R ₃ pattern 25 is in the table-like diagram which was recorded as an echo of the pulse b ₂ . F i g. 2 is shown more clearly, in which the "l" s and the further hits 17, 18, 19, 20 and 21 are echoed as "0" s hits or the lack of hits in the sale of the impulses £> ₄ , b ₅ , b ₆ , b ₇ and b ₉ recorded different distance ranges consecutively. For the pulses b ₃ and b _s , no hits mean 60 passes.

has been recorded. The impossibility of detecting sketchy

In known clutter-recognizing systems, the new clutter-grounding the hit pattern of each individual pass identification system according to the present invention as well as the hit pattern of neighboring runs overcome, in which the "history" of the hit to the Determining the presence of clutter 65 patterns in each distance range while analyzing, before a hit is accepted, successive passes to generate a it comes from a real tracking object. So was the signal used, the presence or the for example, the hit 15 indicates the absence of clutter from the distance. For example, for

the distance range R ₁ the hit patterns 15 to 21 as well as the lack of hits as an echo to the pulses b _s and b _{e used} to generate a signal which indicates whether there is _{clutter in the distance range A 1} or not.

In short, it does this by using a. Forward-backward counter for the distance range A ₁ . The counter adds or subtracts depending on the presence or absence of hits. When the total in the counter reaches a certain limit, the presence of clutter in area A ₁ is indicated and the radar system is prevented from _{using any hit in the range JR 1} as originating from a real locating object. As soon as a “clutter present” signal is present for the distance range R ₁ , hits indicating clutter must be missing in a sufficient number of runs in order to indicate the end of the clutter in the distance range U ₁ . A signal “no clutter present” is then generated in order to enable the radar system again to respond to hits from the range R ₁ and to consider them as originating from real locating objects.

In one embodiment of the invention, the counter associated with each distance range was a Four-bit counter. If the bit with the highest value indicated "1", it was indicating its presence from clutter on; on the other hand, if it showed "0," it indicated the absence of clutter. The other three bits were used as up / down counters, the status of which is incremented or in accordance with the following table was decreased:

Door pattern Increase
hung
around Ver
at least
tion
around 2 or fewer hits in a row
other distance limits
pass
3 hits in consecutive
Distance ranges
4 hits in consecutive
Distance ranges
5 or more hits in 10 in a row
other adjacent ent
distance areas
S hits in immediate succession
following distance ranges.
6 hits in consecutive
Distance ranges
7 hits in consecutive
Distance ranges 1
2
2
3
4th
5 1

With the count, the numerical value of the three counting bits with the lower valence is to be used from now on be meant. However, when talking about the counter, all four bits should be understood by this, even if the bit with the highest value is not used for counting purposes.

When the reading in the counter of a certain distance range reaches a certain limit, the counter delivers a signal "Clutter present" for this distance range. It is assumed, for example, that the limit number indicating the clutter is "7" and that the count in the counter assigned to the distance range R _{1 is} "1" before the hit pattern 15 arrives. The hit pattern consisting of five successive hits will increase the count 3 by 1 to 4 and the hit pattern 16 consisting of three successive hits will increase by 1 to 5. Thereafter, the lack of a hit pattern belonging to pulse b ₃ reduces the count to '4. The hit patterns 17 and 18 then increase the count to 5 and 7, respectively

ίο counter reading 7 is reached, a "clutter present" signal is generated, which prevents the use of hits from the range R ₁ for the determination of real locating objects.

Once the presence of clutter is

»5 recognized within a range, the three counting bits of the counter are reset to "0", and the bit with the highest significance is set to "yes" or "1". The hit patterns of the following runs are used to mark the end of the

ao clutter to determine. The lack of a hit pattern image with three or more successive hits causes the counter to increase its value by 1, while the presence of a clutter-indicating hit pattern causes the counter,

* 5 to decrease one's level by 1. Only when the counter reading reaches the full limit and the following hit pattern indicates the absence of clutter is the "clutter not available" signal generated, which enables hits from this specific distance range to be used again to identify real locating objects. The "Clutter not available" signal causes the bit with the highest value to be reset to "0".
In the previous example it was assumed that the counter belonging _{to the distance range A 1} reaches the limit number 7 after b _B. As a result, a "clutter present" signal is generated, which causes the bit with the highest significance to be set to "1" and the other bits to "0". When the hit pattern 19 is then received, the count increases to 1, since the hit pattern 19 consists of fewer than three successive hits. The pattern 20, which consists of more than three successive hits, reduces the count to 0, while the absence of a hit pattern in the case of pulse b _s and the more than three successive hits of pattern 21 increase the count again to 1 or reduce it to 0 again. So after the pulse b ₉ the counter-So was still 0, and the _{counter belonging to the distance range U 1} continues to deliver a "clutter present" signal. Only when the count reaches 7 and the next run delivers a hit pattern of fewer than three successive hits,

SS the counter is reset to zero and a "clutter not available" signal is delivered, which enables the radar system again to automatically view hits from area R ₁ as originating from real locating objects.

Consider now Fig. 3, which is an overall block diagram of the system of the invention. A radar receiver 30 receives for each transmitted pulse, such. B. the pulse b _t (Fig. 1), an echo signal and provides an analog video signal 32 or a video pass at the output. Each video pass is fed to a video quantizer or video digitizer 34, the function of which is to sequence the analog video pass

209619/137

9 10

to convert digital signals, each of which related to the video domain. The target detector 75 also includes a. signal of a different distance range. Parallel write register 77 and a parallel read-the quantizer 34 is controlled by a clock circuit 35 gister 78, each register of which controls a number of bits which provides it with distance interval signals equal to the number of bits of each word of the and thereby the work of the quantizer , namely 5 memory 76 is. In Fig. 3 represent the target bits, converting the analog video signal of each recorded parts of the registers 77 and 78, the bits of the distance range into a digital signal, controls. The quantizer is also controlled by a threshold generator 36 which can be set and recorded in each distance range and is recorded. ■■■ · .-

if there were a threshold value or limit level to io 'Each of the memory words comprises four bits, which supply the such as those in FIG. 1 with the reference number Ϊ3 be used to identify clutter in the corresponding drawn, distance area. The bit with the highest valence of these four bits. Each of the digital signals generated in the quantizer is compared with the threshold value to indicate the preamble. The Quantihandenseiris or absence of clutter is used, while sator forms an output signal with a first binary 15 the other three bits as an up-down counter value, z. B. a "1" if the digital signal is used. During each distance within a distance range above the threshold value, the memory is synchronized to one of the steps, while a binary signal with a 1024 words stored therein is entered into the read register 78 with a different value, e.g. B. forms a "0" if that is to be transferred. In Fig. 3, the bit Q ₈₈ represents the ao representing the bit video signal of the distance range with the highest significance of the four-bit counter, digital signal remains below the threshold value. One that is used to indicate the absence or presence of binary "1" at the output of the quantizer, such as B. Clutter is used, while the bits Q ₈₁ , Q _M and Q ₈₅ the pulse 41 in Fi g. 3, represents a hit, three-digit up / down counter in descending order, while a "0" at the output represents the lack of a valency. The content of the four bits is meant in hits. So z. B. as an echo to the Im- as the counter write control 60 is fed in, the same pulse b _x in FIG. 1, when the video is digitized, also with the specific distance run 12 in the video quantizer 34, which is supplied with a hit pattern assigned to the area. Threshold value generator delivering threshold value 13. On the basis of the previously read counter reading 36, a series and the new hit pattern information calculated by the video quantizer 34 from five successive hits, e.g. B. from 30 the control circuit 60 automatically the desired pulses 41 to 45 are supplied. Each of the pulses is an adjustment of the counter and supplies a binary "1" in increasing numbers and represents a signal of _{four bits, each denoted by F 41} to F _u , of the distance ranges R ₁ to R _5. Shift register 77 suitable signals. At the same time, the output signal of the quantizer 34, which is also the hit information of the relevant one of a series of binary "1" s and "0" s or hits 35, is the distance range from one shown in FIG. 3 is formed with Q ₁₃₃ and missing hits from the various central bits of the shift register 50 indicated on the successive distance ranges, the target bit part of the shift register 77 is supplied,
is fed into a multi-digit shift register 50. For a better understanding of the new invention that of the distance interval signals of the clock-based teaching, the method of operation of the in FIG. 3 circuit 35 is controlled so that the output signal 40 illustrated system in connection with that of the quantizer 34 in the clock serially inputted above example are explained in which it is assumed. So each of the "1" s and "0" s or each _{one of} the hits or missing hits belonging to the distance range A 1 is supplied by the quantizer 34 counter before the arrival of the hit pattern 15 from the shift register 50, in which they are in each the azimuth O ₁ (FIG. 1) has the counter reading 1, a time interval corresponding to the distance range. The word assigned to a specific distance task of the shift register 50 in the memory is the storage rich word in the read register 78 of a hit pattern of each video run. Each is read, the corresponding area bit of the shift register 50 is linked to a hit value belonging to a hit pattern in the bit Q _{193 of} the shift register decoding logic 55, the task of which is to ensure that 50 is located. It is further assumed that when the presence or absence of each hit pattern, the bit Q ₁₃₃ the hit 15 of the distance range R ₁ such as. B. the hit in successive ent- contains the distance areas belonging to the distance area R ₁ to be recognized and a counter word is located in the read register 78. As previously indicated, write control 60 to supply appropriate signals. , give, the counter belonging to the area R _{1 has} the So z. B. the decoding logic 55 in the case of the echo 55 status 1, where only the bit Q _{86 of} the register 78 on the pulse b _x received video pass which contained a "1", while the bits Q ₈₉ to Q ₈₈ each have a presence Contains hit pattern with hits in "0".

Determine five consecutive areas and this data is sent to the counter write control

a corresponding signal 60 is supplied to the control circuit 60. At the same time, the hit values are delivered. , 60 the distance ranges A ₁ to R ₉ , which are in the

The system according to the invention also contains a bit Q ₁₃₃ and the eight subsequent bits of the ReVideo target detector 75, which were stored in a video processing register 50, supplied to the hit pattern memory 76 with a capacity of many decoding logic 55. This logic recognizes that contains multi-digit words, the number of the presence of a hit pattern in five consecutive words being equal to the number of consecutive distance ranges (A ₁ to R ₆ ) to be monitored. In one example, the storage summed whereupon corresponding to the logical map, as more 1024 multi-digit words, each word is it shown in the previously specified table, to a different interest of distance, the count of the removal region R ₁ to-

11 12

ordered counter is increased by 3. This is all set to "0" by flip-flops F ₄₁ to F _{44, as in the}

the control circuit 60 causes the bit F _{43 of} the row R _{1 of} the column C _{1 is} indicated. If other-

Sets write register 77 to "1", while the other sides add the count of a memory word to

three bits belonging to the counter, namely F _n , F _{i2 of the} ordered counter is "1", as column C ₁ shows,

and F ₄₄ , must be set to "0". 5 and if that decoded by the decoding logic 55

At the same time, the binary state of bit Q ₁₃₃ hit pattern will result in seven successive hits.

of the shift register 50, which contains the hit value of the line R ₆ indicates, then controls the counter

distance range A ₁ represents, on the target bit part of the write controller 60, the flip-flops F _n to F ₄₄ in the

Register 77 transferred; So in this part it becomes a way of setting flip-flops F ₄₈ and F ₄₃ to "1" and

one hit saved. This value is set together io the flip-flops F ₄₁ and F ₄₄ to "0", as it is in

written into the memory with the counter reading. Row A ₇ , column C ₂ by the combination 0,1,1,0

Then it is shown during a following distance.

intervalis the shift register 50 one bit further - if, however, taking into account the shifted out, and at the same time it transfers the memory reading of the counter reading from the distance 76 the word assigned to the following distance range, ie the counter assigned to the 15 area and the associated area R ₂ in the read register 78, matches the pattern decoded the count in the counter so that the contents of * is to bring the removal region A ₂ ^au f 7 ', which value is previously fixed as a boundary counter associated with in the decode logic 55 number defined, then tilts the control circuit 60 can be set to determine whether the flip-flops F ₄₁ , F ₄₂ and F ₄₃ to "0" and the counter reading as a function of the assigned hit ao flip-flop F ₄₄ to "1" increased or decreased by the presence of pattern shall be. Clutter in the appropriate distance range

If as an echo on the transmission pulse b _t the to display. In the previous game, it was assumed that the hit 16 belonging to the _{distance range A 1 was that after the hit pattern 17 received as an echo on the bit ß 133 of} the shift register 50, the transmitted pulse b _t (FIG. 1) becomes the range A ₁ associated memory word is again transferred to the »5 of the _{counter belonging to the distance range A 1} to read register 78. Because during the previous "5" was set. If the counter in the counter arranged as an echo for the subsequent run, the counter reading of the R ₁ following pulse b _& incoming hit pattern was increased to four, there is after lysed and the counter reading “5” from the bit ß for un- • reading out the word _{87 of} the read register distance range R _{1, the} counter belonging to the read register is read 78 to "1", while the other bits remain at "0". 30 is, like the _{combination shown in column C 6} , the counter reading 4 (Q ₉₇ is "1") is the write control, and then the hit pattern 18 with four entries 60 is delivered. At the same time the hit pattern is determined on the following hits, which reaches 16 in the decoding logic 55 decoded. Since the hit counter reading has the value "7", since the counter 2 adds up the distance range R ₁ successive hits when four pattern hits are found, encompassing successive distance ranges, however, contains a limit number "7" as an indication of the range, If the write control 60 increases the presence of clutter, that is, when the count of the count of the distance range R _{1 is} "7" or more, the counter is set to "0" by 1. This is achieved by setting the bits F ₄₃ and the bit with the highest value is set to "1" and F _{41 of} the write register 77 is set to "1". Namely, the control circuit 60 then controls to be brought. At the same time, the fact that 40 flip-flop F _{44 is set} to "1", as indicated by the combination 1,0,0,0 shown _{in column C 6,} a hit 16 in distance range A ₁ , row A _3,
was, the target bit part of register 77 from bit ß _133. Above, the invention was supplied in connection with register 50. with the detection of the presence of clutter

The logical operation of the counter according to the invention by increasing the count of the counter assigned to each de-new system when searching for the presence 45 distance area depending on clutter in any distance area is best described in the form of the pattern table by the hit recorded in each video run. From the previous examples. 4, which will now be discussed. In the play, the one previously specified in the text and the one in line A ₀ , the various possible combinations are F i g. 4 it can be seen from the table that functions of the binary states of the bits β _M to 0 _{M of} the reading 50 in the detection of a hit pattern with hits register 78 shown as belonging to the various counters in three or more successive distance-distance ranges - the counters are added, but read when they are available. Since the table shown in Fig. 4 is of hits in two or less of each other, the operation of the system in the search for the following distance ranges is subtracted by the counters. Represents clutter, bit Q _{88 is} always "0". Column C ₁ 55 As in FIG. 4 shows, if none represents the read counter reading "0", because all clutter is detected, ie if hits in only three bits Q _n , Q _M and Q ₉₇ are "0t, while two or less successive distance column C _{1 represents} a read-out counter reading 1, areas can be determined as the values, because the bit ß _{M has} the value "1". In a similar way, _{specify row A 1} that each of the columns C to C ₇ read the counter readings 2 to 6 60 from the counter and digest the value given in row R ₀ by "1". diminishes. If, for example, a counter reading of "2"

Column C ₀ shows the different hit patterns, read out, as the data in column C ₃ , row R ₀

which indicate decoded in the hit pattern decoding logic 55, and no clutter is detected, as in line A ₁

can be. So if, for example, each is specified, then the count is reduced to 1,

Word read out counter associated while j _e as "0" 65 _f it through the in row R _1, column C ₃ shown

is determined, as in column C ₁ , and if the setting of the flip-flops F ₄₄ to F _{41 is set} to 0,0,0,1

Decoding logic 55 has not discovered a clutter hit pattern, which is illustrative.

as indicated in line R ₁ , the actuals are cluttered once in any distance range

13 14

established, d. That is, the counter reading of the pulling position reaches ti «and thus shows that it is present

If the counter belongs to the limit number, which was previously accepted by Clutter with "7", and bits Q ₈₆ , Q _M are located, bits ■ and Q ₈₁ in the counter are also set to "1". If during

with the highest value to "1" and the others of the next radar run no clutter detected

three bits toggled to "0". When the counter is read 5, all four bits of the counter are in the position

bit Q _{68 shows} the value "1" and the other "0" toggled back, like row R ₁ of column C ₈

three bits ß ₈₅ , Q ₈₉ and Q ₈₇ each indicate the value "0". Is the bit with the highest significance in

as the combination position "0" is tilted in the table according to FIG. 4, it indicates the end of the clutter,

1,0,0,0 indicates. If the bit Q ₆₈ is set to "1" and the system starts again with its work

indicates the presence of clutter, the transfer is used to locate clutter, which was previously described.

Carrying out each recorded and stored in the read register 78 and in the table according to FIG. 4 was shown,

secured target to a target not shown in detail- From the preceding description it is evident-

Auswerter prevented by a gate 80 that is locked, Hch that according to the teachings of the present

if the bit β _{88 has} the value "1". So as long as invention relates to each, in each case a different distance

the bit ß _{g8 has} the value "1", which means that there is a memory word assigned to a counter

by clutter means, the locating object is heard or. Since all memory words are selected one after the other

Target in the corresponding distance range will not be read to get the one hit in every word

as a real locating object for further processing or value corresponding to the lack of a hit

Extrapolation used. the assigned distance range for each

The novel system according to the invention is to be stored in addition to ao radar run, the hit pattern generated by the determination of clutter by analyzing the distance of each of a series of successive radar run-through ranges generated by the radar runs is analyzed and the hit pattern generated is also able to read the count to determine the end of clutter assigned to the distance range, if the clutter counter has previously been detected depending on the presence or absence of clutter. This is achieved by increasing or decreasing the number of hits, which is indicated by increasing or decreasing the count, if there is no clutter Each clutter-indicating hit pattern, successive distance ranges are present, so if the number of successive distance ranges and by decreasing the count, if range «in which hits are present, any of the qutter indicating hit patterns in 30 then the rate of increase of the counter is also greater. Form of hits in three or more consecutive times - If the counter reaches a preselected limit number, as determined in the following distance ranges. If it was previously assumed to have reached its maximum value with t7 «for explanation, the counter is reset and its bit does not result in any of the clutter with the highest value in the position» 1 «when the following radar run results in a hit pattern with the highest value in the" 1 "position four bits 35 toggle to indicate the presence of clutter, the counter reset to "0". If the bit is as long as the clutter occurs, each target in this highest value is reset to "0", then it shows correct. Distance range from processing it thus the absence of clutter, and the previous excluded in a target evaluator for extrapolation of real methods for detecting the presence of locating objects,
new clutter is resumed. 40 The system according to the invention is also shown in FIG

The operation of the system according to the invention, the end of the clutter by increasing the counter reading when the clutter end is determined, can best be summarized in the table shown in FIG should be treated. In the case of the presence of clutter indicating the presence of clutter, first consider column C _1. How to determine in line R ₀ 45 hit patterns. As soon as the counter can be seen by C ₁ , the bit Q _{88 has} the value "1", which has reached the maximum count and the following indicates that clutter has been detected while the radar scan does not indicate a clutter hit three other bits Q ₈₆ , Q ₈₉ and Q _{81 are set} to "0". If, as a result of the following radar run, the bit with the highest value in which no clutter is detected, the counter adds "1", which tilts back the 5 ° position "0", and the system works from the tilting of the flip-flop F ₄₁ to the "1" state again as a clutter detection system. The bit can be seen with. If, on the other hand, clutter is detected, that is, the highest value can be imagined as clutter the following radar run contains a bit indicating a hit pattern, which in position "1" means that there are hits in three or more successive occurrences and in position "0" the absence of distance ranges , then the counter remains in the 55 clutter display.

Position "0", with the exception of the bit with the highest so far, is for the limit number with which the counter value, which remains in position "1" and thus the status is compared, indicates the presence of clutter. If, on the other hand, clutter is to be determined, the value "7" is assumed to be the read counter reading 1,0,0,1, as it was the column. Therefore, the presence of C _t in line R ₀ was only shown, then the absence of clut-60 is assumed by clutter if the count “7” then the count “2”, read as 1,0,1,0 , is sufficient or exceeded. It has now been found, while the presence of clutter on the counters, that the sensitivity of the new stand has been reduced to 1.0AO. system according to the invention for detecting gaps

After a sufficient number of consecutive adherent clutters by using a controlled one

Radar sweeps that do not show cluttering of a variable limit number instead of a fixed limit number

Generate fermuster, reaches the counter that can be increased in column. In a preferred embodiment

C ₈ , line R ₀ shown state. The bit Q ₈₈ , the approximate form of the present invention became the

The bit with the highest value is still made dependent in a limit number on the threshold value

15 16

or limit level, which in the quantizer 34 according to an AND gate generates a binary "1" or an off-F i g. 3 is used to determine the presence or output signal at "yes" level only if each of its lack of a hit in each of the input signal distance ranges is a binary "1" or at the "yes" level. It can be assumed that when using is level, while an OR gate has a binary "1" of a higher limit level, ie when using 5 at the output, if at least one of a higher threshold value, so that a hit only inputs a binary »1« or the corresponding »yes« - is displayed when the quantized video level is available. On the other hand, an negator delivers a "yes" signal that exceeds the higher level, the probable binary "1" at the output only when the probability increases that such a hit from an input is a "0" or the "no" level , really interesting locating object comes from. The shift register 50 is shown in FIG. 9. At the same time, when a higher limit is used, the one bit Q ₁₃₃ , before bits 101 to 109 and after that it is more probable that hits consisting of one of bits 111 to 119 will be found. As previously explained, groups of successive range ranges the "l" s and the "0" s of the video quantizer 34 received will form a clutter-derived clutter of the presence or absence of hits in on-hit patterns. In addition to the limit level, 15 successive distance ranges are shown, both the counter reading at each point in time and the hit pattern detected by the clock or control signal from the clock to the automatic control circuit 35 in the shift register, the limit number with which the counter is fed , whereby the shift register is compared to a signal per stand for displaying clutter. Distance range clock (distance interval) receives.

The way in which the limit number is automatically varied in dependence on the previously mentioned variables of hits is temporarily varied in the shift register bits, can best be stored on the basis of the and per distance range clock around a table according to FIG. 6 treat. As shown in FIG. 6 step shifted to the right. For example, if a high limit is used, bits Qi will be ₃₃ , 101 and 111 at any point in time, and if the memory counter is "5", then the hit pattern will be in the area .R ₁ , the following and if a hit pattern is detected Hits area R ₂ and the previous area stored in three successive distance ranges. This is the case when the binary the limit number, compared with that of the count signal in the signal Qi for the removal region ₃₃ is automatically set to "6", while showing at R. ₁ In the next distance interval, the use of a lower limit level in the quantum 30, the binary signal stored in Q _{133 represents} the hit of the tizer 34 the following distance range required to display clutter, such as B. R ₂ , etc. Limit number is "7" if the count is in memory. The binary signal stored in Q ₁₃₃ represents count counter 6 and three successive hits have been detected during each distance interval. From Fig. 6 it can be seen that its or lack of one hit from another in the detection of hit patterns with hits 35 represents a range of distance.

in a greater number of range ranges. The hit pattern decoding logic 55 includes one

the limit number required to display clutter. Variety of AND gates, OR gates, and

is decreased. Inverters that are used to generate signals,

The method of operation of the system according to the invention means the patterns containing 3, 4, 5, 6 and 7 hits, when a higher limit level is used, shows 40 th with respect to the distance range, the treble table of which is shown in FIG. 7, while FIG. 8 a table fersignal is stored in bit Q ₁₃₃ . Thus, for example, the functioning of the system when the bits Qi ₃₃ , 101 and 102 are connected to an AND gate definition of the presence of clutter when using 121, a "yes" output signal is only connected to a lower one Indicating limit level. Whereas if the bits 102, 101 and g _{m are} binary "l" the table according to FIG. 4 contain the mode of operation with the fixed 45 or hits, indicating that the limit number represents "7", the tables after the distance ranges R ₁ , R ₂ and R ₃ as in FIGS. 7 and 8 show the mode of operation of the system with hit pattern 25a (FIG. 1) hits are present, variable limit number. In a similar manner, the bits 101, Q ₁₃₃ and 111 are connected to another AND gate 122 in the quantizer 34 to determine a limit level used, the detected hit pattern 50 "yes". Signal to be delivered only when hits in the counter assigned to the respective counter reading in the distance range adjacent to the respective distance range R _1. The areas are in place. Likewise, the bits Q ₁₃₃ , the actual values of the high and low limit 111 and 112 are connected to an AND gate 123; levels depend on the way in which the quantum works - this only delivers a "yes" output if in the sator, which does not belong to the subject of the present 55 distance range R ₁ and the two previous invention. Distance ranges hits are present. the

9 shows a block diagram of the shift output values of AND gates 121, 122 and 123

gisters 50 and hit pattern decoding logic 55 are fed to an OR gate 124 which is a

according to Fig. 3. In the following description of the "yes" at the output, if hits in three of the

According to the system according to the invention, the individual AND- 60 distance range R ₁ assigned to one another -

and OR gates shown as semicircular blocks, the following distance ranges are available. the

which the input signals on the even side to- output of the OR gate 124 is an AND-

are passed, while the output signals are fed to the gate 125, which also has the outputs

Semicircle side appear. An AND gate is fed through by inverters 126 and 127. the

a period (.) and an OR gate through a 65 two negators only provide "yes" output

Plus (+) marked in the semicircle block. A signal if higher-order hit patterns are missing,

The negating circuit (negator) is provided by a block So the AND gate 125 provides one one out of three

marked with an I. As is well known, a signal corresponding to an existing pattern matches

209 619/137

17 18

only if hits from three consecutive bits are connected and their output range ranges are present, one of which is fed to an OR gate 162, the range range R ₁ must be, whose hit then a "yes" signal on Output generated if in signal is in Q ₁₃₃ , but a hit hit is present in a larger one of the combinations consisting of five successive distance numbers of successive distance ranges and no 5 ranges. pattern is available. The output of the gate 162 Signals are generated in a similar manner, which is connected to an AND gate 163 which corresponds to a hit pattern of hits in 4, 5, 6 or 7 further input connected to an inverter 165 in the following distance ranges. having. The negator then has a “yes” at the output. For example, the three on one side of io if higher-order hit patterns, ie bits 101, 102 and 103 from Q ₁₃₃ and the pattern on the six or seven hits, are not different Bits 111, 112 and on the side of Q _{133 are present.} The AND gate 163 thus supplies a 113 in four AND “yes”, each having four inputs, at the output, if a hit pattern of five gates, such as e.g. B. 131 and 132, combined and then supplied to successive distance ranges before an OR gate 134, the output of which is 15 and higher order hit patterns are missing, only has a "yes" if a hit pattern is in an AND gate 171 with at least six consecutive ones one of the combinations of four consecutive bits is connected, while an AND gate 172 is detected with other distance ranges. seven consecutive bits is connected. The output of the OR gate 134 is connected to an output of the gates 171 and 172, each with an OR gate 135 via an AND gate 136, ao OR gates 173 and 174, respectively. The OR leads, the task of which is to send only gate 174 to gate 135, only has a "yes" output if hits then deliver a "yes" output if hits are higher-order patterns in seven successive distance ranges, ie from hits in more have been recorded. On the other hand, the OR gate 173 has a "yes" as four successive distance ranges if hits in six existing hit patterns have not been detected. 35 other hit patterns have been found. According to the rules of the present invention, the output of the OR gate 173 is connected to one of the meaning of the detection of clutter from hits AND gate 175 ^ of which another input is connected in four successive distance ranges to an inverter 176, which is a viewed as great as by Clutter, who shows off "yes" when a hit pattern of seven hit hits in the majority of a given number of 30 is missing. So the output of AND gate 175 consists of distance ranges. For example, a "yes" is here if a hit pattern has been found in six consecutive distance ranges that the meaning of the existing distance ranges has been captured and one of the existence of hits in four consecutive in seven consecutive distance ranges is equal to that which the present lacks. Merely for the sake of explanation, the outputs are denoted by ten hits from gates 125, 135, 163, 175 and 174 with successive distance ranges with respect to R ₁ X901, ΛΓ902, ΛΓ903, X9Q4 and 905. Which should be measured. Thus, according to the last digit of the number in each figure, the amount of the present invention is ten majority units by which the count is incremented. Thus, the hit pattern decoding logic 55 used by for example the detection of a hit pattern from which two hits are denoted by the digits 141 and 142 causes 40 three hits to increase the score. Each majority unit is linked to other counters belonging to ten respective distance ranges around successive bits of the shift register 50, while a hit pattern of seven hits is linked, each including bit Q ₁₃₃ . Each (^ 905) increases the count by "5". From the pre-majority unit only delivers a “yes” output description, it can be seen that there is always a signal when five or more of the input inputs 45 only one of the five signals at the same time are “yes” . The outputs of the various multiple can, with the "yes" signal, the hits from the largest units are shown to an OR gate 144 to number of successive distance ranges, which only then represents a "yes" signal at the output. On the other hand, hits in two or less are delivered if a majority of hits in at least consecutive distance ranges are present in a combination of ten consecutive 50 den, which, as has been detected in connection with the inventive distance ranges. The output according to the system explains that the absence of clutter of the OR gate 144 is also equivalent to the OR, all five signals (X901 to X905) gate 135 are fed through an AND gate 145 , the "no" or "0".

the output of an inverter 155 is also supplied. The signals JT901 to ΛΓ905 are only supplied by the hit pattern to the gates 145 and 136 from its 55 pattern decoding logic to the counter write control 60 output if the hit pattern is fed to the in addition, the binary values of the higher-order _{bits β M are not present.} So it is received until ß ₈₈ of read register 78. Accordingly, it will now be understood by anyone skilled in the art that the output during each distance interval is the status of the OR gate 135 only if a counter that is assigned to a pattern consisting of four hits for the respective distance range or a pattern of 60 is its hit value at this time hits are in a plurality of ten successive- in bit Q _{133 of} the register 15, together with the following distance ranges existing pattern the signals representing different hit patterns have been detected and if hit patterns of higher ΛΓ901 to ΛΓ905 are delivered which correspond to the distance Lack of order. area, the hit value of which is in bit Q ₁₃₃ In a similar manner, signals are generated which are a 65, so that the control circuit 60 by controlling hit patterns of five, six or seven hits correspond to _{the binary state of the flip-flops F 41} to F _{u des.} In FIG. 9, AND gate 161, write register 76, represents signals for increasing or combining the AND gates, with which five can generate successive decreases in the count. It is the

19 20

The task of the counter write controller 60 being necessary to set one of the logic applying the presence of clutter to the logic shown in FIGS. 7 and 8 hit patterns exist.
The signal that is required to reset all four bits F ₄₁ of clutter also to F _{44 of} the write register 77 (FIG. 2), such as that shown in the table in FIG. 5, is required is, if the four bits of the read register 78, ie ß _g5 represented relationships for the detection of the clutter to Q ₈₈ , are all in the binary "1" -state, is generated in a similar way, if previously clutter was detected Licher way. This can be done by an AND gate. ter 221 (Fig. 10) can be reached, its five inputs. It is pointed out again that during gears with the four bits ß ₈₅ to ß _{88 of} the read register 78 • searching for the presence of clutter ίο and with the output of AND gate 201 are bound upon detection of a no clutter indicating clutter. Only if the four bits show a “yes” hit pattern, ie when hits are found in and at the same time the output ΛΓ800 of the AND gate two or less successive distance 201 shows a “yes”, does the AND gate 221 deliver a range that Counter subtracts the value "1", as it does with the "yes" output signal labeled .Y820. This is indicated in lines R ₁ of Tables 7 and 8, 15 signal is in the control circuit 60 for resetting during the search for the end of the clutter development of the four flip-flops F ₄₁ to F _{44 of} the write register when a hit indicating no clutter is detected. to “0” or “no”, as line A _1, column C ₈ pattern, the counter adds the value “1”. A signal in FIG. 5 indicates.

the presence of a "no clutter" match pattern, as previously stated, is noted during the search for. indicates, the bit with the highest significance can expediently be generated by an AND gate 201 ao clutter, as FIG. 10 shows. 10, the counter is set to the “yes” state as soon as the counter “in the block diagram of various logic circuits has reached the preselected limit number. As before the counter write control 60. The AND gate 201 in connection with the description of the tables is fed with the signals Jf901 and ^ 905 via inverters according to FIGS. 7 and 8, is supplied in a 211 to 215. So if all five signals ^ 901 as the preferred embodiment of the invention are "no" to X905 , that is, if a clutter pattern limit number is not available depending on the threshold value used in the video quant of three or more successive distance sensors 34 and on the counter ranges , the five inputs stand and the respective scanned associated ■ of the AND gate 201 has a "yes", so that the hit pattern is also controlled. The logical equation, the output signal labeled A "800, is" yes ". If 30 must be fulfilled in order to generate a signal XSiO , the output of the gate 201 on the other hand " no ", ie indicates that the counter reading is the selected Limit number is a signal denoted by jreoo, it means that has reached, can be specified as follows:

JT810 = [X90S - XH + (jr905 + X 904 * XH) * β 85

C ^

+ (JST905 + ΛΤ904 + JT903 * XH) * ß86

I)

-f (JST905 + JT904 + * 903 + X901 XH) ß87 (1)

+ CJT905 + JT904 + * 903 + JT902 + JT901 * XH) -QSl * ß85

+ (JT905 + JIfJHM + JT903 + JT902 + JT901)

• ß87 · ß86j · ß88.

In equation (1), XH is a "yes" signal which the output is designated by an overhead dash control circuit 60 from the adjustable threshold.

value adjuster 36 when using a high limit 60 The tables in FIGS. 5, 7 and 8 show that the level is supplied. On the other hand, XH is “no”, which is indicated by XH during the search for clutter when it is reached, if the bit with the lower threshold value is used in 36 one of the limit number, that is, if JT810 is “yes”. Likewise, the highest valency, ie the flip-flop F ₄₄ , which is indicated in the following equations A * 901 to X90S position "yes" is toggled. On the other hand, the outputs of the hit pattern decoding logic 55, 65 remain looking for the end of the clutter, which in the table shows the outputs of the bits in the read F i g _{during ß 8t} to ß _88. 5, the bit with the highest value register 78 is shown. A “yes” at the output is represented by the activity F ₄₄ as long as “yes” as the read out ß ₈₈ “yes” bit reference number, while a “no” is at and the clutter end has not yet been detected,

21 22

that is, the signal A "820" is "no". So it can be seen that ΑΊίΙΟ through an OR logic connection to flip the flip-flop F ₄₄ f and the six expressions A to F and an e UN D-

can be given by the following equation: Linking the obtained expression with β88

is procreated. In Fig. 11 becomes an AND gate 241

SF 44 = ΛΈ10 + β 88 · XSlQ , (2) 5 for generating the expression A from the signals

Α "905 and XH used, which is" yes "if the higher one

where SF44 is used to toggle bit F ₄₄ with the highest limit level. In a similar way, valence and JF82Ö mean the negation of XSlQ . AND gates 242 and 243 and an OR gate 244 It can be seen that the bit with the most significant. Expression B. The expression C is toggled by AND-ability F ₄₄ to the state "yes" if ent io gates 245 and 246 and an OR gate 247 neither generates the limit number when searching for clutter, while AND gate 248 and 249 and a suffices as ATHO indicates or when searching for OR gate 251 will produce the expression D. Similar to the end of the clutter, the bit with the highest value can be shown that the expression E is "yes" due to the AND action of the read register ß88 and the clutter gates 252 and 253 and an OR gate 254 erEnd has not yet been detected what the negation of 15 can be attested to , while an OR gate 255 indicates XSlQ. The circuitry required to implement 5F44 and an AND gate 256 producing the term F is shown in FIG. 10 by an AND. The outputs of gates 241,243,246,249,253 and 256 gates 231, one input with the bit Q ₈₈ are all fed to an OR gate 260, which has the output of read register 48 and its other input with a "yes" if any which is also the output of the AND gate 221 via an input signal carried by an Ne-20 "yes". The output of the gator 233 is connected. The output of the AND-OR gate 260 is fed to an AND gate 262. Gate 231 is fed to an input of an OR gate which is also fed to the output of an inverter 263 235, the other input of which receives the binary state as an input signal of the logic circuit generating the signal XSlQ receives bits Q ₈₈ , ie the counter bit with the highest is.vThe equation (2) and the preceding weighting in the read register 78 (FIG. 3). The write output shows that the output connected to the flip-flop of the AND gate 266 delivers the signal XSlQ, the output of the F _{44 of} the write register 78 is always "yes" if the counter reading only passes the limit OR gate 231 " yes «is when either number is reached.

A * 810 or the output of AND gate 231 is "yes". _{The logical connection that the flip-flop F 41} with the lowest valency corresponds to the toggling of the die to generate the signal A ~ 810 according to equation 30, which indicates the reaching of the limit number in the counter, according to the tables according to FIGS. 5, 7 and 8 required logic circuit is indicated in the relationships now to be presented, can be discussed as follows. 11 shown. From equation (1) squeezed:

Γ A ₁ B ₁

SF41 = [QSS · (* 901 + * 903 + * 905) + ß85 · (^ 902 + ^ 904)

ß85 · (ß86 + ß87) · J5T8OOJ · ß88 D ₁

(3)

[β86 + β87 + * 800] * β88 * XSIQ

Is designated in the equation through SF41 50 has been and d as Sys tem searches for clutter, and locations of the flip-flops F ₄₁ is achieved by an AND Further, the signal A receives ¹ SIO, indicating that the combination of the expressions uecke A ₁ , B ₁ and C ₁ with the limit number has not yet been reached and therefore signals β 88 and A ¹ SlO. The fourth, _{denoted by D 1,} the flip-flop F ₄₁ in each of its two binary tapering expressions represents the mode of operation of the circuit can be tilted. The fourth term in the control of the toggle of flip-flop F ₄₁ at 55 equation (3), the term D ₁ , is represented by an OR search for the clutter end, as in gate 271, and an AND gate 272 generated. The AusTable according to FIG. 5 is shown. The logic circuits of AND gates 270 and 271 are fed to a device which is used to control the setting of flip-flop F ₄₁ OR gate 275, which _{is required for flip-flop F 41} according to equation (3), FIG. 12 shows a » yes «returns a binary» 1 «as a block diagram in order to display it. In the circuit, a 60 generates the “yes” state if one of the outputs OR gates 261 and an AND gate 262 that of gates 270 and 271 has a “yes”; If both expression A ₁ and an OR gate 263 and an AND gate have a “no”, the flip-flop F ₄₁ in gate 264 is the expression B ₁ , while the expression “no state is toggled.

C ₁ from an OR gate 265 and an AND die in the counter write control 60 (Fig. 3)

Gate 266 is generated. The outputs of the gates 6 ₅ perform logical operations when toggling

262, 264 and 266 are connected to one of the flip-flops 42 and 43 via an OR gate in a similar manner

AND gate 270, which also expresses the signal by the following equations:
ß88, which indicates that no clutter has yet been discovered

23 24

A ₂ B ₂

SF42 = L (ß85 · ß86) · (Z902 + X 903) + (ß85 · ß86) ■ (X901 -f J4T9O2 + X905) C ₂ D ₂

ß85 ß86 X903 + (ß85 ß86) (JT901 + X904)
E ₂

(ß85 * ß86 * ß87 + ß85 * ß86) * JT800) * ß88 * JT810

F ₂

(ß85 ß86 + ß85 ß86)
G ₂

QS6 + ß85 · ß86 · ß87) · ^ 80Oj · ß88 · JT820

B ₃ C ₃

SF43 = L (ß85 * ß86 + ß87) * X901 + QS6 * X902 + Q85 * X903
, D ₃ E ₃ F ₃

ß87 902 + ß86 Z903 + ß87 (ß85 + ß86) ΛΈΟΟ + ^ 904 + JT905J ß88
H ₃ I ₃

(ß85 ß86 + ß87) Α'δΟΟ + ß87 (ß85 + ß86) JT800 ß88 820

in which SF42 the toggling of the flip-flop F ₄₂ and SF43 OR gate 315, the output of which is "yes", signify the toggling of _{the flip-flop F 43} . 13 shows when the second flip-flop F _{42 is to be switched} to the “yes” state or a block diagram of the binary “1” contained in the circuit 60,
logic circuit required for generating the signal Fig. 14 shows a circuit diagram of the logic switch SF43. In FIG. 13, an AND 4 ° direction, which is used to control the toggling of the flip-flop F ₄₃ gate 281, the expression A ₂ , while for generation by generating the signal SF43 is used. As the second expression B ₂ an OR gate 282 and can be seen, AND gates 321 and 322 produce an AND gate 283 and an AND together with an OR gate 323 gives _{the expression gate 284 the expression C 2.} The expression D ₂ A ₃ while the expression B ₃ from an AND gate supplies an OR gate 286 and an AND gate 287, _{45325 and the expression C 3} from an AND gate 326 during AND gates 291, 292 and 293 and an OR- can be generated. Similarly, out gates 294 will generate expression E ₂ in a _{similar manner to previously expressing D 3} and E ₃ through AND gates 328 and 329. The expressions generated during the expression F ₃ an AND gate A ₂ to E ₂ are fed to an OR gate r 29 5. 331 and an OR gate 332 required. The expression of its output with the signals Q 88 and Α'βΙΟ so G ₃ is formed by the gate 335. The expressions are fed to an AND gate 296. The outputs A ₃ to G ₃ are passed through an OR gate 340. The AND gate 296 is "yes", the flip-flop is linked, the output of which is changed to "yes" or binary " _{by an AND gate 342 F 42"} 1 'to tilt state, is associated with the expressions β88 and XSW when the system according to clutter examined and the bit with the output of the aND gate 342 is a "yes" if the second lowest value of the three bit counter 55, the System Clutter searches and the bit with the highest is to be toggled into binary "1". The remaining part of the valency of the three-bit counter in the "yes" - or that of the in Fig. 13 is used to control the binary "1" state to be toggled. If that uses the tilting of the flip-flop F ₄₂ when the system is looking for the clutter end, the tilt system will look for the pen of the flip-flop F ₄₃ through the other end of the clutter in accordance with the table of FIG. 5. The circuit includes AND gates shown controlled by AND gates 301, 302 and 303 and an OR gate 304, 351 and 352 together with an OR gate 353 which _{generate the expression F 2} , while the expression produces the expression Generate H ₃ , while the last off-G ₂ of AND gates 305, 306 and 307 and a pressure I ₃ through an OR gate 354 and an AND-OR gate 308 is generated. Both expressions F ₂ gate 355 is generated. The expressions H ₃ and I ₃ and G ₂ are linked by an OR gate 311, which is linked via an OR gate 357, whose output is linked to an AND gate 312 output by an AND gate 358 with the output the signals-ß88 and T82Ö is linked. The press SS88 and X 820 is associated. The outputs of the AND gates 296 and 312 are one of the AND gates 342 and 358 are through an ODl-R-

Gates 360 linked, the output of which is a "yes" in each of the two operating modes of the system if the flip-flop F _{43 is} to be toggled into the "yes" state or the binary "1" state, i.e. regardless of whether that System clutter or the end of the clutter is looking for.

From the foregoing description, there is provided, in accordance with the teachings of the present invention, a system for detecting or determining the presence of clutter in any of a variety of distance ranges from which video signals are received as an echo of each transmitted radar pulse. This goal is achieved in that each distance area is assigned an arithmetic word which has several counting bits, the status of which is changed as a function of the received hit pattern of the respective distance area and of the hits in adjacent distance areas of each video run. The "history" of the hit pattern is recorded for each distance range and the neighboring distance ranges in order to determine the presence of clutter there as a function of certain criteria for the presence of clutter. Once clutter has been determined, the system prevents any location object in the corresponding distance range from being interpolated or further processed like a real location object. In addition, once the clutter has been determined, the system is switched to a working method for determining the end of the clutter, in which the "history" of the hit patterns assigned to the respective distance ranges is again monitored. A sufficient number of video sweeps must be received that do not contain clutter-indicative hit patterns from the range of interest before a clutter-end signal is generated which will re-enable the system to use target data from the range of interest and further to look for clutter again.

Claims (5)

Claims: 45 1.Data-processing device for radar systems that responds to the video signals supplied by the radar system for each range scan and processes these video signals into successive video quanta that are characteristic of the presence (hit) or absence of an echo in one of successive distance intervals in the range, with a shift register for the continuous storage of a predetermined number of successive video quanta, a logic arrangement coupled to the shift register which generates signals characteristic of the number of hits contained in the shift register, and a memory connected to the logic arrangement in which the same distance interval but several successive ones be combined range samples associated output signals of the logic array and processed into a control signal for a gate circuit, the characteristic of the presence of a target Signals are supplied, for the purpose of he identification of poor reception ( "clutter"), characterized in that the memory (75) comprises a multi-digit memory location for each distance interval at which a one for the content of the shift register (59) during preceding range samples in the time associated with the distance interval is stored, so that the logic arrangement (55, 60) generates characteristic code numbers for the number and the arrangement of the hits contained in the shift register (50) and the code number associated with a certain distance interval is dependent on the values, two parameters, namely the content of the shift register (50) and the state of the most significant bit of the binary number contained in the memory (75), added to this binary number when certain combinations of these parameters are present and subtracted from this binary number when other combinations of these parameters are present, and that from the most digit bit of this binary number the control signal for the gate circuit (80) is derived. 2. Apparatus according to claim 1, characterized in that the logic arrangement (55, 60) contains means for increasing the count of the n-1 bits of the lower digits of the binary numbers containing η bits in the memory (75) when the hit pattern in the shift register (50) contains hits in X or more successive distance ranges and at the same time the most significant bit of the binary number is in a first binary state, which indicates the absence of interference areas that the extent of the increase in the count of the n-1 bits directly from the Number of hits depends that further means are provided to reduce the count if hits are present in less than X successive distance ranges, and that the logic arrangement (55, 60) also has means to the n-1 bits in the first binary state and the most significant bit in a second state indicating the presence of interference areas when the counter reading is in the «-1 Bits reached a limit. 3. Apparatus according to claim 2, characterized in that the logic arrangement (55, 60) contains a devices which respond to the second binary state of the most significant bit indicating the presence of interference areas, so that the count of the n-1 bits of the respective binary number is increased if there are hits in less than X adjacent distance ranges, or is decreased if hit patterns are detected from hits in X or more adjacent distance ranges, and that the logic arrangement (55, 60) comprises further means which the most significant bit Return to the first binary position indicating the absence of interference areas when the n-1 bit part of the binary number has reached the full count. 4. Apparatus according to claim 2 or 3, characterized in that the limit number is a function of X and of the count of the n-1 bits . 5. Device according to one of claims 2 to 4, characterized in that the values η = 4 and'A "= 3 and the logic arrangement (55, 60) Contains means to increase the count by 1, 2, 3, 4 or S if the number is consecutive Hit equals 3 or 4, 5, 6 or 7, and to decrease the count by 1, if the number of hits is equal to or less than 2. For this purpose 4 sheets of drawings