DE1441676C - Frequency multiplier using a quadrupole having a non-linear reactance - Google Patents

Description

"V = Y ₂₁ Yl2_ ~ v ~
Λ

with the input and output current Z ₁ and / “and the input and output voltage K ₁ and V _n as well as the conductance _{factors Y 11} , Υγι> ^ 21 ^and Y22 or for a resistor matrix

V
Vn = Z _n Z ₁₂
■ Z21 Z ₂₂ "λ"

is dimensioned with the resistance factors Z _n , Z ₁₂ , Z ₂₁ and Z ₂₂ so that Y ₁₂ and Z ₁₂ = O and Y ₂₁ and Z ₂₁ φ O are.

2. Frequency multiplier according to claim 1, in which the quadrupole consists of a nonlinear reactance, a nonlinear resistance and a phase delay line or an element equivalent to it, characterized in that the phase delay line (Νγ) is either in series or in parallel with the combination of the nonlinear Reactance (CN) and the non-linear resistance (RN) is connected and that the phase delay line is dimensioned in the sense of a reaction-free transmission of the quadrupole for an equivalent electrical length that defines a suitable mutual phase between the voltages at the non-linear reactance and the non-linear resistance.

3. Frequency multiplier according to claim 2, in which the quadrupole consists of a non-linear reactance, a non-linear resistor and a phase delay line or an equivalent thereof Element consists, characterized in that the

Phase delay line [N γ) is connected in series with the nonlinear resistance (RN) of the nonlinear reactance (CN) and that the phase delay TV - ^ - of the phase delay line in terms of the frequency multiplication factor η of the relationship

(I - _n ). N j- = (4a +3) - ^
for a = integer, suffices.

65

4. Frequency multiplier according to claim 2, wherein the quadrupole consists of a nonlinear reactance, a nonlinear resistor and a phase delay line or an element equivalent to it, characterized in that the phase delay line [N ~ \ the nonlinear reactance (CN) and the nonlinear Resistance (RN) connected in series with one another

and that the phase delay N γ of the phase delay line in terms of the frequency multiplication factor η of the relationship

for a = integer, suffices.

5. Frequency multiplier according to claim 2, characterized in that the phase delay line is realized by a series reactance circuit, the combination of the nonlinear reactance (CN) and the nonlinear resistance (RN) connected in parallel and for a harmonic (interharmonics) of the frequency / fundamental is dimensioned, which is below the harmonic having the desired frequency multiplication with the frequency (nf) .

6. Frequency multiplier according to claim 1, characterized in that the quadrupole is a single one having nonlinear capacitance diode (CTV), which thereby simultaneously acts as a nonlinear reactance and effective as a non-linear resistance is that it is not due to the fundamental oscillation that controls it exclusively in the stop band, but also slightly in the pass band is controlled.

7. Frequency multiplier according to claim 6, characterized in that the capacitance diode (CN) has a specific capacitance or a specific resistance connected in parallel with a corresponding value or the capacitance diode is connected in series with a specific capacitance with a corresponding value.

8. Frequency multiplier according to claim 6, characterized in that the capacitance diode (CN) is connected in parallel with a resonance circuit (C2 / L2) dimensioned for an interharmonics, which as a phase delay line with the equivalent electrical length, which is the appropriate mutual phase between the voltages at the non-linear capacitance and non-linear resistance is used.

The invention relates to a frequency multiplier using a quadrupole having a non-linear reactance, to which the input side is supplied with the frequency / frequency to be multiplied by an integer factor η and at the output side the harmonic oscillation with the frequency nf is taken from the fundamental.

Frequency multipliers of this type, in which the non-linear reactance is a capacitance diode, have

1 44 i O / Ö

on the one hand a good efficiency, on the other hand the disadvantage that the undesirable effects that occur here Reaction of the output circuit on the input circuit of the quadrupole risk of instability conditional. For example, if the load in the output circuit fluctuates and, as a result, the ripple is increased, the reflected waves in the output circuit are returned to the input circuit. The waviness on the input side then also fluctuates greatly. This can have the consequence that the Frequency multiplier performs parametric oscillations or at least disruptive amplification properties shows, which make the operation of the semiconductor excitation circuit unstable.

The invention is based on the object of that described in the introduction for a frequency multiplier Kind of a simple solution for practically complete suppression of the influence of the output circuit to be indicated on the input circle.

This object is achieved according to the invention in that the four-poly for non-reactive transmission in addition to the non-linear reactance, a non-linear resistance with at least one non-linear resistance component and optionally comprises a phase delay line or its equivalent element and that the quadrupole for one Conductivity matrix

with regard to the conductance factor F ₁₂ = 0 and with regard to the conductance factor Y ₂₁ φ must be 0.

This condition cannot be met if the quadrupole merely has either a non-linear reactance or contains a non-linear resistance.

In FIG. 1 b, a frequency multiplication circuit consisting of the long-known non-linear capacitance CN, for example a non-linear capacitance diode, is indicated. The AC input voltage having the frequency /, the source of which has the internal resistance Rg , is fed to the capacitance diode via the filter BPF (/) which is only permeable for the frequency /. The harmonic of the fundamental oscillation with the frequency nf generated at the non-linear capacitance diode CN is output to the consumer RL via the filter BPF (nf). X (f) and X (nf) each represent the setting element of the resonance circuit for the fundamental oscillation on the input side and the harmonics on the output side.

If now the conversion matrix with regard to the non-linear capacitance of the varactor is calculated, applies to the current-voltage line formed by the non-linear capacitance '

^dV

Y21

Y22

V ₁ V _n

de

C (V ₁ + V ₂ ) = C (V ₁ ) + -j-jj- (V ₁ ) V ₂ + ...

V _n = Zn ■ Z12
21 line ₂₂ In

If here the simplification by

Uv ₁ Av ₁

~ dt '~ df ^<1

is carried out, is calculated

If the voltage acting on the capacitance is measured as V = V ₁ + v ₂ (V ₁ : voltage for the fundamental frequency, V ₂ : voltage for the harmonic), where V ₁ > v ₂ , then

with the input and output current Z ₁ and / "and the input and output voltage V ₁ and V _n as well as the conductance factors Y ₁₁ , Y ₁₂ , Y ₂₁ and Y ₂₂ or

for a resistor matrix,,,

de, _s de, _w dv

is dimensioned with the resistance factors Z ₁₁ , Z ₁₂ , Z ₂₁ and Z ₂₂ so that Y ₁₂ or Z ₁₂ = 0 and Y ₂₁ or Z ₂₁ φ 0.

The invention is based on the knowledge that in the case of a frequency multiplier, in the case of the frequency multiplier either only a non-linear reactance or only a non-linear resistance is used do not prevent the output circuit from affecting the input circuit of the frequency converter leaves. The following explanations serve to prove this fact.

In FIG. 1 a, a quadrupole representing a frequency multiplier is indicated with a non-linear reactance, the input terminals 1 of which draw the fundamental oscillation to be multiplied in its frequency. leads and at the output terminals 2 the desired harmonic of the fundamental oscillation with the frequency nf can be picked up. If such a frequency multiplier is to have an output circuit that does not have any reaction to the input circuit, it is necessary, for example, that the conductance matrix describing this quadrupole is used

If it is assumed that

- ^{J <ut}

(y "= y_ _n : developed (Fourier coefficient)

ι =

Jn = > n Yu
Jn Y22 > i ~

if, furthermore, V ₁ = V ₁ , where V _{1 is} the voltage of the fundamental frequency and F ₁ * is the conjugate complex voltage, if, in addition, the representation

is found for the current of the η-th harmonic from the formula (I) ', then results

V _k . (2)

Φ _κ is the phase angle of the higher harmonic with ordinal number k.

If the voltage to be applied to the nonlinear capacitance is regarded as only the voltage V ₁ for the fundamental frequency and the voltage V _n for the nth harmonic, the current Z ₁ for the fundamental frequency and the current / for the nth Harmonics expressed by the following formula when V _k is dimensioned in such a way that the maximum conversion efficiency is achieved and the representation of the matrix is carried out:

15th

20th

Vo - V2

Vn-I -

- Y2n)

V ₁

(3)

When the frequency is multiplied by the non-linear resistor, it is sufficient if consideration is given to replacing CN in FIG. 1 with the non-linear resistor. The calculation of the conversion admittance matrix results in:

30th

σ _π _! —Α _η

σ ₀ - 02η

■ (4)

35

This equation gives the process of multiplying the nonlinear resistance. She derives how follows. The relationship between the voltage and the current for the nonlinear resistor becomes like this receive:

40

45

This equation can be expanded as follows in the same way as for the capacitance [Formula (I)] will:

di
-

This can be in case
G (V ₁ ) = G ₀

dG

-V ₂

55

σ _η β

jni.it

(σ _η is the developed Fourier coefficient here) and by inserting the quantities ^ ₁ , v ₂ and i defined in equation (1), the following relationship can be obtained:

J _n = - G ₀ [>"_ ι - σ _η + J V ₁

60 If only V ₁ and V _n can be present and the phase angle <t> _k = - ^ - is chosen around the

To get maximum gain for the frequency conversion, the matrix gets the one given above at (4) Shape.

As can be seen from formula (3), you cannot do this at the same time

³ O > U _n -J

it = - χ L

-ι -7π + ι) ⁼ 0 and y ω C ₀ (>",, _ χ -7" + ι) τ ^ O

according to the condition Y ₁₂ = O and Y ₂₁ φ O are met. Accordingly, even with such a frequency multiplier, it is not possible to decouple the output circuit from the input circuit.

In a first preferred embodiment of the invention, in which the quadrupole from a nonlinear reactance, a nonlinear resistance and a phase delay line, respectively its equivalent element, the phase delay line is either in series or in parallel switched to .the union of nonlinear reactance and nonlinear resistance. Here is the Phase delay line in the sense of a reaction-free transmission of the quadrupole for one equivalent electrical defining suitable mutual phase between the voltage across the nonlinear reactance and across the nonlinear resistance Measured length.

In various applications, the phase delay line can expediently be implemented by a series resonance circuit that is connected in parallel to the combination of nonlinear reactance and nonlinear resistance and is dimensioned for a harmonic (interharmonics) of the frequency / fundamental that is below the harmonic with the frequency having the desired frequency multiplication nf lies.

In a second preferred embodiment of the subject matter of the invention, the quadrupole has a single one nonlinear capacitance, which thereby simultaneously acts as a nonlinear reactance and as a nonlinear resistance What is effective is that, through the fundamental oscillation that controls it, it is not exclusively in the stop range, but is also slightly controlled in the pass band. At this In the preferred second embodiment, the varactor diode can have a specific capacitance or a specific one Resistance with the corresponding value connected in parallel or the capacitance diode a specific one Capacitance with the corresponding value must be connected in series.

It can also be advantageous for the capacitance diode to be dimensioned for an interharmonics To connect the resonance circuit in parallel, acting as the phase delay line with the equivalent electrical Length that is the appropriate mutual phase between the voltages across the nonlinear capacitance and the non-linear resistance is used.

In the following, the invention will be based on the exemplary embodiments shown in the drawing will be explained in more detail. In the drawing mean

Fig. La, Ib schematic representations of one of a known frequency multiplier making use of non-linear capacitance,

F i g. 2 and 3 the schematic representation of a frequency multiplier according to the invention,

O / U

F i g. 4 and 5 basic circuit diagrams of two exemplary embodiments according to the invention,

F i g. 6 shows the basic circuit diagram of a further embodiment according to the invention,

F i g. 7 shows a diagram of the mode of operation of the arrangement according to FIG. 6,

F i g. 8 and 9 basic circuit diagrams of a further embodiment according to the invention,

Fig. 10 is a comparison diagram for the efficiency the various embodiments according to the invention,

11 is a circuit diagram of a further embodiment according to the invention,

12 shows a further diagram for the directional dependency of the transmission properties of a Embodiment according to the invention.

F i g. 2 shows a frequency multiplier which makes use of the parallel connection of the non-linear capacitance CN and the non-linear resistance RN, as is the basis of the invention. In this figure, the resonance circuit for the fundamental frequency and the harmonics as well as the supply source for the fundamental frequency and the consumer are omitted. The fundamental oscillation of the frequency / supplied via input terminals 1 becomes

ίο the "th harmonic of the frequency" / derived and taken from output terminals 2. Here, F (f) and F (nf) are filters that represent a short circuit for the frequencies other than the desired frequencies / and /. Since the admittance matrix represents the mixture of admittance in the formulas (3) and (4), it follows

J ₁ - J ₂ I Yl2_ V ₁
V _n

Q (ro - Yi)

jo> C ₀ (y "_ _l -

(σ _π _

G ₀ (o " _! - o"'

jnmC ₀ (y ₀ - y _2n ) + G ₀ (o ₀ - σ _2η )

If, in view of the fact that in FIG. 3 series connection shown

i = JGdv _G = C ^, the impedance matrix, which represents the voltage through the current, is found, results

V ₁
V _n = _{21 line 22} H
Y _n

Z ₁₁ , Z ₁₂ , Z ₂₁ , Z ₂₂ are calculated as formula (7) as follows:

7 _ ι jna> C ₀ (y ₀ - γ _2η )

Z ₁₁₁ -

Z ₁ , =

C ² o (yo - y _2n ) (yQ - Πω ² (O _n - ^ o _{n + 1} ? - Y ₂ )
I. Gq (o ₀ - o _2n ) (o ₀ - O ₂ ) - (^ ₁ -O _{n + 1} ) ² ■ Yn _{+ 1} ) Γ -G ₀ (O _n ^ . - ^ _{n + 1} ) Cq (yo - Y _2n ) (Yo G ₀ (o ₀ - <τ _2π ) (σ ₀ - O ₂ ) - Gl Cl (Y ₀ -Y _2n ) (Yo - πω ² yes> C ₀ (y _n - ₁ - Gl ^σ " ⁺ -72) '" ² Co (7n-l - y _n + l) ² - -72) G ₀ ι ■ η "

G \ (o ₀ -O _2n ) (O ₀ - G ₂ ) ~ (o _n _ _t -G _{n + 1} ) ²

309 632/99

ίο

Z ₂₂ =

wC ₀ (y ₀ -γ ₂ )

<» ² Cl (>'" _! - γ _η + ι) ² - η W ² CKy ₀ - γ _2η ) (νο - Vi)

₀ (ff ₀ -σ _2π ) (σ ₀ - O ₂ ) - ^ - (α _η - _χ ~ ^c n

If in the circuit NL ₁ of Fig. 4, in which the in F i g. _{2 circuit JVL 1} shown in dotted lines to achieve the directional dependency, which is the main content of the invention, that is, when the non-linear capacitance and the non-linear resistance are connected in parallel, the conditions for the directional dependence _{are found, results from the condition .Y 12} = 0

the relationship

cos (n - 1) (mi - Njj = sin (n

occurrence. Therefore must
(1 ") N [4a + 3]

1) ωί

Vn-I

(8th)

If the expression enclosed in parentheses in formula (8) is a positive real number, G ₀ CT _n -J must have the character -j . Thus, if C (V _C ), G (Vq) each with

V _c = ν _Λ + v _c and V ₀ = V ₀₀ + v _G

(v = alternating current component) are excited, it is taken into account that the phase relationship between v _c and v _G fulfills the conditions for the directional dependence, in that the delay line as in FIG. 4, the nonlinear resistance circuit is turned on.
Since here

C = C _n

= Q [y ₀ H- 2 y _x cos ωί + 2 γ ₂ cos 2 cot + ] (9)

(α = integer), from which the relationship between the multiplication number η and the delay line N ~ giving the directional dependency is found, as can be seen from Table 1 below. Here this relationship also fulfills Y ₂₁ φ 0.

Then, as in JVL ' ₂ of FIG. 5, the conditions for the directional dependency found in the series connection of CN and RN, in which the circuit JVL ₂ shown in dotted lines in FIG. 3 is rearranged in such a way that the directional dependency, which is the main content of the invention, is given. In view of the fact that v _G actually leads v _c in phase by - ^ -, the delay line ΛΓ -5- is achieved when multiplying by any arbitrary factor

the directional dependency switched on as in FIG. 5 is shown. This applies when the phase is on the capacity is based on formula (9)

G = G _n

G = G _n

jn (, »f-N§)

45 =

= G ₀ Ct ₀ + 2Ct ₁ COS ^ wt -Nj

+ Ia ₂ (Iw - Nπ) + "J

+ .2Ct ₁ COS | ωί + (1 - N) -J

(12)

+ 2ct ₂ cos {2ωί + (1 - N) π} Η

(10)

50 In order to fulfill the conditions for directional dependence, formula (7) shows that if is, then Z ₁₂ = O must be set here for blocking in the reverse direction.

jGl4 (i- ^a A (1 -MI (^) ² (1 -fs *!) ² 12i = i Λ -Ζ-Λ

C ₀₇₀ \ n (l - ») (l - ^) - (^ Y (l -

L \ VoJ V VoJ \ VO J V

Vn-

l -

If the expressions enclosed in parentheses are 60 Accordingly, the relationship between η and N express the right-hand side all a positive real number
, G ₀ CT _n -! the sign of j . For one
Blocking in reverse direction must (n - 1) (1 - N) - = (4a + 1) -. (15)

cos (h - 1)

-N) -J- = -sin (h-1) wt (14)

65

If the results of formulas (11) and (15) are summarized, results in Table 1.

If in this way the conditions for the direction dependency

ι ο / ο

Y ₁₂ φ O or Z ₁₂ φ 0 and Y _;

21

= 0 or Z ₂₁ = 0

are met, the power from the input is only transferred to the output, and the reflected wave from the output to the input is absorbed by the adjustable resistor so that it does not occur on the input side. This enabled him to go out. the Semiconductor circuit existing frequency multipliers,

which was previously unstable, ι Π Kf) Stabilized in one fell swoop η Kf) will. 2 1 2 0 3 0.5 3 0.5 Parallel connection 4th V ₃ ; 3 Series connection 4th V ₃ ; 2 5 V ₄ 5 ³ U 6th 1 6th 0

The table shows how the non-linear capacitance CN and the non-linear resistance RN should be combined to achieve the directional dependency, that is, how the line length of the phase delay line to be switched on should be selected to maintain the mutual phase of both elements. In the table it is shown that when CN and RN are connected in series, the line length of the phase delay line can be zero if it is the frequency doubling and the frequency sixfold. In both of these cases, the phase relationship between CN and RN can be kept so that the directional dependency is given without switching on the delay line. This is due to the fact that in the series connection, the voltage which excites the non-linear capacitance CN , around the phase

- ■ is delayed against the voltage that the

excites non-linear resistance RiV.

With this in mind, the direction-dependent frequency multiplier can also be designed in a simple manner using only one diode with a non-linear capacitance or, if necessary, by adding a simple .RC element. In Fig. 6 shows the equivalent circuit for the above principle, with FIG. 6a showing the non-linear capacitance diode, FIG. 6b the equivalent circuit for it and FIG. 6c the equivalent circuit in the event that the current excitation of this diode converts the resistance component parallel to the non-linear capacitance part into the series resistance component. Here RS is the series component of the non-linear capacitance diode, X the reactance component, that is the capacitance component, and R the non-linear resistance component parallel to X.

When R » X , the equivalent circuit of the nonlinear varactor diode is shown as shown in FIG. 6 c can be seen. It is

7 -

X ² - R

Forward voltage is applied to the above nonlinear capacitance diode and the latter is excited, this diode exhibits the nonlinear resistance and the nonlinear conductance together with the nonlinear capacitance. This corresponds to the series connection of the non-linear capacitance and the non-linear resistance according to FIG. 3, so that the direction-dependent frequency multiplier can be implemented. F i g. 7 shows this state. In order to conduct a current i _p in the forward direction, without a specially set DC bias voltage, by increasing its amplitude, the exciting voltage wave V _e increases the diode in the forward direction with a portion V _p , whereby the current i _p flows. This results in the resistance component or the conductance component as a mean value over the period. Here, G _{1 means} the component of the main wave of i _p . It is therefore sufficient if the non-linear capacitance diode and the excitation voltage are chosen so that this average conductance _{fulfills the condition of the formula (7) Z 12} = 0. However, since the non-linear characteristic in this case is determined by the diode to be used, only the frequency that fulfills the directional dependence is limited and cannot be used for all frequencies. In that, as shown in FIG. 8 a and 8 b, a certain capacitance of the non-linear capacitance diode is connected in parallel or in series, the 2nd term of the formula (7) is changed for Z ₁₂ , whereby the adaptation to all frequencies can be achieved. Also because a certain resistance, as shown in FIG. 9 is shown, the non-linear capacitance diode is connected in parallel, the 2nd term of the formula (7) for Z ₁₂ can be regulated as desired, whereby Z ₁₂ = 0 can be fulfilled over all frequencies.

If in such cases the circuit JVL shown in dotted lines is replaced by NL ₁ or NL ₂ in FIG. 2 or 3 is replaced, as can be seen, the directional frequency multiplier can be implemented. From the fact that the frequency doubling and the frequency sixfold in the series connection can be carried out by such simple non-linear capacitance diodes, it is shown that the non-linear capacitance and the non-linear resistance by

the around

(16) • y phase shifted span

In that the running angle is chosen to be suitable for the current in the forward direction, i. i.e., by a low can be stimulated.

If the conversion efficiency in the above various embodiments with the same the usual frequency multiplier, which consists only of the previous capacitance diode and the Conditions for the direction dependency are not met, the result is in the Fig. 10 reached.

In FIG. 10, the conversion gain is plotted on the ordinate and the Q of the nonlinear part of the circuit is plotted on the abscissa on a logarithmic scale. Here, the dash-dotted line represents the characteristic of the previous frequency multiplier and the solid line represents the same in the exemplary embodiment according to the invention.

As can be seen from FIG. 10, the frequency multiplier according to the invention a significantly larger conversion gain compared to a previous frequency multiplier.

To increase the conversion efficiency

increase, with the higher frequency multiplication it is common to use an idler circuit. For example, in frequency multiplication, the load-independent interharmonics becomes of twice the input frequency and a series resonant circuit for this 2nd harmonic connected in parallel to the non-linear element, so that, after previously converting to the 2nd harmonic is carried out, the conversion to the 4th harmonic is carried out.

Because such an idler circuit is also provided in the delay line according to the invention, a very advantageous circuit construction can be achieved. The F i g. 11 shows an embodiment in which this idler circuit is provided. This is an example in which a nonlinear varactor diode CN is used. The series resonant circuit consisting of C ₂ and L ₂ represents the idler circuit. FIGS. 11b and 11c show the equivalent circuit for FIG. 11a.

If z. B. is used with the quadrupling of the idler circuit in resonance with the 2nd harmonic of the fundamental wave, this idler circuit is capacitive for the fundamental wave and inductive for the 4th harmonic, so that a delay line with the condition N = -y with the quadrupling im Case of series connection according to Table 1 can be met. The idler circuit itself can namely also be operated as a delay line. Such an idler circuit therefore only fulfills theirs

/ U

actual purpose, that is to increase the conversion profit, but also enables the operation of ai Delay line. When quadrupling, i. in this case no special delay line e: conducive. In FIG. 12 is the change in the state of adaptation seen from the input side unmatched state of the output circuit, ge shows, in the exemplary embodiment the input frequency to 540 MHz the starting frequency zi

ίο 2160 MHz are selected. The capacity of the diode is about 6 pF at the working point.

From Fig. 12 it follows that, even if the ripple of the output impedance and thus the output power P _a changes, the ripple de:

Input impedance (ordinate value) remains almost constant (see curve α with values from 1.25 to 1.7). It is; thus there is practically no coupling between output and input and practically complete directional dependence is achieved.

In the explanation of the above embodiment, the network is composed of the nonlinear one Capacitance and the non-linear resistance.

Even if a non-linear inductance is used in place of a non-linear capacitance, i. E.

So if, in general, the network is formed from a nonlinear reactance and a nonlinear resistance, the directional frequency multiplier can be realized in that a corresponding phase delay line is provided so that the condition for the directional dependence, e.g. B. Y _n = 0, can be met.

For this purpose 2 sheets of drawings

Claims (1)

i 441 claims: 1. Frequency multiplier using a quadrupole having a non-linear reactance, to which the input side is supplied with the fundamental oscillation to be multiplied by an integer factor of 71 and on the output side the oscillation harmonic to the fundamental oscillation with the frequency nf is removed, characterized in that the quadrupole for reaction-free Transmission besides the non-linear reactance (CN) comprises a non-linear resistance (RN) with at least one non-linear resistance component and optionally a phase delay line or an element equivalent to it and that the quadrupole for a conductance matrix