DE1155816B - Circuit arrangement for switching current pulses through to a ferrite core memory - Google Patents

Description

The invention relates to a circuit arrangement for switching through a read pulse current source in one polarity and a write pulse current source in the opposite polarity to the Call wires of a ferrite core memory. Both pulse current sources to be switched through have the same Polarity.

Switching arrangements have already become known, where two pulse current sources of the same polarity have a common electronic Switch can be connected to two oppositely polarized windings of a transformer, so that at the Secondary winding current pulses of opposite polarity can be picked up.

However, if the number of call wires to be selected is very large, the edge steepness is good Current impulses are very difficult to achieve. This is because the circuit is a selected one Call wire, the residual impedances of all unselected circuits of the other call wires in parallel lie. These impedances consist of the series circuit for each unselected call wire the winding inductances with the capacitances between the primary windings and the secondary winding, because one pole of the secondary winding is advantageously connected to ground. The winding capacities are usually very high because the transformers have to be wrapped with very little scatter. These residual impedances now represent series resonant circuits that all of them have to be fed by the pulse current source and this results in a very poor rise behavior cause impulses in the selected call wire.

It is the object of the present invention to obtain a through-connection arrangement in which also in many polling wires to be switched on, a perfect rise behavior of the current impulses is achieved will.

The general idea is to put the two decoupling diodes between the lines to switch the pulse current sources and the winding ends of the primary windings and when the Bias switches in the reverse direction from a voltage source so far that they are removed from the primary windings occurring peak voltages can not be controlled.

In an advantageous embodiment of the invention, the voltage source is connected via a series resistor at the interconnected first winding ends of the primary windings and becomes over the second two winding ends of the primary windings of the two decoupling diodes, which with Circuit arrangement for switching through

of current pulses
to a ferrite core memory

Applicant:

Standard electrical system Lorenz Aktiengesellschaft, Stuttgart-Zuffenhausen,

Hellmuth-Hirth-Str. 42

Dipl.-Ing. Arndt Ionisch, Stuttgart-Zuffenhausen,
has been named as the inventor

the two pulse current sources are connected, supplied.

It is therefore possible, with an additional effort of only one resistor per switch, to prevent the damaging To make residual impedances harmless and thus the pulse shape of the connected pulses to improve significantly.

With reference to FIGS. 1 and 2, the subject matter of the invention will now be explained in more detail, for example. It shows

Fig. 1 shows a known circuit arrangement for switching through current pulses and

2 shows the circuit arrangement according to the invention for switching through current pulses.

Fig. 1 shows a known circuit arrangement with η switches, one of which is switched through. Let the switch S ^{1 of} the through switch DS 2 be closed, for example. The write current pulses i _w or read current pulses i _T impressed by a pulse current source are switched through via the primary windings Wl or W 2 and the decoupling diodes D1 or D 2 and via the closed switch S to the zero line. The two primary windings have opposite winding directions, and so in the secondary winding, depending on which of the two primary windings is charged, pulses of opposite polarity are induced and the corresponding load (the call wire A) is fed.

In parallel to these connected circuits, however, there are still the residual impedances of the remaining non-connected circuits DS1, DSn. These

309 728/235

Residual impedances for each circuit consist of a series connection of the winding inductance of the transformer and the winding capacitance between the primary windings (eg Wl and Wl) and the secondary winding W 3, which is connected to zero. The winding capacities of the transformers are relatively high because the leakage inductance must be kept low by a special winding structure.

This series connection of transformer inductances and winding capacities results in a series resonant circuit for each circuit, which branches off a certain proportion of the impressed write or read current pulses. If the number η of the call wires to be switched through is very high, the (n- 1) parallel series resonant circuits have a detrimental effect on the rising edge of the switched current pulse and also cause unwanted transient processes. In the case of very fast memories, the required edge steepness is so high that it can no longer be achieved with the switching arrangements known up to now.

FIG. 2 now shows the circuit arrangement according to the invention in which the disruptive influence of the residual impedances circuits that have not been selected are rendered ineffective.

This is achieved by laying the diodes Dl and D 2 between the current pulse lines and the connections of the primary windings facing away from the switch and by biasing the point of the primary windings that is now common to the switch via the resistors R from the DC voltage source - U The diodes of the circuits that are not to be switched through are biased into the restricted area so that the peak pulse voltage occurring on the respective pulse line and dropping across the primary winding of the switched circuit cannot open the diodes. The diodes also have a blocking capacitance of a certain size, but this is considerably smaller than the winding capacitance of the transformers.

Because the diodes of the unselected circuits are blocked as long as the associated switch S is open, the pulse current source to be switched through is not loaded by the residual impedances. The bias of the diodes is ineffective when the switch S of a selected through switch DSl ... DSn is closed.

Claims (2)

Patent claims: 1.Circuit arrangement for switching through current pulses of opposite polarity to one of several call wires of a ferrite core memory, in which a read pulse current queue and a write pulse current source, both of which have the same polarity, for each call wire via two decoupling diodes and an electronic switch to one of two each other oppositely polarized primary windings of a transformer, the secondary winding of which feeds the respectively assigned and to be selected call wire, can be switched on, characterized in that the two decoupling diodes (Dl and D 2) between the lines of the pulse current sources (i _w , i _r ) and the winding ends of the primary windings (Wl, W2) are switched and, with the switch (S) open, are biased in the reverse direction by a voltage source (- U) to such an extent that they cannot be opened by the peak voltages occurring at the primary windings. 2. Circuit arrangement according to claim 1, characterized in that the voltage of the voltage source (-U) is applied via a series resistor (R) to the interconnected first winding ends of the primary windings (Wl and W 2) and the two via the second two winding ends of the primary windings Decoupling diodes (Dl and D 2) which are connected to the two pulse current sources (i _w and i _r ) is supplied. 1 sheet of drawings © 309 728/235 10.63