DE10333995B4 - Method for etching a semiconductor material - Google Patents

Abstract

Method for etching a semiconductor material (1), in which structures defined in the semiconductor material (1) are etched with an etching profile (6c, 7d) extending into the etching depth and having a recess (9), wherein an upper region (3c, 3d ) and a lower region (4c, 4d) of the semiconductor material (1) are formed with different undercuts, wherein formed between an upper portion (9.1) of the recess (9) and a lower portion (9.2) of the recess (9) a jump-like transition characterized in that a plurality of gas etching steps are performed, wherein process parameters (T, P, p) are varied during the etching operation between the gas etch steps such that the etch profile (6c, 7c, 6d, 7d) is changed with the etch depth, wherein at least one Process parameter (T, P, p) is changed stepwise and following a first etching step with greater undercutting a second etching step with smaller undercutting follows, so that in e First etching step, the upper portion (9.1) of the recess (9) is formed wider than the formed in the second etching step lower portion (9.2) of the recess (9).

Description

The invention relates to a method for etching a semiconductor material.

Etching methods can be used to etch structures defined in semiconductor materials, in particular silicon substrates, such as trenches, combs, tongues, bending beams and more complex structures suitable for microsensors. The structures to be etched are usually formed by etching masks applied to a substrate via so-called masking layers, e.g. a photoresist layer, defined.

To form more complex structures, especially bridges and lands, anisotropic etching techniques are required. The DE 42 41 045 C 1 shows such an anisotropic etching method, with which a strongly anisotropic etching can be achieved in silicon structures with high selectivity of the etched material. In this case, alternating successive etching and polymerization steps are used. During the polymerization steps, passivation of the side edges of the etched structures is achieved by supplying a polymer or polymer former, which is substantially removed during the subsequent etching step only on the etch base, but not on the sidewalls.

The US Pat. No. 6,284,148 B1 describes an etching process in which parameters are changed during the process time by a parameter ramping. As a result, an etching profile with a defined undercut or edge loss, for example, with a constant profile slope, are generated.

US 2002/0 011 759 A1 describes an electrostatic actuator for microelectromechanical systems and a production method thereof. In this case, an insulating trench is etched by deep reactive ion etching in a substrate such that an etching profile is achieved in which the trench widens downwards.

In the EP 0908936 A2 and US Pat. No. 6,544,838 B2 the production of trenches in a substrate is described with a bottle-like cross section, which initially taper from the top edge and subsequently widened like a bottle and rejuvenate.

EP 0822 584 A2 describes methods of treating surfaces of semiconducting substrates, including a down-tapering profile. The DE 3752259 T2 describes a bromine etch process in silicon that etches vertical profile trenches, downwardly tapering V-profiles or bulges.

The JP 2001 - 507 289 A describes a method of manufacturing a suspended semiconductor element prepared by dry etching. In this case, an unmasked region is etched vertically except for a stop layer, in the vicinity of which a quasi-isotropic lateral etching takes place, which leads to an undercut of a subregion.

US 2002/0177250 A1 describes a semiconductor laser consisting of a plurality of material layers, wherein materials are selected which have different removal rates, so that upper material layers are deep etched and lower material layers are etched laterally for this purpose.

US 2003/0 052 088 A1 describes a method which makes it possible to increase a capacitance density of capacitors. For this purpose, two etching processes are carried out alternately, so that a larger etched surface is created by creating depressions.

Disclosure of the invention

According to the invention, a method according to claim 1 is provided.

In particular, the method according to the invention has the advantage that a high variation of the etching profile with the etching depth can be achieved. In particular, variations in the undercutting, wall roughness, profile slope and the etching speed can be achieved here. It is achieved at the upper edge of the etch profile increased undercutting against lower areas, whereby a recess of the profile is achieved.

According to the invention, e.g. one or more of the following variables can be varied as process parameters: etch cycle time, coupled power, acceleration voltage of ions, acceleration current of ions, process pressure, concentrations of gas components of the etching gas.

Unlike in the US Pat. No. 6,284,148 B1 in which a constant profile slope is set, changes in the etching profile are achieved by the changes in the process parameters. The process parameters are changed stepwise by means of two etching steps carried out sequentially separately or by an intermediate step.

By varying the etching profile over the etching depth, the mechanical and / or electrical properties of the structures can be changed. In this case, in particular the contact surfaces of movable structures can be increased or reduced by the profile property. In this way, electrical and / or mechanical properties of the structures can be influenced in a desired manner, wherein in particular a separate adjustment of the mechanical and electrical properties of the structures can take place.

Furthermore, due to the variation of the profile properties with the depth, different, otherwise incompatible goals can be achieved. In this case, for example, a part of the etching profile, in which a certain property is critically optimized for the function of the device, eg the wall roughness at contact surfaces, with respect to this property, while other profile parts with respect to other properties, such as the speed of the etching process or one for a Capacity relevant average distance, can be optimized. According to the invention, both a variation of the process parameters during the etching process - continuously or in discrete steps - as well as a variation of the profile properties are performed hereby. If multiple discrete steps are used, the DE 42 41 045 C1 alternating etching and passivation, optionally also other intermediate steps are performed.

As a semiconductor component, in particular a micromechanical acceleration sensor can be formed on a capacitive measuring basis. In this case, a circuit for measuring the capacitance between the side surfaces can be integrated in the component.

• 1 einen Querschnitt durch ein Halbleiter-Bauelement gemäß einer Ausführungsform mit vergrößerter Unterätzung an der Oberkante;

The invention will be explained below with reference to the accompanying drawings of an embodiment. It shows:

• 1 a cross section through a semiconductor device according to an embodiment with increased undercut at the top edge;

A substrate 1 has as an inventive semiconductor device an upper edge 2 , upper areas 3c . 3d and lower areas 4c . 4d on. In the substrate 1 is a recess 9 formed, extending from the top edge 2 between the upper areas 3c . 3d and the lower areas 4a . 4b extends into the depths. The etching ground is in 1 not shown. The etched profile with side surfaces 6c . 6d . 7c . 7d the areas 3c . 3d . 4c . 4d of the substrate 1 is profiled according to the etching conditions.

In the embodiment of the 1 is here in the upper substrate areas 3a . 3b a larger undercut and in the lower substrate area 4a . 4b achieved a smaller undercut. Accordingly, an upper area 9.1 the recess 9 wider than a lower area 9.2 , Here, in addition, the upper area 9.1 another roughness of its side edges 6c . 6d as the lower area 9.2 exhibit.

This in 1 shown substrate 1 is made in which a second etching step with a smaller undercut is followed by a second etching step with a small undercut. For this purpose, for example, in the second etching step compared to the first etching step, the gas pressure used during the etching can be reduced and / or an acceleration voltage of the ions impinging on the substrate can be reduced and / or a power coupled to the ionization of the gas, eg microwave power, can be reduced and / or a Gas composition or concentration of gas components are changed and / or a Ätzzykluszeit be reduced.

The embodiment of the 1 can be used in particular for a micromechanical, capacitive acceleration sensor, in which the left-hand regions 3c and 4c relative to the right areas 3d . 4d be adjusted according to the acceleration to be measured and thus the width of the recess 9 will be changed. The change in the width of the recess 9 is called changing the capacity between the side surfaces 6c . 7c and 6d . 7d determined. The electrical capacity of the structure produced results as an average over the upper and lower areas.

In the etch profile of 1 thus a jump-like transition is shown.

Claims (10)

Method for etching a semiconductor material (1), in which structures defined in the semiconductor material (1) are etched with an etching profile (6c, 7d) extending into the etching depth and having a recess (9), wherein an upper region (3c, 3d ) and a lower region (4c, 4d) of the semiconductor material (1) are formed with different undercuts, wherein formed between an upper portion (9.1) of the recess (9) and a lower portion (9.2) of the recess (9) a jump-like transition characterized in that a plurality of gas etching steps are performed, wherein process parameters (T, P, p) are varied during the etching process between the gas etch steps such that the etch profile (6c, 7c, 6d, 7d) is changed with the etch depth, wherein at least a process parameter (T, P, p) is changed stepwise and a second etching step with a smaller undercutting follows a first etching step with a larger undercut, so that In the first etching step, the upper region (9.1) of the recess (9) is made wider than the lower region (9.2) of the recess (9) formed in the second etching step. Method according to Claim 1 , characterized in that the recess (9) in its upper region (9.1) and in its lower region (9.2) is formed in each case with a substantially uniform width. Method according to Claim 1 or 2 , characterized in that the upper portion and the lower portion are each formed with substantially vertical side walls with roughness. Method according to one of the preceding claims, characterized in that the process parameters (T, P, p) are varied during the individual etching steps. Method according to one of the preceding claims, characterized in that between the etching steps intermediate steps, eg polymerization steps are performed. Method according to Claim 5 , characterized in that the intermediate steps are polymerization steps in which a polymer is applied to the lateral boundary of the structures defined by the etching mask, which polymer is at least partially removed again during the subsequent etching step. Method according to one of the preceding claims, characterized in that the etching steps are carried out without polymer or polymer former in the plasma. Method according to one of the preceding claims, characterized in that in the etching steps ions are accelerated with predetermined ion energy to the substrate. Method according to one of the preceding claims, characterized in that as the process parameter one or more of the following variables are varied: Ätzzykluszeit, coupled power, acceleration voltage, acceleration current, process pressure, partial concentrations of etching gases. Method according to one of the preceding claims, characterized in that the etch profile (6a, 7a, 6b, 7b) is changed in at least one of the following profile features: wall roughness, profile slope.

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