DE10317465A1 - Method for rendering actual of memory segment, e.g. of flash memory, in which several data sets have been written with entry existing in vector table for each data set specifying access address of data set from number of sets - Google Patents

Abstract

Actualizing memory segment e.g. of flash memory, in which several data sets (K,D1-n) have been written. For each data set exist entry (Vk,VD1-n) in vector table (V1), specifying access address of data set. At least one not actual data set (D2) is identified from number of such sets. Free data set memory section (P2) is identified, in which actual setting (D2') of data set can be stored. Vector table memory section (V2), in which actual setting of vector table can be stored, is identified, followed by specified steps for entry of actual setting of vector table and data set. Independent claims are included for memory segment.

Description

State of technology

The The invention relates to a method for updating one with a Plurality of records described Memory chip and a memory chip for such a method.

Under The term flash memory is known for non-volatile memory modules, in which blank or deleted cells at any time individually can be described where the deletion of cells is only possible in segments. A flash memory therefore cannot be like a RAM chip are updated, in which only those cells whose Contents are no longer current, can be selectively overwritten with current values. To overwrite a single cell to be able I rather have the whole flash segment in which they contain is deleted and then be rewritten. The problem arises that the contents of all other cells in the segment are cached elsewhere would have to be these cells after deleting them to be able to restore with the cached data. This is only possible if a data processing circuit in which such a flash segment is built is about Reserve memory has at least the size of the flash segment to the Back up data in it.

On another known method for updating a flash memory in such a circuit is the so-called copy page method. This method requires the presence of at least two Flash segments. One of these segments serves as an active page, i.e. a processor of the data processing circuit intervenes at its Work continuously reading towards this segment. If a data value the active page changed a so-called copy page is created in the second segment by in it the changed one Data value entered and all others Data values from the active page can be copied over unchanged. If this Process is completed, the copy page is activated, i.e. the processor intervenes read only to the second flash segment and the first can deleted and overwritten become.

all Common to these concepts is that they have a reserve of free Store at least the size of one Flash segments require.

It would be possible, the absolute memory requirement of the data processing circuit to reduce that a big Number of small flash segments is used, but this has the disadvantage that the cost of Storage space the higher the smaller the segments that make it up. This does Data processing circuits using the copy-page method update, comparatively expensive.

Advantages of invention

The Advantage of the present invention is that it is updating of records in a segment that can only be deleted Enables memory such as flash memory at low cost and especially without having a complete memory segment just for updating must be kept in the data processing circuit. Much more enough for the execution of the method according to the invention a single memory segment that is large and therefore comparatively large can be inexpensive.

• a) Identifizieren des wenigstens einen nicht mehr aktuellen Datensatzes aus der Mehrzahl von Datensätzen,
• b) Identifizieren eines freien Speicherbereichs, als Datensatz-Speicherbereich bezeichnet, in dem eine aktuelle Fassung des wenigstens einen Datensatzes speicherbar ist,
• c) Identifizieren eines freien Speicherbereiches, als Vektortabellen-Speicherbereich bezeichnet, in dem eine aktuelle Fassung der Vektortabelle speicherbar ist, in welcher der den wenigstens einen Datensatz betreffende Vektor auf den in Schritt b) identifizierten Speicherbereich weist, und
• d) Eintragen der aktuellen Fassung der Vektortabelle und der aktuellen Fassung des wenigstens einen Datensatzes in den jeweils identifizierten Speicherbereichen.

These advantages are achieved by a method for updating at least one data record in a memory module described with a plurality of data records, an entry for each data record in a vector table specifying an access address, with the following steps:

• a) identifying the at least one data record that is no longer current from the plurality of data records,
• b) identifying a free memory area, referred to as a data record memory area, in which a current version of the at least one data record can be stored,
• c) identifying a free memory area, referred to as a vector table memory area, in which a current version of the vector table can be stored, in which the vector relating to the at least one data record points to the memory area identified in step b), and
• d) Entering the current version of the vector table and the current version of the at least one data record in the respectively identified memory areas.

This If necessary, the procedure can be repeated several times often, until in the memory available in the data processing circuit no free space for updated records and vector tables are more available.

• e) Überschreiben des Zeigers mit einer Zugriffsadresse der aktuellen Fassung der Vektortabelle

angewendet wird.The current data records are accessed using the current version of the vector table. In order to be able to access them correctly, a pointer to the vector table should be kept stored in a rewritable memory block, to which the additional step after step d)

• e) Overwriting the pointer with an access address of the current version of the vector table

is applied.

There the price for a given storage capacity the smaller, the fewer and the larger the memory segments are, from which it is composed, there are vector table and record storage areas preferably in the same memory segment, i.e. identifying the free vector table memory area and the entry of the current one Version of the vector table in the identified memory area take place in the same memory segment as the identification of the free data record storage area for the current version of the Record.

Preferably contains the last saved vector table each has a pointer a free area of the memory segment. This can be done in step b) or step c) can be used to quickly and easily record or vector table storage area to identify.

The Pointer to the free memory area is preferably generated, by an access address when repeating step d) one adjacent to the memory area described in this step Memory area as a pointer to the free area in the vector table is entered.

one According to the preferred embodiment of the method, in step b) and step c) adjacent storage areas identified. A possible Alternative would be that if steps a) to d) are repeated several times, for each Repetition of step b) or c) a data record or vector table memory area is identified by those in the previous iteration data set or vector table storage area identified in the same step borders. So a coherent free memory area, for example, gradually from both sides be filled with data record or vector table storage areas.

A preferred application of the invention is in the manufacture of a Data processing circuit, the one based on the stored in the memory chip Information controlled processor and at least one with the processor cooperating peripheral device includes. Here can be in the memory segment in advance, before an exact model of the peripheral module is known with which the processor will be combined is a group of Standard records be entered, and an update of at least one of these data records by one for one actually peripheral data set used takes place, once identity this peripheral component is fixed, at the latest when it enters the data processing circuit is installed. The process enables but also an update of the tax information to any one Time during the life of the data processing circuit, e.g. if the peripheral device changed by repair or has been replaced.

On Memory segment according to the present The invention is characterized in that it has at least one data record memory area, in which a plurality of records corresponding to those mentioned above Standard records is stored, at least a second data record memory area and has at least two vector table storage areas, in which vector tables are stored, the vectors of the first or original Vector table each on the data records in the first data record memory area point and at least from the vectors of the second vector table one points to a data record in the second data record memory area and the rest Vectors each on the same records in the first record storage area like the corresponding vectors in the first vector table.

The Memory area of the second vector table is preferably between the first and the second data record storage area included.

Everyone Vector table storage area preferably also includes one Vector pointing to either another vector table storage area or points to a free memory area.

Further Features and advantages of the invention result from the following Description of exemplary embodiments with reference to the attached Characters. Show it:

1 a block diagram of a data processing circuit with a memory segment according to the invention;

2 a division of the memory segment before final assembly of the data processing circuit; and

3 a division of the memory segment after a single update.

description of the embodiments

1 Figure 3 shows a block diagram of a data processing circuit to which the present invention is applicable. The data processing circuit comprises a microprocessor in a manner known per se 1 , a flash memory segment 2 , a cell-wise electrically rewritable memory such as an EEPROM 3 , as well as an interfaces circuit 4 that it the microprocessor 1 enables to the interface circuit 4 to communicate connected peripheral components, not shown in the figure, or which itself can be understood as a peripheral component of the data processing circuit. The components 1 to 4 are with each other by a bus 5 connected.

The data processing circuit can be, in particular, an engine control unit for a motor vehicle, which regulates variables, such as ignition timing, amount of fuel supplied, etc., on the basis of various operating parameters measured on a motor vehicle. Sensors for detecting the parameters and actuators for influencing the variables are connected to the data processing circuit via the interface circuit 4 connected. They can be used in a large variety of types, so that an engine control unit, which is intended to be used in different motor vehicle models, must be able to communicate with a large number of such types of sensors and actuators, to correctly process their measurement signals and To generate control signals correctly. The control information to which the microprocessor is based 1 accesses during operation, ie the entirety of the control program and parameter values that are stored in the control unit can therefore at most be uniform for all control units in a series. Another part of the control information, which depends on the peripheral components interacting with the microprocessor, must be specified when assembling the control unit - insofar as this information depends on the components of the control unit - or only when the control unit is installed in a motor vehicle.

at The following description of exemplary embodiments is of simplicity half assumed that the part of the tax information, the depends on the peripheral components, with which the control unit is combined in a motor vehicle, consists only of data values. However, it is obvious that an adaptation of program parts dependent on of the peripheral components used could be required, whereby however, the generalization of the invention to this case for the person skilled in the art is readily apparent from the following description.

Yet while the development of the control unit its parameters are sorted into those that are independent of the Type of peripheral device connected to the microprocessor of the control unit should always be needed and those whose values are of the type of a peripheral module used depend or maybe even not required if a corresponding peripheral module is not available is. The always needed In the following, parameters are called constants, those Parameters, the values of which are present or absent and may depend on the type of a certain peripheral module referred to as a data record assigned to this peripheral module. The total amount of operating parameters of the control unit sets is composed of the constants and a number of used for the Peripheral blocks specific data sets.

Around an exam functionality of the control unit at its manufacturer, yet Before it is installed in a motor vehicle, it must have complete control information with constants and records feature, being the existing records not necessarily are those that are also for the operation of the control unit if it is installed in a motor vehicle and with one for a specific one Vehicle model specific set of peripheral components work together must be suitable.

2 shows a division of the flash memory segment 2 in such a state of the control unit that has not yet been adapted to a specific application environment in a motor vehicle. The segment contains a vector table storage area V1, in which a number of vectors VF, VK, VD1, ..., VDn are stored, and - possibly, but not necessarily - directly adjacent to the vector table storage area V1, a parameter storage area P1 , which in turn is divided into a memory area K for the constants and a plurality of memory areas D1, ..., Dn for the data records. A first vector VF of the vector table memory area V1 has a free memory area F which adjoins the parameter memory area P1.

The microprocessor 1 accesses the constants and data records with the aid of a pointer B which points to a predetermined vector, here the vector VK, of the vector table storage area V1. This pointer B is in the EEPROM 3 saved.

First if the engine control unit is installed in a motor vehicle, possibly only when it is built in, are all Peripheral modules with which it must work. In Knowledge of these peripheral blocks can now those records of Parameter memory area P1 can be identified that is attached to the existing one Peripheral modules are not adapted and therefore no longer are up to date and must be replaced.

The process of replacement is based on the 3 described, here for the sake of simplicity it is assumed that only a single data record, the data record D2, must be replaced.

Using the pointer VF in the vector memory area V1, the microprocessor identifies the in 2 with F designated free memory area, which is able to accommodate a new vector table memory area V2. The structure of the vector table storage area with vectors VK, VD1 to VDn, VF and consequently the extent of the vector table storage area V2 is the same as in V1. By adding the size of V2 to the value of the pointer VF, the microprocessor can 1 thus calculate a start address of a data record memory area P2, which connects to V2 and can hold the updated data record D2 '. The values of those vectors which point to unchanged data sets remain unchanged. After the values of all vectors of the new vector table storage area V2 have been determined, they are used by the microprocessor 1 - or an external, temporarily to the bus 5 connected programming device - entered in the memory area V2, and then the updated data record D2 'is written.

If it is found that not one but several of the data records in the memory area P1 in need of updating are, so it is natural possible, the multiple updated records in the record storage area P2 to write and the addresses of these records in the appropriate vectors of the vector table storage area V2.

It is also possible perform a plurality of updates, each in the free memory area F to which the vector VF of the last created Vector table storage area V2 has a new vector table storage area V3 and related updated records be entered until it is updated again that fails in the flash memory segment no more space available stands.

Of course, partitioning schemes of the memory segment are also possible, which differ from that in 2 and 3 shown patterns differ. While in the examples considered so far, the free memory area of the flash segment 2 is only filled from one side in each case mixed with vector table memory areas V2, V3, ... and data record memory area P2, ..., it is particularly conceivable to always update an updated vector table memory area to a first end of the free memory area, eg at low addresses, to write and to place an updated data record memory area at a second end of the free memory area, so that the free memory area is successively filled from both sides.

Claims (11)

Method for updating a memory segment described with a plurality of data records (K, D1, -Du), in particular a flash memory ( 2 ), whereby for each data record (K, D1, ..., Dn) there is an entry (VK, VD1, ..., VDn) in a vector table (V1) which specifies an access address of the data record, with the steps: a ) Identifying at least one data record (D2) which is no longer current from the plurality of data records, b) Identifying a free data record memory area (P2) in which a current version (D2 ') of the at least one data record can be stored, c) Identifying a free data record Vector table storage area (V2) in which a current version of the vector table can be stored, in which the vector (VD2) relating to the at least one data record points to the storage area identified in step b), d) entering the current version of the vector table and the current one Version of the at least one data record in the respectively identified memory areas (V2, P2). Method according to Claim 1, in which a pointer to the vector table (V1, V2) is stored in a rewritable memory block ( 3 ) is kept stored, and in which step d) is followed by the additional step e) overwriting the pointer with an access address of the current version of the vector table. Method according to Claim 1 or 2, characterized in that the identification of the free vector table memory area (V2) and the entry of the current version of the vector table in the same memory segment ( 2 ) is carried out like the identification of the free data record memory area (P2) for the current version of the data record (D2 '). Method according to one of the preceding claims, characterized characterized that the last saved vector table each a pointer (VF) to a free area (F) of the memory segment contains and that in step b) or step c) free memory area in each case is identified at the access address to which the pointer (VF) has. A method according to claim 4, characterized in that each time step d) is repeated, an access address a memory area adjacent to the memory area described in this step (F) as a pointer to the free area in the saved in step d) Vector table is entered. Method according to one of the preceding claims, characterized characterized in that in step b) and c) adjacent to each other Memory areas are identified. Method according to one of claims 1 to 5, characterized in that that steps a) to d) are repeated several times, and that a memory area in each repetition of step b) or c) is identified by those in the previous iteration identified by the same step. Method according to one of the preceding claims, characterized in that it is used in the manufacture of a data processing circuit which controls a processor (based on the information stored in the memory module ( 1 ) and at least one peripheral module interacting with the processor ( 4 ) and that the at least one data record (D2) for the peripheral module ( 4 ) contains specific information. Memory segment, in particular flash memory, thereby characterized in that there is a first data record memory area (P1), in which a plurality of records (K, D1, ..., Dn) is stored, at least one second data record storage area (P2) and at least two vector table storage areas (V1, V2) comprises, in which vector tables are stored, the vectors (VK, VD1, ..., VDn) of the first vector table (V1) each on data records in the Record storage area (P1) point and from the vectors of the second vector table (V2) at least one (VD2) on a data record (D2 ') in the second Record storage area (P2) points and the rest Vectors each on the same records in the first record storage area (P1) have vectors corresponding to them in the first vector table (V1). Memory segment according to claim 9, characterized in that the second vector table storage area (V2) between the first and the second data record memory area (P1, P2) is included. Memory segment according to claim 9 or 10, characterized characterized that each vector table memory area (V1, V2) contains a vector (VF), which either points to another vector table memory area (V2) or has a free memory area (F).