DE1025450B - Reduction circuit for periodic pulses using a trigger circuit formed with two surface transistors - Google Patents
Reduction circuit for periodic pulses using a trigger circuit formed with two surface transistorsInfo
- Publication number
- DE1025450B DE1025450B DEV8704A DEV0008704A DE1025450B DE 1025450 B DE1025450 B DE 1025450B DE V8704 A DEV8704 A DE V8704A DE V0008704 A DEV0008704 A DE V0008704A DE 1025450 B DE1025450 B DE 1025450B
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- transistors
- pulses
- periodic pulses
- coil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000009467 reduction Effects 0.000 title claims description 8
- 230000000737 periodic effect Effects 0.000 title claims description 5
- 230000005415 magnetization Effects 0.000 claims 1
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 claims 1
- 239000003990 capacitor Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
- H03K4/60—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth current is produced through an inductor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Magnetic Treatment Devices (AREA)
Description
Die Erfindung betrifft eine Untersetzerschaltung, mit der größere Untersetzungsverhältnisse als 2 :1 verwirklicht werden können.The invention relates to a step-down circuit, with the step-down ratios greater than 2: 1 can be realized.
Schaltungen, die ein größeres Untersetzungsverhältnis als 2 :1 herzustellen erlauben, sind aus der Röhrentechnik bekannt. Ferner sind Anordnungen angegeben worden, in denen Spitzentransistoren verwendet werden. Ihre Wirkung beruht darauf, daß ein Kondensator von den zu untersetzenden Impulsen stufenweise aufgeladen wird und beim Erreichen einer gewissen Ladespannung das Umlaufen des Arbeitspunktes des Spitzeintransistors auf einem Weg, der durch niederohmigere Teile des Kennlinienfeldes führt, erfolgt; dabei wird ein Impuls abgegeben. Nachteilig an dieser Schaltung ist außer den hohen Herstellungskosten, der Überlastungsempfindlichkeit und der Instabilität der Spitzentransistoren die Tatsache, daß bei den vornehmlich in Betracht kommenden niedrigen Frequenzen der Ladekondensator hohe Werte aufweisen muß, die nicht oder nur unter beträchtlichem Aufwand in zeitlich stabiler Weise realisiert werden können.Circuits that allow a reduction ratio greater than 2: 1 to be produced are from the Known tube technology. Furthermore, arrangements have been given in which tip transistors are used will. Their effect is based on the fact that a capacitor of the pulses to be reduced is gradually charged and when a certain charging voltage is reached, the operating point of the Spitzeintransistor rotates on a path that leads through lower resistance parts of the characteristic field, he follows; an impulse is emitted. The disadvantage of this circuit is, besides the high manufacturing costs, the overload sensitivity and the instability of the tip transistors the fact that at the low frequencies of the charging capacitor, which are primarily considered, have high values must, which cannot be implemented in a stable manner over time or only with considerable effort can.
Durch die Anordnung nach der Erfindung werden die genannten Nachteile vermieden. Der empfindliche Spitzentransistor wird durch eine andere Halbleiteranordnung mit negativer Charakteristik ersetzt, die aus zwei Flächentransistoren verschiedenen Leitfähigkeitstyps besteht. Diese an sich bekannte Halbleiteranordnung wird an Stelle der stufenweise steigenden Kondensator-Spannung von einer an einer Spule auftretendem Spannung geschaltet. Diese Spule läßt sich in zeitlich stabiler Weise unschwer auch für niedrige Frequenzen auslegen. Die Schaltung nach der Erfindung verbessert also die Betriebssicherheit der bekannten Anordnungen allgemein und erweitert darüber hinaus den ausnutzbaren Frequenzbereich» Sie ermöglicht große Untersetzungsverhältniisse; in einer Stufe lassen sich mit heutigen Mitteln Impulsuntersetzungen bis etwa 15:1 herstellen.The above-mentioned disadvantages are avoided by the arrangement according to the invention. The sensitive one Tip transistor is replaced by another semiconductor device with negative characteristics, the consists of two junction transistors of different conductivity types. This known semiconductor device is replaced by the gradually increasing capacitor voltage of a voltage occurring on a coil Voltage switched. This coil can easily be used in a stable manner even for low Interpret frequencies. The circuit according to the invention thus improves the operational reliability of the known Arrangements in general and also extends the usable frequency range »Sie enables large reduction ratios; With today's means, momentum reductions can be achieved in one stage Make up to about 15: 1.
Die Figur zeigt ein Ausführungsbeispiel der Schaltung nach der Erfindung. Durch den Übertrager T2 gelangt eine sinus- oder impulsförmige (periodische) Spannung in den Kollektorkreis eines PNP-Transistors. Basis des PNP- und Kollektor des NPN-Transistors liegen gemeinsam an einer SpUIeT1, auf die eine Auskoppelwicklung für die untersetzten Impulse aufgebracht ist. Die Emitterspannungen werden über Widerstände R1, Rs an die Transistoren geführt; ebenso liegt in Serie zur Spule T1 ein Widerstand R2. R1, R2 und R3 dienen im wesentlichen der Arbeitspunkteinstellung der Schaltung. An der Auskoppelwicklung der Spule T1 liegt neben der Folge der untersetzten Impulse noch ein geringer Anteil der zu untersetzenden Spannung, der eine nachgeschaltete weitere Untersetzerschaltung für periodischeThe figure shows an embodiment of the circuit according to the invention. A sinusoidal or pulse-shaped (periodic) voltage passes through the transformer T 2 into the collector circuit of a PNP transistor. The base of the PNP and the collector of the NPN transistor are jointly connected to a SpUIeT 1 on which a decoupling winding for the reduced pulses is applied. The emitter voltages are fed to the transistors via resistors R 1 , R s; Likewise, a resistor R 2 is connected in series with the coil T 1 . R 1 , R 2 and R 3 essentially serve to set the operating point of the circuit. On the decoupling winding of the coil T 1 , in addition to the sequence of the stepped down pulses, there is also a small proportion of the voltage to be stepped down, which is a downstream further stepper circuit for periodic
Impulse unter VerwendungUsing pulses
einer mit zwei Flächentransistorenone with two junction transistors
gebildeten Kippschaltungformed toggle switch
Anmelder:Applicant:
Dr. phil. habil. Oskar Vierling,
Ebermannstadt, Pretzfelder Str. 174-175Dr. phil. habil. Oskar Vierling,
Ebermannstadt, Pretzfelder Str. 174-175
Dr, phil. habil. Oskar Vierling, Ebermannstadt,
ist als Erfinder genannt wordenDr. phil. habil. Oskar Vierling, Ebermannstadt,
has been named as the inventor
Untersetzerstufe nicht beeinflußt bzw. im Bedarfsfalle durch Filter unterdrückt werden kann.Reducer stage not influenced or if necessary can be suppressed by filters.
Die Anordnung der Zeichnung kann in verschiedener Weise abgewandelt werden. Zunächst ist eine gleichzeitige Vertauschung von Polarität der Betriebsspannung und Leitfähigkeitstyp der Transistoren möglich. Ferner können die Äusgangsimpulse auch am Widerstand Rs abgenommen werden. Die Einspeisung der zu untersetzenden Impulse kann bei konstanter Eingangsamplitude am Widerstand R1 erfolgen. The arrangement of the drawing can be modified in various ways. First of all, the polarity of the operating voltage and the conductivity type of the transistors can be reversed at the same time. Furthermore, the output pulses can also be picked up at the resistor R s . The pulses to be reduced can be fed in with a constant input amplitude at resistor R 1 .
Werden am Widerstand R1 periodisch Impulse zugeführt, so hat dies eine sprunghaft steigende Energie des Magnetfeldes der SpUIeT1 zur Folge. Dementsprechend steigt die Steuerspannung zwischen Emitter und Basis des PNP-Transistors. Sobald eine gewisse Steuerspannung erreicht ist, führt der Arbeitspunkt der aus den beiden Transistoren und den Widerständen bestehenden Kippschaltung einen Umlauf aus, dem die Abgabe eines Impulses entspricht. Während dieser Zeit verschwindet auch die zu der Spule gespeicherte Feldenergie. Mit dem Eintreffen weiterer Impulse an R1 wiederholt sich der Vorgang.If pulses are periodically fed to the resistor R 1 , this results in a sudden increase in the energy of the magnetic field of the coil 1 . The control voltage between the emitter and base of the PNP transistor increases accordingly. As soon as a certain control voltage is reached, the operating point of the flip-flop circuit, which consists of the two transistors and the resistors, performs a cycle, which corresponds to the output of a pulse. During this time, the field energy stored for the coil also disappears. When further impulses arrive at R 1 , the process is repeated.
Es ist offensichtlich, daß jede Amplituidemänderung der Eingangsimpulse das Untersetzungsverhältnis beeinflußt. Um dies zu vermeiden, nutzt man zweckmäßig die Regelwirkung aus, die sich durch die in der Figur gezeigte Einspeisung über den Übertrager T2 ergibt und auf der Begrenzung der EingangsimpulseIt is evident that any change in the amplitude of the input pulses affects the reduction ratio. In order to avoid this, the control effect is expediently used, which results from the feed shown in the figure via the transformer T 2 and on the limitation of the input pulses
709 908/161709 908/161
durch die in bezug auf die Spule T1 in Serie liegenden Transistorübergänge beruht.by the transistor junctions lying in series with respect to the coil T 1.
Claims (2)
USA.-Patentschrift Nr. 2 655 609;
Electronics, Januar 1955, S. 168 bis 171.Considered publications:
U.S. Patent No. 2,655,609;
Electronics, January 1955, pp. 168-171.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEV8704A DE1025450B (en) | 1955-03-26 | 1955-03-26 | Reduction circuit for periodic pulses using a trigger circuit formed with two surface transistors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEV8704A DE1025450B (en) | 1955-03-26 | 1955-03-26 | Reduction circuit for periodic pulses using a trigger circuit formed with two surface transistors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE1025450B true DE1025450B (en) | 1958-03-06 |
Family
ID=7572393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DEV8704A Pending DE1025450B (en) | 1955-03-26 | 1955-03-26 | Reduction circuit for periodic pulses using a trigger circuit formed with two surface transistors |
Country Status (1)
| Country | Link |
|---|---|
| DE (1) | DE1025450B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1240125B (en) * | 1962-07-07 | 1967-05-11 | Sie Soc It Elettronica | Electronic device for counting and selecting pulses |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2655609A (en) * | 1952-07-22 | 1953-10-13 | Bell Telephone Labor Inc | Bistable circuits, including transistors |
-
1955
- 1955-03-26 DE DEV8704A patent/DE1025450B/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2655609A (en) * | 1952-07-22 | 1953-10-13 | Bell Telephone Labor Inc | Bistable circuits, including transistors |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1240125B (en) * | 1962-07-07 | 1967-05-11 | Sie Soc It Elettronica | Electronic device for counting and selecting pulses |
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