DE102024203825B3 - Multi-chip module and method for manufacturing a multi-chip module - Google Patents

Abstract

The present invention relates to a multi-chip module and a method for its production, wherein the multi-chip module has a first chip (10), a second chip (20) and an isolation chip (30), wherein the first chip (10) is configured to be used in a first voltage domain, the second chip (20) is configured to be used in a second voltage domain which has a potential difference to the first voltage domain, the isolation chip (30) has at least one galvanically isolating coupling element (40) and the isolation chip (30) is configured to enable signal transmission and/or power transmission between at least one first terminal (32) and at least one second terminal (34) of the isolation chip (30) via the galvanically isolating coupling element (40), the first chip (10) and the second chip (20) are arranged next to one another at a predefined distance, and the isolation chip (30) is configured on the basis of a Flip-chip assembly is mounted directly on the first chip (10) and the second chip (20), so that at least one module-internal terminal (12) of the first chip (10) is permanently electrically connected to the first terminal (32) of the isolation chip (30) and at least one module-internal terminal (22) of the second chip (20) is permanently electrically connected to the second terminal (34) of the isolation chip (30).

Description

State of the art

The present invention relates to a multi-chip module and a method for producing such a multi-chip module.

From the documents US 2010/0 019 391 A1 and US2019/0304911 A1 Isolated gate drivers for controlling power semiconductors such as IGBTs and/or MOSFETs are known, which are used, for example, in drive inverters of electrically powered vehicles and/or in devices deviating from these.

This ensures electrical isolation between a control circuit and a gate driver for controlling a power semiconductor based on a galvanically isolating coupling element that is connected between the control circuit and the gate driver. This allows the control circuit and the gate driver to operate in different voltage domains, with the control circuit, for example, operating in a 5 V voltage domain and the gate driver in a 400 V voltage domain.

The galvanic isolation is realized, for example, by means of one or more coupling capacitors and/or transformers, which enable signal transmission and/or power transmission from the control circuit to the gate driver.

Furthermore, it is known to design such control circuits, gate drivers and galvanically isolating coupling elements as separate chips, which can be integrated together in a multi-chip module (as a so-called “system-in-package”) by usually being arranged next to one another and electrically connected to one another by means of bond wires.

Disclosure of the invention

According to a first aspect of the present invention, a multi-chip module is proposed, which comprises at least a first chip, a second chip, and an isolation chip, wherein the chips are each formed as separate components on separate substrates. The first chip and/or the second chip and/or the isolation chip can, for example, each be formed as an integrated circuit (e.g., as an ASIC) or deviating therefrom and integrated as a so-called "system-in-package."

The first chip is configured to be used in a first voltage domain, while the second chip is configured to be used in a second voltage domain which has a potential difference to the first voltage domain, so that the two voltage domains must be galvanically separated from each other.

The isolation chip has at least one galvanically isolating coupling element and is configured to enable signal transmission (in particular data transmission) and/or power transmission between at least one first terminal and at least one second terminal of the isolation chip via the galvanically isolating coupling element. The terminals are formed, for example, as contact bumps in the form of so-called "bumps" or "balls," without being limited thereto.

Furthermore, it is advantageously possible for the isolation chip to have additional connections, for example, to close a single circuit and/or a plurality of circuits between the first chip and the second chip via the isolation chip. Alternatively or additionally, it is also conceivable for the multi-chip module to have a plurality of isolation chips, each with at least two connections, to enable respective signal transmissions between the first chip and the second chip via several separate isolation chips.

It should be noted in general that a direction of signal transmission and/or power transmission between the first chip and the second chip is generally not restricted.

The first chip and the second chip are arranged next to one another at a predefined distance, while the isolation chip is mounted directly on the first chip and the second chip using flip-chip assembly, such that at least one module-internal connection of the first chip is permanently electrically connected to the first connection of the isolation chip and at least one module-internal connection of the second chip is permanently electrically connected to the second connection of the isolation chip. According to the flip-chip assembly used in the prior art, the isolation chip is thus directly contacted with respective module-internal connections of the first chip and the second chip, without separate connection wires (“bond” wires) being provided. Such direct contact is achieved, for example, using solder and/or an electrically conductive adhesive and/or a welded connection in order to form respective electrical contact points (i.e. i.e., connections) between the respective chips to be electrically (and ideally also mechanically) connected to each other.

It is understood that electrical contacting of the first chip and/or the second chip to the outside, i.e., to the outside of the multi-chip module, is carried out on the basis of module terminals, which are each connected to external terminals of the first chip and/or the second chip (e.g., by means of bonding wires) and which can be designed, for example, as contact surfaces and/or pins and/or “bumps” and/or “balls,” etc.

It should be noted in general that a functionality of the first chip and the second chip is fundamentally not restricted and that a signal transmission between the first chip and the second chip based on the isolation chip and/or based on a plurality of isolation chips can represent a unidirectional or a bidirectional signal transmission.

The multi-chip module according to the invention offers a number of advantages, which are briefly described below.

On the one hand, it is possible to implement a differential data transmission between the first chip and the second chip in a particularly robust manner, since the omission of bond wires when contacting the respective chips with each other allows for particularly low undesired asymmetries in the wiring between the chips.

Furthermore, due to their length, bond wires typically act as antennas, which can cause electromagnetic interference (EMI) problems. Flip-chip assembly therefore also reduces potential EMI problems due to the particularly short electrical connection paths.

Furthermore, improved shielding of the galvanically isolating coupling element against interference can be achieved on the basis of a substrate of the isolation chip rotated by the flip-chip assembly.

Furthermore, a so-called shear test, which is usually carried out for bond wire-connected chips, can be omitted.

Finally, time and/or cost savings can be achieved by omitting the bonding wires used in the prior art.

Accordingly, the multi-chip module according to the invention can be used particularly advantageously in an electrically powered vehicle (e.g., in a vehicle's drive inverter), since such vehicles generally require signal transmission between a control domain and a power domain, and particularly high levels of interference are present, which can negatively impact signal transmission. This explicitly does not preclude the multi-chip module according to the invention from being advantageously used alternatively or additionally in other areas of application.

The subclaims show preferred developments of the invention.

In an advantageous embodiment of the present invention, the first chip is mounted on a first lead frame and the second chip is mounted on a second lead frame, wherein the first lead frame and the second lead frame are formed, for example, from a single lead frame which is at least electrically separated during production of the multi-chip module according to the invention (for example, by cutting and/or punching electrically conductive connecting webs of the lead frame). The lead frame is, for example, a lead frame formed from copper. Further advantageously, the predefined distance between the first chip and the second chip is determined as a function of the potential difference between the first voltage domain and the second voltage domain.

In a further advantageous embodiment of the present invention, the first chip has a control circuit, while the second chip has a driver circuit. Furthermore, the multi-chip module is configured to transmit a control signal generated by the control circuit via the isolation chip to the driver circuit of the second chip for controlling the driver circuit. Based on the driver circuit, it is thus possible to control a semiconductor switch, in particular a power semiconductor switch, on the basis of which, for example, an inverter, and in particular a drive inverter for a vehicle, can be designed.

Preferably, the first voltage domain represents voltages up to 5 V, preferably up to 10 V and more preferably up to 20 V. Alternatively or additionally, the second voltage domain represents voltages from 200 V to 10 kV, more preferably from 300 V to 10 kV and particularly preferably from 400 V to 10 kV, without thereby imposing a restriction to the aforementioned voltage ranges. In a In the case described, in which the first chip has a control circuit and the second chip has a driver circuit, in particular for a drive inverter for a vehicle, the control circuit can be arranged, for example, in a 5 V voltage domain and the driver circuit in a 400 V voltage domain.

In a preferred embodiment of the present invention, the galvanically isolating coupling element is at least one capacitor and/or at least one transformer and/or at least one optocoupler.

In a further preferred embodiment of the present invention, the isolation chip has a plurality of coupling elements. Accordingly, it is possible for the isolation chip to have a plurality of identical and/or a plurality of different galvanically isolating coupling elements, on the basis of which the isolation chip is configured to provide different coupling types and/or transmission channels between the first chip and the second chip.

Further advantageously, the multi-chip module comprises a plurality of isolation chips, each configured to enable signal transmission and/or power transmission between the first chip and the second chip. For example, data transmission between the first chip and the second chip can be realized based on a first isolation chip of the multi-chip module, which has a capacitor as a galvanically isolating coupling element, and power transmission can be realized based on a second isolation chip of the multi-chip module, which has a transformer as a galvanically isolating coupling element, without thereby restricting a specific embodiment of the multi-chip module with multiple isolation chips to this example.

In a further advantageous embodiment of the present invention, the multi-chip module comprises a housing (e.g., made of a potting compound) that jointly encapsulates the first chip, the second chip, and the insulation chip. For electrically contacting the first chip and/or the second chip, the multi-chip module comprises externally accessible module terminals, which are formed, for example, based on the lead frames described above.

Alternatively or additionally, the isolation chip is configured to be mechanically connected to the first chip via at least one first dummy bump and to the second chip via at least one second dummy bump, which are not intended for signal transmission between the first chip and the second chip. The use of such dummy bumps allows for a particularly stable mechanical connection between the isolation chip and the first chip and/or the second chip.

According to a second aspect of the present invention, a method for producing a multi-chip module is proposed, the method comprising: a first step for arranging a first chip, which is configured to be used in a first voltage domain, and a second chip, which is configured to be used in a second voltage domain, at a predefined distance from one another (e.g., on a lead frame), wherein the second voltage domain has a higher potential difference than the first voltage domain, a second step for arranging an isolation chip on the first chip and the second chip, by aligning at least one first terminal of the isolation chip with a corresponding module-internal terminal of the first chip and by aligning at least one second terminal of the isolation chip with a corresponding module-internal terminal of the second chip, wherein the isolation chip has at least one galvanically isolating coupling element, via which a signal transmission between the first terminal and the second terminal of the isolation chip is enabled, and a third step for permanently electrically connecting the first terminal of the Isolation chips to the module-internal connection of the first chip and for permanently electrically connecting the second connection of the isolation chip to the module-internal connection of the second chip based on flip-chip assembly. The third step can, for example, comprise reflow soldering to electrically connect the contacts of the isolation chip to respective contacts of the first chip and the second chip. The features, feature combinations, and the advantages resulting therefrom correspond to those explained in connection with the first-mentioned aspect of the invention, so that reference is made to the above explanations to avoid repetition.

Short description of the drawings

• 1 eine schematische Querschnittsansicht einer ersten Ausführungsform eines erfindungsgemäßen Multi-Chip-Moduls; und
• 2 eine schematische Draufsicht einer zweiten Ausführungsform eines erfindungsgemäßen Multi-Chip-Moduls.

Embodiments of the invention are described in detail below with reference to the accompanying drawings. In the drawing:

• 1 a schematic cross-sectional view of a first embodiment of a multi-chip module according to the invention; and
• 2 a schematic plan view of a second embodiment of a multi-chip module according to the invention.

Embodiments of the invention

1 shows a schematic cross-sectional view of a first embodiment of a multi-chip module according to the invention.

The multi-chip module comprises a first chip 10 formed on a first substrate 11 and a second chip 20 formed separately from the first chip 10 on a second substrate 21. The first chip 10 and the second chip 20 are arranged side by side on a first lead frame 50 and a second lead frame 52 at a predefined protective distance from one another, depending on the different voltage domains described below in which the two chips 10, 20 are each arranged.

Furthermore, the multi-chip module has an isolation chip 30, which is formed on a third substrate 31 and has a capacitor 40 as a galvanically isolating coupling element.

The above-mentioned components of the multi-chip module are integrated together in a housing 80, which has at least a first module connection 82 and a second module connection 84, via which electrical contacting of the multi-chip module from the outside is possible.

The first chip 10 is configured to be used in a first voltage domain, which here represents voltages up to 5 V, while the second chip 20 is configured to be used in a second voltage domain, which here represents voltages up to 400 V.

The first chip 10 comprises a control circuit 60 which is configured to receive an input signal via a first external terminal 14, which is connected to the first module terminal 82 by means of a first bonding wire 110, and to generate a control signal S for a driver circuit 70, which is accommodated in the second chip 20, based on an evaluation of the input signal.

The isolation chip 30 is configured to transmit the signal S generated by the control circuit 60 via the capacitor 40 between a first terminal 32 and a second terminal 34 of the isolation chip 30.

For this purpose, the isolation chip 30 is arranged on the first chip 10 and the second chip 20 in the course of a flip-chip assembly during production of the multi-chip module, rotated by 180° with respect to the first chip 10 and the second chip 20, by aligning the first connection 32 of the isolation chip 30 with a corresponding module-internal connection 12 of the first chip 10 and by aligning the second connection 34 of the isolation chip 30 with a corresponding module-internal connection 22 of the second chip 20.

The second chip 20 further has a second external terminal 24, which is connected to the second module terminal 84 by means of a second bonding wire 120.

By subsequent reflow soldering, solder balls provided at the terminals 32, 34 of the insulation chip 30 are melted in order to produce a materially bonded connection between the first terminal 32 of the insulation chip 30 and the module-internal terminal 12 of the first chip 10 and, furthermore, between the second terminal 34 of the insulation chip 30 and the module-internal terminal 22 of the second chip 20.

Please note that any other external and internal connections of the multi-chip module are not shown here for reasons of clarity.

The multi-chip module described above is, for example, a multi-chip module intended for controlling power semiconductor switches in a drive inverter for a vehicle.

2 shows a schematic plan view of a second embodiment of a multi-chip module according to the invention. Since the 2 The second embodiment shown has numerous similarities with the one shown in 1 shown first embodiment, to avoid repetition only the differences between the two figures are explained below and otherwise reference is made to the description 1 referred to.

The second embodiment of the multi-chip module according to the invention has an isolation chip 30 with a first capacitor 40 and a second capacitor 45, via which the multi-chip module is configured, for example, to realize a symmetrical transmission of a signal S from the first chip 10 to the second chip 20.

For this purpose, the first chip 10 is connected to a plurality of first module terminals 82, via which, for example, an input signal SE and, for example, a supply voltage 90 are provided to the first chip 10. The first chip 10 is advantageously configured to generate the symmetrically formed control signal S as a function of the input signal SE.

In addition, a plurality of second module terminals 84 are connected to the second chip 20, so that a gate driver 70 contained in the second chip 20, which is configured to control a power semiconductor switch (not shown), is configured to generate a gate driver signal SA based on the control signal S transmitted from the first chip 10 to the second chip 20 via the isolation chip 30 and to output this gate driver signal via the second module terminals 84. Further existing module terminals 84 can be used, for example, to control another power semiconductor switch or to provide a supply voltage 100 for the second chip 20, or in a different manner.

It should be noted that instead of the isolation chip 30, which has the two capacitors 40, 42, two separate isolation chips 30 can be used, each having one of the capacitors 40, 42.

Claims (10)

A multi-chip module comprising: - a first chip (10), - a second chip (20), and - an isolation chip (30), wherein - the first chip (10) is configured to be used in a first voltage domain, - the second chip (20) is configured to be used in a second voltage domain having a potential difference to the first voltage domain, - the isolation chip (30) has at least one galvanically isolating coupling element (40), and the isolation chip (30) is configured to enable signal transmission and/or power transmission between at least one first terminal (32) and at least one second terminal (34) of the isolation chip (30) via the galvanically isolating coupling element (40), - the first chip (10) and the second chip (20) are arranged next to one another at a predefined distance, and - the isolation chip (30) is directly connected to the isolation chip based on flip-chip assembly is mounted on the first chip (10) and the second chip (20) such that at least one module-internal terminal (12) of the first chip (10) is permanently electrically connected to the first terminal (32) of the isolation chip (30) and at least one module-internal terminal (22) of the second chip (20) is permanently electrically connected to the second terminal (34) of the isolation chip (30). Multi-chip module according to Claim 1 , wherein - the first chip (10) is mounted on a first lead frame (50) and the second chip (20) is mounted on a second lead frame (52), and/or - wherein the predefined distance between the first chip (10) and the second chip (20) is determined as a function of the potential difference between the first voltage domain and the second voltage domain. Multi-chip module according to one of the preceding claims, wherein - the first chip (10) has a control circuit (60), - the second chip (20) has a driver circuit (70), and - the multi-chip module is configured to transmit a control signal (S) generated by the control circuit (60) via the isolation chip (30) to the driver circuit (70) of the second chip (20) for controlling the driver circuit (70). Multi-chip module according to one of the preceding claims, wherein - the first voltage domain represents voltages up to 5 V, preferably up to 10 V, and more preferably up to 20 V, and/or - the second voltage domain represents voltages from 200 V to 10 kV, more preferably from 300 V to 10 kV, and even more preferably from 400 V to 10 kV. Multi-chip module according to one of the preceding claims, wherein the galvanically isolating coupling element (40) is - at least one capacitor, and/or - at least one transformer, and/or - at least one optocoupler. Multi-chip module according to one of the preceding claims, wherein the isolation chip (30) has a plurality of coupling elements (40). Multi-chip module according to one of the preceding claims, wherein the multi-chip module comprises a plurality of isolation chips (30), each of which is configured to enable signal transmission and/or power transmission between the first chip (10) and the second chip (20). Multi-chip module according to one of the preceding claims, wherein the multi-chip module comprises a housing (80) which houses the first chip (10), the second chip (20) and the isolation chip (30) together. Multi-chip module according to one of the preceding claims, wherein the isolation chip (30) is configured to be mechanically connected to the first chip (10) via at least one first blind contact bump and to the second chip (20) via at least one second blind contact bump, which are not provided for signal transmission and/or power transmission between the first chip (10) and the second chip (20). A method for producing a multi-chip module, comprising: - a first step for arranging a first chip (10), which is configured to be used in a first voltage domain, and a second chip (20), which is configured to be used in a second voltage domain, at a predefined distance from each other, wherein the second voltage domain has a potential difference with respect to the first voltage domain, - a second step for arranging an isolation chip (30) on the first chip (10) and the second chip (20), by aligning at least one first terminal (32) of the isolation chip (30) with a corresponding module-internal terminal (12) of the first chip (10) and by aligning at least one second terminal (34) of the isolation chip (30) with a corresponding module-internal terminal (22) of the second chip (20), wherein the isolation chip (30) has at least one galvanically isolating coupling element (40). via which a signal transmission and/or a power transmission between the first terminal (32) and the second terminal (34) of the isolation chip (30) is enabled, and - a third step for permanently electrically connecting the first terminal (32) of the isolation chip (30) to the module-internal terminal (12) of the first chip (10) and for permanently electrically connecting the second terminal (34) of the isolation chip (30) to the module-internal terminal (22) of the second chip (20) on the basis of flip-chip assembly.