DE102024200741A1 - Semiconductor package - Google Patents

Abstract

In a semiconductor package (1), wherein the semiconductor package (1) is suitable for receiving a semiconductor circuit, wherein the semiconductor package (1) is suitable for being inserted into a receiving location of a busbar system, wherein the semiconductor package (1) comprises a contact region, the contact region is suitable for mediating a plurality of electrical connections between the busbar system and the semiconductor circuit when the semiconductor package (1) is inserted into the receiving location.

Description

Technical area

The invention relates to a semiconductor package according to the preamble of claim 1. The invention further relates to a switch element, a power electronics system and a vehicle according to the independent claims.

State of the art

Electric vehicles often use batteries, which provide direct current, as energy storage. However, the electric motors that power such electric vehicles are typically AC motors, such as three-phase motors. For this reason, electric vehicles typically use power electronic components to convert the direct current provided by the batteries into the alternating current required by the motors.

This presents various challenges. Firstly, this conversion from direct current to alternating current should be as energy-efficient as possible, for example, by minimizing losses caused by stray inductances. Furthermore, high power densities are desirable, for example, to minimize the space required for the power electronic components in the vehicle. Furthermore, such power electronic systems should be as simple as possible to enable easy assembly and, ideally, to keep system complexity as low as possible.

When connecting different power electronic components in electric vehicles, so-called busbars are often used, which connect the power electronic components to each other in such a way that, for example, bridge circuits are realized.

Such bridge circuits are usually constructed using prefabricated semiconductor components, which, however, have various disadvantages. For example, these prefabricated components typically require complex busbar mounting or have side connections, which make connecting to the busbars difficult. Furthermore, the existing components are not very flexible in terms of their possible applications.

General description of the invention

The object of the invention is to eliminate or at least reduce the disadvantages of the prior art.

The problem is solved by a semiconductor package, wherein the semiconductor package is suitable for accommodating a semiconductor circuit, wherein the semiconductor package is suitable for being inserted into a receiving location of a busbar system, wherein the semiconductor package comprises a contact region, wherein the contact region is suitable for establishing a plurality of electrical connections between the busbar system and the semiconductor circuit when the semiconductor package is inserted into the receiving location. With the aid of such a semiconductor package, which can be inserted into a busbar system and which comprises a contact region for establishing the necessary electrical contacts, good modularity and simple connection of the semiconductor package to a busbar system is ensured. A “semiconductor package” is to be understood in particular as a structure within which a plurality of semiconductor components forming a semiconductor circuit can be arranged.

In advantageous embodiments, the semiconductor package comprises a housing, wherein the housing comprises the contact region, wherein the contact region is preferably a contact wall. Such a configuration of the semiconductor package further improves modularity. Forming the contact region as a contact wall is advantageous because it allows the electrical connections to be formed in a predefined area that can be arranged as desired.

In typical designs, the housing is manufactured using an injection molding process.

In advantageous embodiments, the housing is essentially cuboid-shaped, wherein the housing preferably comprises a top side and a bottom side opposite the top side and four side walls, wherein the top side preferably comprises the contact wall. In such an essentially cuboid-shaped housing, the top side is indirectly connected to the bottom side via the four side walls. The wording "essentially cuboid-shaped" is to be understood such that certain deviations from a pure cuboid shape, such as rounded edges or corners, are permitted. Alternatively, it is also possible for the housing to be not cuboid-shaped, but, for example, cylindrical.

In advantageous embodiments, the semiconductor package comprises a heat dissipation wall, wherein the underside preferably comprises the heat dissipation wall, and/or wherein the heat dissipation wall is suitable for dissipating heat generated during operation of the semiconductor circuit and/or during operation of the busbar system from the semiconductor package. In advantageous embodiments, the heat dissipation wall comprises a metallized layer. In typical embodiments, the heat dissipation wall is connected to the semiconductor circuit in an electrically insulated or electrically uninsulated manner.

In typical embodiments, the contact region, preferably the contact wall, comprises a plurality of individual contact surfaces, wherein the contact region, preferably the contact wall, preferably comprises four individual contact surfaces.

In advantageous embodiments, the plurality of individual contact surfaces comprises two chip contacts and/or two rail contacts, wherein the semiconductor package is preferably designed such that the chip contacts are suitable for being electrically connected to individual semiconductor elements of the semiconductor circuit and/or wherein the semiconductor package is preferably designed such that the rail contacts are suitable for being connected to a planar rail region of the semiconductor circuit, wherein the semiconductor elements are preferably arranged on the planar rail region. In advantageous embodiments, the semiconductor package comprises the semiconductor circuit and/or the planar rail region.

The inventors have found that such individual contact surfaces are advantageous because they allow the semiconductor circuit within the semiconductor package to be arranged on the rail region. The rail region can be, for example, a busbar or a DBC. The semiconductor elements in the semiconductor circuit can be connected to the current-carrying elements of the busbar system via this rail region and via the semiconductor elements themselves, namely via direct connections to the chip contacts. In other words, the fact that these individual contact surfaces are arranged in the contact wall, which can be, for example, the top side of the semiconductor package, enables the entire semiconductor circuit within the semiconductor package to be connected from above to the current-carrying elements of the busbar system when the semiconductor package is inserted into the receiving space. This simplifies the connection of the semiconductor circuit to the busbar system; for example, all individual contact surfaces can be connected to the busbar system in a single welding process. In typical embodiments, all terminals of the semiconductor circuit of the semiconductor package are arranged in the contact region, in particular in the contact wall.

In advantageous embodiments, the semiconductor package comprises a source contact pin and/or a gate contact pin, wherein the source contact pin and/or gate contact pin are preferably connected to control contacts of the semiconductor circuit and/or wherein the source contact pin and/or gate contact pin preferably protrude through the contact wall. In this way, the connections for the control electronics of the semiconductor circuit are also arranged in the region of the power connections of the semiconductor package, which further simplifies the connection of the semiconductor package to the busbar system.

The object is further achieved by a switch element comprising at least one, preferably at least two, semiconductor package(s) according to one of the previously described embodiments. The term "switch element" is to be understood in particular as referring to a topological switch implemented using semiconductor components such as transistors.

The object is further achieved by a power electronics system comprising at least one semiconductor package according to one of the previously described embodiments and/or at least one of the previously described switching elements. Such a "power electronics system" is understood to mean, in particular, an electronic bridge circuit, for example a B6 bridge with one semiconductor package according to the invention per switch, or a B2 bridge with two semiconductor packages according to the invention per switch, or a B6 bridge with two semiconductor packages according to the invention per switch. The power electronics system can also be a single half-bridge comprising two topological switches, each topological switch being formed by a semiconductor package according to the invention.

The object is further achieved by a vehicle comprising a semiconductor package according to the invention and/or a switch element according to the invention and/or a power electronics system according to the invention.

Short description of the drawings

• 1: eine schematische perspektivische Ansicht eines erfindungsgemässen Halbleiter-Pakets (schräge Draufsicht);
• 2: eine andere schematische perspektivische Ansicht des Halbleiter-Pakets aus 1 (schräge Unteransicht);
• 3: eine schematische Ansicht eines erfindungsgemässen Leistungselektroniksystems (Draufsicht);
• 4: eine schematische Seitenansicht Leistungselektroniksystems aus 3;
• 5: eine schematische perspektivische Ansicht des Leistungselektroniksystems aus 3 (schräge Unteransicht);
• 6: eine schematische Ansicht eines erfindungsgemässen Leistungselektroniksystems in einer zweiten Ausführungsform (Draufsicht);
• 7: eine schematische Ansicht eines erfindungsgemässen Leistungselektroniksystems in einer dritten Ausführungsform (Draufsicht); und
• 8: eine schematische Ansicht eines erfindungsgemässen Leistungselektroniksystems in einer vierten Ausführungsform (Draufsicht).

In the following, the invention is briefly explained with reference to drawings, in which:

• 1 : a schematic perspective view of a semiconductor package according to the invention (oblique top view);
• 2 : another schematic perspective view of the semiconductor package from 1 (oblique bottom view);
• 3 : a schematic view of a power electronics system according to the invention (top view);
• 4 : a schematic side view of the power electronics system from 3 ;
• 5 : a schematic perspective view of the power electronics system from 3 (oblique bottom view);
• 6 : a schematic view of a power electronics system according to the invention in a second embodiment (top view);
• 7 : a schematic view of a power electronics system according to the invention in a third embodiment (top view); and
• 8 : a schematic view of a power electronics system according to the invention in a fourth embodiment (top view).

Description of preferred embodiments

1 shows a schematic perspective view of a semiconductor package 1 according to the invention in a first embodiment. The semiconductor package 1 comprises a housing 2. A top side of the housing 2 is shown, which comprises two rail contacts 3.1, 3.2 and two chip contacts 4.1, 4.2. Furthermore, the semiconductor package 1 comprises a source contact pin 5 and a gate contact pin 6. The 1 The top side of the housing 2 shown in an oblique plan view thus shows a contact area of the semiconductor package 1, wherein this contact area is designed as a contact wall and comprises a plurality of electrical connections, namely the rail contacts 3.1, 3.2, the chip contacts 4.1, 4.2, the source contact pin 5 and the gate contact pin 6. An interior of the semiconductor package is shown in 1 not visible. It can be imagined that the rail contacts 3.1, 3.2 inside the housing 2 can be conductively connected to a planar rail region on a base of the housing 2. Various semiconductor elements can then be placed onto this rail region, which can thus be connected via the rail contacts 3.1, 3.2 to a conductor system located outside the housing, for example a busbar system, which can then be connected via the rail contacts 3.1, 3.2. These semiconductor elements as a whole can form the semiconductor circuit, which can be arranged in the semiconductor package 1, in particular inside the housing 2. These semiconductor elements of the semiconductor circuit can then be contacted directly, i.e. without the detour via the planar rail region, using the chip contacts 4.1, 4.2. In other words, the chip contacts 4.1, 4.2 are suitable for being electrically connected to individual semiconductor elements of the semiconductor circuit, in particular directly and/or without detours via other components.

The source contact pin 5 and the gate contact pin 6 protrude from the interior of the housing 2 through the contact wall of the housing 2. On the inside of the housing 2, the contact pins 5, 6 are typically connected to control contacts of the semiconductor circuit. 1 In the embodiment shown, the contact pins 5, 6 are arranged spatially separated from one another. Alternatively, it is also possible to arrange the contact pins 5, 6 next to one another, for example, at a distance of at most 12 mm, preferably at most 8 mm, advantageously at most 4 mm.

2 shows another schematic perspective view of the semiconductor package 1 from 1 , namely an oblique bottom view. The 1 Housing 2 shown from above is in 2 i.e. seen from below. It can be seen that the housing 2 comprises a metallization 7 on its outer underside. With the help of the metallization 7, heat that arises within the semiconductor package 1 can be advantageously transferred to a 2 The underside of the housing 2, on which the metallization 7 is arranged, can also be referred to as a heat dissipation wall. 2 The metallization 7 shown is rectangular and can be made of copper, a copper alloy, a copper ceramic, or another metal. 2 the contact pins 5, 6 can still be seen, which protrude through the top of the housing 2 and thus in the 2 shown view pointing downwards.

3 shows a schematic view of a power electronics system 8 according to the invention in plan view. The power electronics system 8 comprises two semiconductor packages 1 according to the invention, which are arranged in 3 shown embodiment are identical, which is why they are designated by the same reference numeral, namely the reference numeral "1". The semiconductor packages 1 correspond in typical embodiments to the 1 and 2 shown semiconductor package 1. The semiconductor packages 1 are arranged in receiving locations of a busbar system. The busbar system comprises an AC busbar 9, a positive DC busbar 10 and a negative DC busbar 11. The positive DC busbar 10 is typically connected to the positive pole of a 3 not shown Battery. The negative DC busbar 11 is typically connected to the negative terminal of this battery. The AC busbar 9 is connected, for example, to an electric motor that can drive a vehicle. The task of the semiconductor packages 1 in this configuration is to convert the direct current provided by the battery into an alternating current and to make this available in the AC busbar 9. The contacts between the semiconductor packages 1 and the AC busbar 9 are established via the contact clips 12.1, 12.2, 12.3 and via the AC busbar 9 itself. In other words, the AC busbar 9 contacts the rail contact of the 3 lower semiconductor package 1, the contact clip 12.1 contacts the upper rail contact of this semiconductor package 1, and the contact clips 12.2, 12.3 contact the chip contacts of the upper semiconductor package 1. In addition, the busbar system in 3 and in particular, the negative DC busbar 11 also has two contact clips 13.1, 13.2. These contact clips 13.1, 13.2 contact the chip contacts of the lower semiconductor package 1 from the left and right. The positive DC busbar 10 is directly conductive with one of the rail contacts of the semiconductor package 1, which is in 3 The combination of the two semiconductor packages 1 and the busbar system is arranged on a cooling element 14. Waste heat generated within the semiconductor packages 1 is dissipated to this cooling element 14. Since the busbar system is also connected to the semiconductor circuit inside the semiconductor packages 1 via the large-area contact clips or the busbars themselves, this busbar system is also cooled by the cooling element 14.

4 shows a schematic side view of the power electronics system 8 from 3 . In 4 The two semiconductor packages 1 are again shown. It can be seen that both semiconductor packages 1 are arranged on the cuboid-shaped cooling element 14, so that the rear-side metallizations of the semiconductor packages 1 are in contact with the cooling element 14. This is shown in 4 However, it is not recognizable. In 4 The busbar system is also shown, which includes in particular the AC busbar 9, the positive DC busbar 10 and the negative DC busbar 11. As for the other 4 As regards the components of the power electronics system 8 shown, reference is made to the preceding figures, in particular 3 , referred to.

5 shows a schematic perspective view of the power electronics system 8 from 3 in an oblique view from below. In 5 The two semiconductor packages 1 are shown again. The cooling element 14 is in 5 not shown. This shows that each semiconductor package 1 comprises a metallization 7 on its respective underside. Of the busbar system, below which the two semiconductor packages 1 are arranged, 5 The AC busbar 9, the positive DC busbar 10 and the negative DC busbar 11 are shown. In addition, 5 a first insulation film 15 and a second insulation film 16 are shown. The first insulation film 15 electrically insulates the semiconductor packages 1 from the busbars 9, 10, 11. The second insulation film 16 insulates the negative DC busbar 11 from the AC busbar 9.

6 shows a schematic view of a power electronics system 8.1 according to the invention in a second embodiment in plan view. The power electronics system 8.1 in 6 can be described as a B2 bridge with two semiconductor packages 1 per switch. In other words, two semiconductor packages 1 form a topological switch, which can also be referred to as a switching element.

7 shows a schematic view of a power electronics system 8.2 according to the invention in a third embodiment in plan view. In particular, 7 a B6 bridge with one semiconductor package 1 per switch is shown.

8 shows a schematic view of a power electronics system 8.3 according to the invention in a fourth embodiment. In particular, 8 a power electronics system 8.3 with a total of twelve identical semiconductor packages 1 is shown. For the sake of clarity, only one of these twelve identical semiconductor packages 1, namely the one located at the bottom right, is designated with the reference symbol "1". 8 The embodiment of the power electronics system 8.3 shown can be described as a B6 bridge with two semiconductor packages 1 per switching element. In particular, the embodiment in 8 a full-bridge module with three phases, which comprises two semiconductor packages 1 per switch and which is suitable, for example, to drive a three-phase motor.

The invention is not limited to the described embodiments. The scope of protection is defined by the patent claims.

Reference symbol

1

Semiconductor package

2

Housing

3.1, 3.2

Rail contacts

4.1, 4.2

Chip contacts

5

Source contact pin

6

Gate contact pin

7

Metallization (of the heat dissipation wall)

8, 8.1, 8.2, 8.3

Power electronics system

9

AC busbar

10

positive DC busbar

11

negative DC busbar

12.1, 12.2, 12.3

Contact clips (of the AC busbar)

13.1, 13.2

Contact clips (of the negative DC busbar)

14

Cooling element

15

first insulation film

16

second insulation film

Claims (10)

Semiconductor package (1), wherein the semiconductor package (1) is suitable for receiving a semiconductor circuit, wherein the semiconductor package (1) is suitable for being inserted into a receiving location of a busbar system, wherein the semiconductor package (1) comprises a contact region, characterized in that the contact region is suitable for mediating a plurality of electrical connections between the busbar system and the semiconductor circuit when the semiconductor package (1) is inserted into the receiving location. Semiconductor package (1) to Claim 1 , characterized in that the semiconductor package (1) comprises a housing (2), wherein the housing comprises the contact region, wherein the contact region is preferably a contact wall. Semiconductor package (1) to Claim 2 , characterized in that the housing (2) is substantially cuboid-shaped, wherein the housing (2) preferably comprises an upper side and a lower side opposite the upper side and four side walls, wherein the upper side preferably comprises the contact wall. Semiconductor package (1) according to one of the preceding claims, characterized in that the semiconductor package (1) comprises a heat dissipation wall, - wherein the underside preferably comprises the heat dissipation wall, and/or - wherein the heat dissipation wall is suitable for dissipating heat generated during operation of the semiconductor circuit and/or during operation of the busbar system from the semiconductor package (1). Semiconductor package (1) according to one of the preceding claims, characterized in that the contact region, preferably the contact wall, comprises a plurality of individual contact surfaces (3.1, 3.2, 4.1, 4.2), wherein the contact region, preferably the contact wall, preferably comprises four individual contact surfaces (3.1, 3.2, 4.1, 4.2). Semiconductor package (1) to Claim 5 , characterized in that the plurality of individual contact surfaces (3.1, 3.2, 4.1, 4.2) comprises two chip contacts (4.1, 4.2) and/or two rail contacts (3.1, 3.2), wherein the semiconductor package (1) is preferably designed such that the chip contacts (4.1, 4.2) are suitable for being electrically connected to individual semiconductor elements of the semiconductor circuit and/or wherein the semiconductor package (1) is preferably designed such that the rail contacts (3.1, 3.2) are suitable for being connected to a planar rail region of the semiconductor circuit, wherein the semiconductor elements are preferably arranged on the planar rail region. Semiconductor package (1) according to one of the preceding claims, characterized in that - the semiconductor package (1) comprises a source contact pin (5) and/or a gate contact pin (6), - wherein the source contact pin (5) and/or the gate contact pin (6) are preferably connected to control contacts of the semiconductor circuit, and/or - wherein the source contact pin (5) and/or the gate contact pin (6) preferably protrude through the contact wall. Switch element comprising at least one, preferably at least two semiconductor packages (1) according to one of the preceding claims. Power electronics system (8), comprising at least one switch element according to Claim 8 and/or at least one semiconductor package (1) according to one of the Claims 1 until 7 . Vehicle comprising a plurality of semiconductor packages (1) according to one of the Claims 1 until 7 and/or a plurality of switch elements according to Claim 8 and/or a power electronics system (8) according to Claim 9 .