DE102011113642B4 - Method of manufacturing a semiconductor device using a subcarrier - Google Patents

Abstract

Method for producing a semiconductor component with a thinned substrate, in which - an auxiliary carrier (8) is provided with openings (9) passing through it, - a semiconductor substrate (1) provided for the semiconductor component is fixed on the auxiliary carrier (8) by means of a connecting layer (17) In that a material is used for the connection layer (17) with which the connection between the semiconductor substrate (1) and the auxiliary carrier (8) is maintained at temperatures in the range from 250 ° C. to 400 ° C., - the semiconductor substrate (1) is processed by a side facing away from the auxiliary carrier (8) side and - the connecting layer (17) with a through the openings (9) of the subcarrier (8) introduced means at least as far removed that the connection between the semiconductor substrate (1) and the subcarrier (8) is achieved, characterized in that - the connecting layer (17) is a semiconductor layer, - the subcarrier (8) lower externally comprising a material with respect to which the bonding layer (17) can be selectively removed, and - the means introduced through the openings (9) of the subcarrier (8) selectively removes the bonding layer (17) with respect to the subcarrier (8).

Description

The present invention relates to the fabrication of semiconductor devices wherein a substrate is temporarily connected to a submount to facilitate handling, particularly when the substrate is thinned.

The processing of semiconductor wafers of a thickness of less than 400 microns is particularly difficult because of the risk of breakage and strong warping. For the production of semiconductor devices on very thin substrates, a thick semiconductor wafer is first used, which is later thinned. Before the thinning, the semiconductor wafer is connected to an auxiliary carrier, in particular to a further semiconductor wafer designated as a handling wafer. The subcarrier is removed after the semiconductor wafer has been thinned out, optionally after further process steps, and after the semiconductor components have been singulated, in a complex process by back grinding and etching.

In DE 101 56 465 C1 a method for producing a high-temperature-stable, redetachable connection between semiconductor substrates is described, in which a bonding compound by use of a flow glass containing silicon dioxide, in particular Borphosphorsilikatglas is formed.

In DE 100 55 763 A1 A method of making a high temperature resistant and redetachable bond between two wafers is described. In at least one of the wafer surfaces trenches or a plurality of through holes are formed, which facilitate a later separation process.

In US 2005/0173064 A1 It is described how a semiconductor wafer can be mounted on a carrier and detached after a backside thin grinding. The semiconductor wafer is glued on a perforated carrier plate. The adhesive layer used for this purpose is dissolved after thinning the semiconductor wafer with an alcohol, which is introduced into the openings of the carrier plate. This method is not applicable when the wafer bonded to the support plate is exposed to temperatures above 250 ° C, for example in a CMOS process, and the adhesive layer is not suitable for such high temperatures.

In DE 100 47 963 A1 a process for the production of a thin-film component is described comparable to the method described above, in which additionally an insulating layer of SiO ₂ , interconnect layers and solder bumps are arranged in an adhesive and Kontaktpfropfen in a semiconductor layer.

In WO 03/094224 A1 the transfer of GaN layers from a donor substrate to a support is described wherein peeling occurs by dissolution of a compound layer. A plurality of etchants are provided for patterning a layer sequence comprising the monocrystalline silicon support, a SiO ₂ bilayer, a monocrystalline silicon thin film, and the GaN layer.

The object of the present invention is to specify how an auxiliary carrier can be connected to a semiconductor substrate in a temperature-stable manner and detached therefrom with little effort.

This object is achieved by the method for producing a semiconductor component having the features of claim 1. Embodiments emerge from the dependent claims. The features of the preamble of the main claim are, for example, from the DE 101 56 465 C1 known.

In the method, an auxiliary carrier is provided with openings or perforations passing therethrough. A semiconductor substrate provided for the semiconductor device is fixed on the submount by means of a connection layer. The semiconductor substrate is processed by a side remote from the auxiliary carrier, for example, thinned and / or subjected to further process steps. The connection layer is then removed, at least to the extent that it has a means introduced through the openings of the auxiliary carrier, so that the connection between the semiconductor substrate and the auxiliary carrier is released. For the interconnect layer, a material is used with which the connection between the semiconductor substrate and the subcarrier is maintained at temperatures in the range of 250 ° C to 400 ° C.

The connection layer is a semiconductor layer, and the auxiliary carrier has at least externally a material with respect to which the connection layer can be selectively removed. The means introduced through the openings of the subcarrier is selected to selectively remove the sublayer from the subcarrier.

In embodiments of the method, the connection layer is a semiconductor layer, and the auxiliary carrier is made of a semiconductor material. On the surfaces of the subcarrier, an oxide layer is formed before the subcarrier is connected to the semiconductor substrate. The semiconductor layer and the auxiliary carrier may in particular comprise the same semiconductor material, for example silicon, and the Oxide layer may be an oxide of this semiconductor material, for example silicon dioxide. The means introduced through the openings of the auxiliary carrier is chosen such that it removes the semiconductor material of the connecting layer selectively with respect to the oxide layer of the auxiliary carrier.

In further embodiments of the method, a cover layer is arranged between the connection layer and the semiconductor substrate, and the means introduced through the openings of the auxiliary carrier also selectively removes the connection layer with respect to the cover layer. The covering layer can be, for example, an oxide or nitride of the semiconductor material or a passivation customary in semiconductor components.

In further embodiments of the method, conductor surfaces are arranged between the semiconductor substrate and the cover layer, and the connection layer is applied to the cover layer. Terminal openings are made over the conductor surfaces in the interconnect layer and in the cap layer before the submount is connected to the semiconductor substrate.

In further embodiments of the method, the semiconductor substrate is provided with a component layer and a wiring layer prior to connection to the auxiliary carrier, and the connection layer is arranged on the side of the wiring layer facing away from the semiconductor substrate.

The following is a more detailed description of examples of the semiconductor device and the manufacturing method with reference to the attached figures.

The 1 shows a section of a cross section through a semiconductor substrate provided for the production of semiconductor devices.

The 2 shows a section of a cross section through a suitable for the process subcarrier.

The 3 shows a section of a cross section through an arrangement of the semiconductor substrate in conjunction with the subcarrier.

The 4 shows a section of a cross section according to the 3 after thinning the semiconductor substrate and further process steps.

The 5 shows a section of a cross section through an arrangement of the semiconductor substrate in conjunction with another carrier.

The 6 shows a section of a cross section through an arrangement according to the 5 after removing the subcarrier.

The 7 shows a section of a cross section according to the 6 after separating the components and removing the other carrier.

The 8th shows a section of a cross section through a semiconductor substrate for a further embodiment of the method.

The nine shows a section of a cross section through a provided for the further embodiment subcarrier.

The 10 shows a section of a cross section through an arrangement of the semiconductor substrate in conjunction with the subcarrier for the further embodiment.

The 11 shows a section of a cross section according to the 10 after thinning the semiconductor substrate and further process steps.

The 12 shows a section of a cross section through an arrangement of the semiconductor substrate in conjunction with another carrier.

The 13 shows a section of a cross section through an arrangement according to the 12 after removing the subcarrier.

The 14 shows a section of a cross section according to the 13 after separating the components and removing the other carrier.

The 1 shows a section of a cross section of a semiconductor substrate 1 , which is intended for the manufacture of semiconductor devices and may be, for example, silicon. At a front 21 may include circuit components in the semiconductor substrate 1 or in a device layer applied thereto 2 that may be epitaxially grown, for example. The circuit components may be transistors, for example 3 a CMOS circuit. Over it can be a wiring layer 4 may be present, for example, having structured metal layers or interconnects in an intermetal dielectric as well as vertical vias interconnecting the metal planes or interconnects. On the from the semiconductor substrate 1 remote top of the wiring layer 4 can conductor surfaces 5 be provided for an external electrical connection. A cover layer 6 can be applied as a passivation. The cover layer 6 In particular, an oxide of the semiconductor material, a nitride of the semiconductor material or both an oxide and a nitride of the semiconductor material may have.

In this embodiment, it may be advantageous on the front 21 an etch stop layer 7 from a material which has sufficient resistance to a solvent or etchant used in a later process step and a sufficient protection of the semiconductor substrate 1 and the components formed thereon from attacking this agent. The etch stop layer 7 may be single-ply or multi-ply and in this embodiment is considered as a proportion of a bonding layer, which will be described below.

The backside 22 of the semiconductor substrate 1 may be provided with auxiliary layers to improve handling. Such auxiliary layers are not essential to the process and are not specifically shown in the figures.

The 2 shows a cross section of a subcarrier 8th which may, for example, be another semiconductor substrate, in particular a silicon wafer. The subcarrier 8th is with through openings nine provided so that the openings nine transverse to the areal extent of the subcarrier 8th run and from an outer main page 23 of the subcarrier 8th to the opposite main page 24 pass. If the subcarrier 8th made of semiconductor material, the openings can nine be produced by means of a masked etching process customary in semiconductor technology.

The material of the subcarrier 8th is preferably chosen so that the subcarrier 8th when heated at least approximately as much as the semiconductor substrate expands 1 , It is therefore expedient if the thermal expansion coefficients of the semiconductor substrate 1 and the subcarrier 8th are equal or at least not substantially different. In a semiconductor substrate 1 made of silicon is an auxiliary carrier 8th made of silicon, glass or ceramic particularly suitable.

It is known to permanently connect semiconductor substrates by means of a connecting intermediate layer. Such processes are referred to as bonding processes and are used, for example, to produce silicon-on-insulator (SOI) substrates. A per se known bonding method can also be used to the semiconductor substrate 1 according to the 1 with the subcarrier 8th according to the 2 by means of a connecting intermediate layer, hereinafter and in the claims referred to as bonding layer to connect. The bonding layer can be on the front 21 of the semiconductor substrate 1 be applied or on with the semiconductor substrate 1 main page to be connected 24 of the subcarrier 8th or also proportionally both on the semiconductor substrate 1 as well as on the subcarrier 8th , The bonding layer can be produced in one or more layers, from only one material or also from at least two different materials.

The 3 shows a cross section through an arrangement of the subcarrier 8th on the semiconductor substrate 1 , The semiconductor substrate 1 and the subcarrier 8th are by means of a bonding layer 17 connected to each other, in this embodiment, the aforementioned Ätzstoppschicht 7 and a bonding layer 10 includes. The bond layer 10 is a semiconductor material and may be single-layer or multi-layer.

The in the 3 dashed borderline 11 marks the interface up to which the semiconductor substrate 1 from the back 22 to be thinned. The semiconductor substrate 1 may be thinned as needed, typically about one-third or one-quarter of the original thickness, for example, from a thickness of about 725 microns to a thickness of about 200 microns. After thinning, further process steps may optionally follow, with which the semiconductor substrate 1 from the back 22 is processed. However, the method described here can also be used if the semiconductor substrate 1 not thinned, but should be processed in other ways from the back, the subcarrier 8th in any case facilitates the handling.

The 4 shows a cross section according to the 3 after thinning the semiconductor substrate 1 and after further process steps in which a backside ladder structure 12 as rewiring (backside redistribution layer) and associated vias 13 through the semiconductor substrate 1 have been produced. The ladder structure 12 and the vias 13 are shown as an example only; instead, other structures may be complementary to the devices on the back side of the semiconductor substrate 1 be formed.

The 5 shows a cross section through an arrangement of the subcarrier 8th provided semiconductor substrate 1 on a carrier 15 that in this example with a sticky foil 14 is provided and otherwise shown only schematically. At the carrier 15 it may be a conventional carrier tape on which the semiconductor substrate 1 is temporarily attached, or a so-called chuck, which serves as a holder of substrates. Through the openings nine of the subcarrier 8th a solvent or etchant is introduced, with which the bonding layer 10 Will get removed. In the 5 is that with the etching holes 16 indicated that among the openings nine are drawn. The etchant may be, for example, HF gas, which is preferably introduced dry, so that no liquid film is formed, on which the detached subcarrier 8th or dissolved particles could adhere. The etching process is performed by the etch stop layer 7 stopped so that on the semiconductor substrate 1 formed component structures are not attacked. If the cover layer 6 provides adequate protection against the etch attack may be on the etch stop layer 7 be waived.

The 6 shows a cross section through an arrangement according to the 5 after removing the subcarrier 8th , The subcarrier 8th For example, it may be obtained from the semiconductor substrate using a device commonly used in semiconductor technology, for example, a robot 1 be lifted off. Then, if necessary, the etch stop layer 7 be removed, and in the topcoat 6 can openings over terminal contact surfaces of the conductor surfaces 5 getting produced. The components can then be singulated by the semiconductor substrate 1 is divided. The vertical dashed line in 6 is an example drawn dividing line between adjacent components.

The 7 shows a cross section according to the 6 after separating the components and removing the carrier 15 , The components have a particularly thin semiconductor substrate 1 on, which was made possible by the use of the described method with little effort.

The 8th shows a section of a cross section through a semiconductor substrate provided for the semiconductor substrate for a further embodiment in which as a connection layer 17 According to the invention, a semiconductor layer is used. The connection layer 17 can be made of silicon, for example, in particular by means of PECVD (plasma-enhanced chemical vapor deposition). Before connecting the semiconductor substrate 1 with a subcarrier, the bonding layer thus prepared is formed 17 planarized. Preferably already connection openings 18 in the connection layer 17 and in the topcoat 6 manufactured, with which terminal contact surfaces of the conductor surfaces 5 be exposed. The rest in the 8th Elements shown correspond to those in the 1 shown elements and are provided with the same reference numerals.

The nine shows a cross section through a subcarrier 8th , which is for the semiconductor substrate 1 according to the 8th is provided. The subcarrier 8th is with through openings nine provided so that the openings nine transverse to the areal extent of the subcarrier 8th run and from an outer main page 23 of the subcarrier 8th to the opposite main page 24 pass. In this embodiment, it is ensured that the subcarrier 8th at least externally comprising a material with respect to which the bonding layer 17 can be selectively removed. For this purpose, a subcarrier 8th be used in glass. Instead, the subcarrier 8th according to nine be made of a semiconductor material. On the surfaces of the subcarrier 8th of semiconductor material becomes an oxide layer 19 prepared before the subcarrier 8th with the semiconductor substrate 1 is connected. The oxide layer 19 can be advantageously formed by a thermal oxidation of the semiconductor material. If the subcarrier 8th Made of silicon, the oxide layer can 19 a thermally generated silica.

The 10 shows a section of a cross section through an arrangement of the semiconductor substrate 1 according to the 8th in conjunction with the subcarrier 8th according to the nine , A compound of the semiconductor material of the compound layer 17 with the oxide layer 19 of the subcarrier 8th can be produced by a conventional method of semiconductor technology, in particular, a bonding process. The in the 10 dashed borderline 11 marks the interface up to which the semiconductor substrate 1 from the back 22 to be thinned.

The 11 shows a cross section according to the 10 after thinning of the semiconductor substrate and further process steps for which the above description of the 3 and 4 mutatis mutandis applies. Also, this embodiment of the method can always be used to improve handling, regardless of which further steps for processing the semiconductor substrate 1 are provided.

The 12 shows a cross section through an arrangement of the subcarrier 8th provided semiconductor substrate 1 on a carrier 15 that in this example with a sticky foil 14 is provided and otherwise shown only schematically. At the carrier 15 it may be a conventional carrier tape on which the semiconductor substrate 1 is temporarily attached, or a so-called chuck, which serves as a holder of substrates. Through the openings nine of the subcarrier 8th a solvent or etchant is introduced with which the bonding layer 17 Will get removed. In the 12 is that with the etching holes 16 indicated under the openings nine are drawn.

If the connection layer 17 Silicon is and the oxide layer 19 is a silica, the tie layer may be 17 preferably be removed selectively by dry etching with SF ₆ or XeF ₂ with respect to the silicon oxide. Since these gases also selectively etch with respect to silicon nitride and aluminum, a cover layer applied as a passivation can be used 6 made of silicon nitride and conductor surfaces 5 made of aluminum, without a separate Ätzstoppschicht is necessary to limit the etching process.

The 13 shows a cross section through an arrangement according to the 12 after removing the subcarrier 8th , The subcarrier 8th For example, by using a robot from the semiconductor substrate 1 be lifted off. In this embodiment, connection openings are already after this process step 18 in the topcoat 6 via terminal contact surfaces of the conductor surfaces 5 present, so that the further process flow simplified in comparison to the embodiment described above. The components can then be singulated by the semiconductor substrate 1 is divided. The vertical dashed line in 13 is an example drawn dividing line between adjacent components.

The 14 shows a cross section according to the 13 after separating the components and removing the carrier 15 , The components have a particularly thin semiconductor substrate 1 on, which was made possible by the use of the described method with little effort.

With this method, semiconductor devices on thin substrates with backside structures can be produced particularly favorably, since the thinned substrates are always held on carriers in a shatterproof manner. The described method has the particular advantages that the connection between the semiconductor substrate and the auxiliary carrier is sufficiently temperature-stable and the auxiliary carrier can nevertheless be removed with little effort. Elaborate regrinding and etching of the auxiliary carrier are thus eliminated, and even after thinning of the semiconductor substrate further process steps can easily be carried out at temperatures above 250 ° C.

LIST OF REFERENCE NUMBERS

1

Semiconductor substrate

2

device layer

3

CMOS transistor

4

wiring layer

5

conductor surface

6

topcoat

7

etch stop layer

8th

subcarrier

9

opening

10

Bond layer

11

boundary line

12

conductor structure

13

via

14

cling film

15

carrier

16

etching hole

17

link layer

18

port opening

19

oxide

21

Front side of the semiconductor substrate

22

Rear side of the semiconductor substrate

23

Main page of the subcarrier

24

opposite main side of the subcarrier

Claims (5)

Method for producing a thinned-substrate semiconductor device, in which - an auxiliary carrier ( 8th ) with openings ( nine ), - a semiconductor substrate provided for the semiconductor component ( 1 ) by means of a bonding layer ( 17 ) on the subcarrier ( 8th ), - for the connection layer ( 17 ) a material is used with which the connection between the semiconductor substrate ( 1 ) and the subcarrier ( 8th ) is maintained at temperatures in the range of 250 ° C to 400 ° C, - the semiconductor substrate ( 1 ) of one of the subcarrier ( 8th ) is turned away from the side and - the connecting layer ( 17 ) with one through the openings ( nine ) of the subcarrier ( 8th ) is at least as far removed that the connection between the semiconductor substrate ( 1 ) and the subcarrier ( 8th ), characterized in that - the connection layer ( 17 ) is a semiconductor layer, - the subcarrier ( 8th ) at least externally comprises a material with respect to which the bonding layer ( 17 ) can be removed selectively, and - through the openings ( nine ) of the subcarrier ( 8th ) introduced the compound layer ( 17 ) selectively with respect to the subcarrier ( 8th ) away. Method according to Claim 1, in which the subcarrier ( 8th ) is a semiconductor material and on surfaces of the auxiliary carrier ( 8th ) an oxide layer ( 19 ) is formed before the subcarrier ( 8th ) with the semiconductor substrate ( 1 ) is connected. Method according to claim 1 or 2, in which - between the connection layer ( 17 ) and the semiconductor substrate ( 1 ) a cover layer ( 6 ) and - through the openings ( nine ) of the subcarrier ( 8th ) introduced the compound layer ( 17 ) also selectively with respect to the cover layer ( 6 ) away. Method according to claim 3, in which - conductor surfaces ( 5 ) between the semiconductor substrate ( 1 ) and the cover layer ( 6 ) to be ordered, The connection layer ( 17 ) on the topcoat ( 6 ) is applied and connection openings ( 18 ) over the conductor surfaces ( 5 ) in the connection layer ( 17 ) and the cover layer ( 6 ) before the subcarrier ( 8th ) with the semiconductor substrate ( 1 ) is connected. Method according to one of Claims 1 to 4, in which the semiconductor substrate ( 1 ) before connecting to the submount ( 8th ) with a component layer ( 2 ) and a wiring layer ( 4 ) and the connection layer ( 17 ) on the side facing away from the semiconductor substrate side of the wiring layer ( 4 ) is arranged.

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