DE102011004080A1 - Heterostructure buffer layer for heterostructure field effect transistors - Google Patents

Abstract

The invention relates to a heterostructure field effect transistor (HFET) with a substrate (201), a nucleation layer (202) arranged on the substrate (201), a carbon-doped GaN layer (203) arranged on the nucleation layer (202), and one on the carbon-doped GaN layer (203) arranged first AlGaN layer (204) and on the first AlGaN layer (204) arranged source electrode (205), a drain electrode (206) arranged on the first AlGaN layer (204) and a gate electrode (207) arranged between the source electrode (205) and the drain electrode (206) on the first AlGaN layer (204). According to the invention, an unintentionally doped GaN layer is provided between the carbon-doped GaN layer (203) and the first AlGaN layer (204). A second aspect of the invention relates to a method for producing such an HFET.

Description

Technical area

The invention relates to a heterostructure field effect transistor with a novel heterostructure buffer layer and a method for its production.

State of the art

Heterostructure Field Effect Transistors (HFETs), also known as High Electron Mobility Transistors (HEMTs), are used particularly for high frequency applications requiring relatively high electrical power. Particular attention is currently focused on AlGaN / GaN HFETs, ie on HFETs that combine an aluminum gallium nitride layer and a gallium nitride layer, at their boundary layer, a so-called two-dimensional electron gas (2DEG) with the typical for HFETs and desirable high charge carrier mobility.

When developing a HFET, there are a variety of parameters to consider, but there are often interdependencies between them. In addition, various doping materials are used, which mitsichbringen different advantages and disadvantages. The invention addresses some issues that may affect the properties of a HFET.

Thus, when using a GaN buffer layer ("buffer"), the drain-source current may leave the transistor channel due to the small barrier between the transistor channel and the GaN buffer and flow at least partially through the GaN buffer. In contrast, in the prior art either acceptors are introduced into the GaN buffer, iron (Fe) or carbon (C) usually being used, or else a so-called "polarization engineered back barrier layer" (also abbreviated to "back barrier") alone or provided together with the GaN buffer layer. In the latter approach, AlGaN or InAlGaN and InGaN channels can be used.

However, these two approaches each have specific disadvantages. The control of the doping profile of an Fe doping in the GaN buffer is difficult, which can lead to an undesired variation of the device parameters in the production. When using a C-doping, however, there is an undesirable current dispersion due to the traps in the GaN buffer layer. By contrast, the back-barrier-based approaches lead to a relatively low breakdown voltage of the HFET compared to the doping with Fe or C. However, a poor thermal conductivity of the back barrier is added to this problem when using a thick AlGaN "back barrier" ,

A related problem that can arise with the use of an undoped GaN or AlGaN buffer is the limited isolation between the transistor channel and a conductive substrate. Again, the approaches mentioned above can provide a remedy, but the use of a "back barriers" higher isolation between the transistor channel and substrate causes as the Fe or C-doped GaN buffer.

The above-mentioned current dispersion in a C-doped GaN buffer is i.a. a. caused by defects on the surface of the AlGaN barrier and / or in the GaN buffer layer. The dispersion caused by the surface states in the AlGaN barrier can be improved by passivation of the AlGaN surface, for example by application of a SiN (silicon nitride) or an SiO 2 (silicon dioxide) layer. However, this in turn has the disadvantage that a current dispersion caused by the buffer layer can not be reduced. To achieve this, very high quality GaN must be produced during epitaxial growth, but this precludes the above-mentioned Fe or C dopants.

The use of a "back barrier" can also suppress the current dispersion, as this can effectively confine electrons to the 2DEG, but brings with it the disadvantages discussed above.

In addition to all these aspects, there is a need for self-blocking HFETs, however, for the realization of which the surface charge density must be greatly reduced in comparison to the conventional normally-conducting AlGaN / GaN-HFETs. For this purpose, for example, approaches with recessed gates or with a combination of a magnesium-doped p-GaN and an n-AlGaN layer are known. However, these approaches suffer from the problematic control of the etch depth of the gate embedded in the AlGaN layer and thus a strong variation in the threshold voltage of the HFET or under undesired memory effects by the magnesium in the p-GaN or n-AlGaN layer.

The various known in the prior art attempts to solve certain problems of HFETs, so in each case again disadvantages and partially mutually exclusive. There is therefore still a need for a preferably self-blocking HFET having low current dispersion, low leakage current and high vertical and lateral breakdown voltage.

Summary of the invention

A first aspect of the invention therefore introduces a heterostructure field effect transistor which can solve one or more of the above problems. The HFET of the invention has a substrate having a nucleation layer disposed thereon, a carbon-doped GaN layer disposed on the nucleation layer, a first AlGaN layer disposed on the carbon-doped GaN layer, and source, drain, and gate disposed on the first AlGaN layer electrodes. According to the invention, an unintentionally doped ("UID") GaN layer is additionally provided between the carbon-doped GaN layer and the first AlGaN layer.

The invention provides a high breakdown voltage, minimized current dispersion HFET by combining a carbon doped GaN layer with a channeled unintentionally doped GaN layer. The use of such a UID GaN channel with a C-doped GaN layer is not known in the prior art. Therefore, prior art approaches to increasing the breakdown strength based on a C-doped GaN layer with increasing carbon concentrations suffer from a significant dip in current and increased current dispersion. The UID GaN channel according to the invention solves this problem by separating the traps in the carbon-doped GaN layer from the charge carriers in the conductive channel.

By adjusting the thickness of the UID GaN layer, the breakdown voltage and the current dispersion can be controlled. However, it is disadvantageous that the thickness of the UID GaN layer influences breakdown voltage and current dispersion in opposite directions. The thicker the UID GaN layer, the lower the dispersion, but the lower the breakdown voltage.

In a preferred embodiment of the invention, therefore, an AlN (aluminum nitride) layer is provided between the carbon-doped GaN layer and the unintentionally-doped GaN layer. The AlN layer is preferably made thin and forms a polarization-induced barrier that limits the flow of current to the GaN channel. However, such an AlN layer, preferably having a thickness measuring only a few monolayers, can be formed only by using special crystal growth techniques such as. As the molecular beam epitaxy are generated. Thus, the HFET of this embodiment of the invention can not be produced in common production lines where metal-organic vapor phase epitaxy methods are commonly used. Also, carbon or silicon doping in very thin AlN is difficult.

Therefore, a second embodiment of the invention is particularly preferred in which a second AlGaN layer is provided between the carbon-doped GaN layer and the unintentionally doped GaN layer.

The second AlGaN layer acts as a "back barrier" under the UID GaN channel. As a result of the polarization effect, the second AlGaN layer builds up a potential in the direction of the carbon-doped GaN layer, which prevents the charge carriers from penetrating into the carbon-doped GaN layer. The contribution of the second AlGaN layer is similar to that of a UID GaN channel, but is more effective because of a polarization-induced barrier. In addition, the interdependence between the breakdown voltage and the current dispersion can be overcome by adjusting the Al content in the second AlGaN layer. Increasing the aluminum content while increasing the concentration of carbon doping in the carbon-doped GaN layer enhances the confinement of the carriers, while the thickness of the UID GaN film can be kept constant. This means that a high breakdown voltage combined with a low current dispersion can be achieved.

In this case, the second AlGaN layer is particularly preferably doped. By carbon doping, the resistance of the carbon-doped GaN layer disposed under the second AlGaN layer can be increased. Although this can have a negative effect on the current dispersion, it significantly increases the breakdown voltage, so that such an HFET is particularly suitable for circuit breakers. In the case of silicon doping, the charge carriers in the second AlGaN layer change into the conductive channel, which leads to an advantageous increase in the surface charge density.

The heterostructure field effect transistor is preferably a self-blocking transistor. The control of the carbon doping allows the surface charge density to be adjusted, resulting in the desired threshold voltage. The problems of the previously known approaches, such as damage to the electron channel by dry etching processes, which impairs the quality of the HFET, or a lack of reproducibility of the properties of the HFET are successfully avoided. Also, the self-blocking HFET of the invention does not suffer from an undesirably high current dispersion because the UID GaN layer and the second AlGaN layer result in separation of the 2DEG from the charge carrier carbon atoms of the carbon-doped GaN layer, which otherwise cause current dispersion would, leads.

A second aspect of the invention introduces a method of fabricating a heterostructure field effect transistor according to the previous aspect of the invention. The process has at least the following steps:
Applying a nucleation layer to a substrate;
Applying a carbon-doped GaN layer to the nucleation layer;
Applying an unintentionally doped GaN layer;
Applying a first AlGaN layer to the unintentionally doped GaN layer; and
Depositing a source electrode, a drain electrode and a gate electrode arranged between the source electrode and the drain electrode onto the first AlGaN layer.

The method may include a step of depositing an AlN layer on the carbon-doped GaN layer between the step of depositing the carbon-doped GaN layer and the step of depositing the unintentionally-doped GaN layer.

Alternatively, the method may also include a step of applying a second AlGaN layer to the carbon-doped GaN layer between the step of depositing the carbon-doped GaN layer and the step of depositing the unintentionally-doped GaN layer.

In this case, the method particularly preferably has an additional step of doping the second AlGaN layer, preferably a step of doping the second AlGaN layer with carbon or silicon.

Brief description of the pictures

The invention is explained in more detail below with reference to figures. Show it:

1 an HFET according to the prior art, and

2 a preferred embodiment of the HFETs of the invention.

Detailed description of the pictures

As far as in the description of the figures or in other parts of the description of the invention it is mentioned that a first element or a first layer is disposed on a second element or a second layer, this does not exclude that between the first element or the first layer on the one hand and the second element or the second layer on the other hand, one or more further elements or layers are provided.

1 shows a HFET according to the prior art. On a substrate 101 which may be a SiC, sapphire or silicon substrate, for example, is a nucleation layer 102 which shows the crystal growth of a GaN layer 103 should favor. At the boundary layer between the GaN layer 103 and an AlGaN layer 104 A 2DEG is formed in a known manner, which is located between on the AlGaN layer 104 applied source and drain electrodes 105 respectively 106 extends and through one on a likewise on the AlGaN layer 104 between the source and drain electrodes 105 . 106 arranged gate electrode 107 applied gate voltage, which causes the desired transistor property. Optionally, a passivation layer 110 on the AlGaN layer 104 be applied, the z. B. may be a SiN layer.

2 shows a preferred embodiment of the HFET of the invention. The Elements 201 . 202 . 203 . 204 . 205 . 206 . 207 and 210 correspond to the elements 101 . 102 . 103 . 104 . 105 . 106 . 107 and 110 of the 1 in essence, so that what is said there also for the 2 unless otherwise stated below.

The GaN layer 203 is carbon doped in the HFETs of the invention to achieve the breakthrough voltage advantages described. The GaN layer 203 however, unlike the prior art HFETs, does not touch the (first) AlGaN layer 204 because there is between the two layers 203 and 204 at least one unintentionally doped GaN layer 208 is arranged. In the particularly preferred embodiment of 2 is also an additional between the unintentionally doped GaN layer 208 and the carbon-doped GaN layer 203 a second AlGaN layer 209 provided, which acts as a "back barrier".

In the HFET the 2 The 2DEG forms at the interface between the first AlGaN layer 204 and the unintentionally doped GaN layer 208 out.

The unintentionally doped GaN layer 208 and, if present, the second AlGaN layer 209 in combination with the carbon-doped GaN layer 203 The above-described advantages provide high breakdown voltage with low current dispersion and thus avoid the disadvantages normally associated with a carbon doped GaN layer. The HFET of the invention can be easily manufactured in conventional production lines and can therefore be produced inexpensively.

Claims (10)

A heterostructure field effect transistor with a substrate ( 201 ), one on the substrate ( 201 ) arranged nucleation layer ( 202 ), one on the nucleation layer ( 202 ) arranged carbon-doped GaN layer ( 203 ), one on the carbon-doped GaN layer ( 203 ) arranged first AlGaN layer ( 204 ) and on the first AlGaN layer ( 204 ) arranged source electrode ( 205 ), one on the first AlGaN layer ( 204 ) arranged drain electrode ( 206 ) and one between the source electrode ( 205 ) and the drain electrode ( 206 ) on the first AlGaN layer ( 204 ) arranged gate electrode ( 207 ), characterized by a between the carbon-doped GaN layer ( 203 ) and the first AlGaN layer ( 204 ) arranged unintentionally doped GaN layer ( 208 ). The heterostructure field effect transistor of claim 1, having an interposed between the carbon doped GaN layer ( 203 ) and the unintentionally doped GaN layer ( 208 AlN layer ( 210 ). The heterostructure field effect transistor of claim 1, having an interposed between the carbon doped GaN layer ( 203 ) and the unintentionally doped GaN layer ( 208 ) arranged second AlGaN layer ( 209 ). The heterostructure field effect transistor of claim 3, wherein the second AlGaN layer ( 209 ) is doped. The heterostructure field effect transistor of claim 4, wherein the second AlGaN layer ( 209 ) is doped with carbon or with silicon. The heterostructure field effect transistor of one of the preceding claims, wherein the heterostructure field effect transistor is a self-blocking transistor. A method for producing a heterostructure field effect transistor according to one of the preceding claims, comprising the steps of applying a nucleation layer ( 202 ) on a substrate ( 201 ); Applying a carbon-doped GaN layer ( 203 ) on the nucleation layer ( 202 ); Applying an unintentionally doped GaN layer ( 208 ); Application of a first AlGaN layer ( 204 ) on the unintentionally doped GaN layer ( 208 ); and applying a source electrode ( 205 ), a drain electrode ( 206 ) and one between the source electrode ( 205 ) and the drain electrode ( 206 ) arranged gate electrode ( 207 ) on the first AlGaN layer ( 204 ). The method of claim 7, including between the step of depositing the carbon doped GaN layer ( 203 ) and the step of applying the unintentionally doped GaN layer ( 208 ) performed step of applying an AlN-layer ( 210 ) on the carbon-doped GaN layer ( 203 ). The method of claim 7, including between the step of depositing the carbon doped GaN layer ( 203 ) and the step of applying the unintentionally doped GaN layer ( 208 ) step of applying a second AlGaN layer ( 209 ) on the carbon-doped GaN layer ( 203 ). The method of claim 9 including an additional step of doping the second AlGaN layer ( 209 ), preferably the doping of the second AlGaN layer ( 209 ) with carbon or silicon.

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